CN116130563A - Substrate stripping method - Google Patents
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- 239000000758 substrate Substances 0.000 title claims abstract description 107
- 238000000034 method Methods 0.000 title claims abstract description 42
- 238000006243 chemical reaction Methods 0.000 claims abstract description 108
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 34
- 238000007781 pre-processing Methods 0.000 claims abstract description 7
- 238000009489 vacuum treatment Methods 0.000 claims description 17
- 229920006395 saturated elastomer Polymers 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract description 5
- 230000036632 reaction speed Effects 0.000 abstract description 4
- 238000004140 cleaning Methods 0.000 abstract description 3
- 238000001725 laser pyrolysis Methods 0.000 abstract description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 41
- 235000012431 wafers Nutrition 0.000 description 38
- 229910052594 sapphire Inorganic materials 0.000 description 12
- 239000010980 sapphire Substances 0.000 description 12
- 230000000052 comparative effect Effects 0.000 description 10
- 230000007062 hydrolysis Effects 0.000 description 6
- 238000006460 hydrolysis reaction Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 238000005979 thermal decomposition reaction Methods 0.000 description 4
- 238000000926 separation method Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000035484 reaction time Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910018626 Al(OH) Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000003301 hydrolyzing effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000010865 sewage Substances 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention provides a substrate stripping method, which is used for stripping a substrate from a chip, an AlN buffer layer is arranged between the substrate and the chip, and the substrate, the chip and the AlN buffer layer form a wafer, and the method comprises the following steps: preprocessing the wafer to exhaust air among a plurality of chips; transferring the pretreated wafer into a reaction kettle loaded with pure water, so that the reaction kettle is kept in a reaction state; and taking out the wafer after the reaction is completed, and stripping the substrate. The reaction speed of the AlN buffer layer and the pure water is accelerated by keeping the reaction kettle in a reaction state, so that a product with loose structure and easy cleaning is formed after the AlN buffer layer is hydrolyzed, the substrate can be directly peeled off from the chip, the situation that micro cracks or micro defects are generated on the wafer due to the fact that the temperature of ultraviolet laser pyrolysis is too high is avoided, the problem of laser focal plane deviation is not needed to be considered, and the yield of the micro LED is improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a substrate stripping method.
Background
Micro LEDs are also called micro light emitting diodes, and refer to high-density integrated LED arrays, wherein the distance between LED pixels in the array is 10 microns, and each LED pixel can emit light. Thanks to the new generation of display technology, namely micro LED technology, namely LED miniaturization and matrixing technology. The LED display screen is characterized in that an integrated high-density micro-sized LED array on one chip, such as an LED display screen, each pixel of the LED display screen can be addressed and is driven to be lighted independently, and the LED display screen can be regarded as a miniature version of an outdoor LED display screen, so that the pixel point distance is reduced from millimeter level to micrometer level. The technology miniaturizes the traditional inorganic LED array, and each LED pixel point with the size of 10 microns can be independently positioned and lightened. That is, the size of the otherwise small pitch LED may be further reduced to the order of 10 microns. The display mode of the Micro-LEDs is quite direct, and the 10-micrometer-scale LED chips are connected to the TFT driving substrate, so that the precise control of the light emitting brightness of each chip is realized, and further the image display is realized.
Micro leds possess superior performance, but there is still a breakthrough in the technical area, one of the key technologies being the peeling of the substrate. Since GaN and sapphire have low lattice matching degree and low price, the sapphire substrate becomes the main substrate for epitaxial growth of GaN materials. However, the light-emitting efficiency of the micro led device is affected by the non-electrical conductivity and poor thermal conductivity of the sapphire substrate; meanwhile, the application of the micro LED in the flexible display direction is not facilitated by the brittle material sapphire substrate, and on the basis of the reasons and the advantages of the micro LED display, such as high resolution, high brightness, high contrast and the like, the sapphire substrate is peeled off to highlight the advantages of the micro LED.
The existing substrate stripping is usually carried out by adopting an ultraviolet laser mode, and the principle of ultraviolet laser stripping is as follows: the laser wavelength is smaller than the forbidden bandwidth of GaN and larger than the forbidden bandwidth of the sapphire substrate, so that the laser can penetrate the sapphire substrate to irradiate the GaN, the GaN absorbs the laser energy, the temperature instantaneously reaches more than 1000 ℃, and the GaN at the interface is decomposed into Ga simple substance and N 2 . Thereby realizing the peeling of the sapphire substrateIs effective in (1). In principle, the principle of stripping the ultraviolet laser substrate is thermal decomposition, and the thermal decomposition has the conditions of uneven energy, different heat conduction rates and the like, and microcracks or microdefects are easily caused at stripping positions; and the common GaN epitaxial layer grows on the patterned sapphire substrate, the surface of the patterned sapphire substrate can cause height difference, and laser focal plane deviation can be caused when laser stripping. Both of which can result in reduced yield of the micro led finished product.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a substrate stripping method, which aims to solve the technical problems that in the prior art, sapphire substrates are stripped by ultraviolet laser, micro cracks or micro defects are generated at stripping positions due to the principle of thermal decomposition, laser focal plane deviation is caused by the height difference of the surfaces of the sapphire substrates, and the like, so that the yield of finished products of the micro LEDs is low.
In order to achieve the above object, an embodiment of the present invention provides a substrate peeling method for peeling a substrate from a plurality of chips grown on the substrate, an AlN buffer layer is disposed between the substrate and the chips, and the substrate, the chips, and the AlN buffer layer form a wafer, the substrate peeling method including the steps of:
preprocessing the wafer to exhaust air among a plurality of chips;
transferring the pretreated wafer into a reaction kettle loaded with pure water, so that the reaction kettle is kept in a reaction state, and the AlN buffer layer is hydrolyzed by the pure water, so that the AlN buffer layer is loose in structure;
and taking out the hydrolyzed wafer, and stripping the substrate from the chip.
Compared with the prior art, the invention has the beneficial effects that: by adding pure water into the reaction kettle and utilizing the characteristic that AlN can be hydrolyzed, the reaction kettle is kept in the reaction state, the reaction speed of the AlN buffer layer and the pure water is accelerated, a product with loose structure and easy cleaning is formed after the AlN buffer layer is hydrolyzed, the substrate can be directly peeled off from the chip, the situation that micro cracks or micro defects are generated on the wafer due to overhigh temperature can be avoided by replacing an ultraviolet laser pyrolysis mode, the problem of laser focal plane deviation is not needed to be considered, the yield of MicroLED is effectively improved, the wafer is preprocessed, the situation that pure water cannot enter a plurality of interval positions between the chips, and then the AlN buffer layer is insufficient in hydrolysis and difficult to peel off can be avoided.
Further, the step of preprocessing the wafer to exhaust air between the chips includes:
placing the wafer in a reaction tank, and performing first vacuum treatment on the reaction tank so as to enable the reaction tank to be in a vacuum state;
after pure water is injected into the reaction tank after the first vacuum treatment, the reaction tank is decompressed to a normal pressure state;
and performing a second vacuum treatment on the reaction tank to exhaust air among a plurality of chips.
Further, the step of performing the first vacuum treatment on the reaction tank specifically includes:
and vacuumizing the reaction tank to a first calibration vacuum state, and enabling the reaction tank to maintain the calibration vacuum state within a first calibration time.
Further, the first calibration time is 4-6 min, and the vacuum degree of the first calibration vacuum state is 2.5-5.3 kPa.
Further, the step of performing the second vacuum treatment on the reaction tank specifically includes:
vacuumizing the reaction tank to a second calibration vacuum state, and releasing the pressure of the reaction tank to a normal pressure state after the reaction tank maintains the second calibration vacuum state in a second calibration time so as to finish single treatment;
and circularly carrying out the single treatment on the reaction tank according to the calibration cycle times.
Further, the second calibration time is 1.5 min-2.5 min, the vacuum degree of the second calibration vacuum state is 2.5 kPa-5.3 kPa, and the calibration cycle times are 23 times-25 times.
Further, the step of maintaining the reaction state of the reaction kettle specifically includes:
heating the reaction kettle to a calibrated temperature, and adjusting the pressure in the reaction kettle to the calibrated pressure so as to enable the reaction kettle to be in a reaction state;
and enabling the reaction kettle to maintain the reaction state in a third calibration time.
Furthermore, the calibration temperature is 110-170 ℃, the calibration pressure is 160-800 kPa, the calibration pressure is always higher than the saturated vapor pressure of water by more than 2kPa, and the third calibration time is 120-240 min.
Further, the AlN buffer layer has a thickness of 800-5000 angstroms.
Still further, before the step of preprocessing the wafer to exhaust air between the plurality of chips, the method further includes:
and bonding one end of the chip, which is opposite to the AlN buffer layer, to a substrate through a bonding layer.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the other features, objects, and advantages of the application.
Drawings
FIG. 1 is a flow chart of a method for peeling a substrate in embodiment 1 of the present invention;
FIG. 2 is a flowchart showing the pretreatment of a wafer in the substrate peeling method in embodiment 1 of the present invention;
FIG. 3 is a flowchart of a substrate peeling method in embodiment 2 of the present invention;
FIG. 4 is a flowchart showing the pretreatment of a wafer in the substrate peeling method in embodiment 2 of the present invention;
FIG. 5 is a schematic view showing the structure of a wafer before the substrate is peeled in the substrate peeling method in embodiment 2 of the present invention;
FIG. 6 is a schematic view showing the structure of a wafer after the substrate is peeled off in the substrate peeling method in embodiment 2 of the present invention;
description of main reference numerals:
the invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1 and 2, in the substrate stripping method of embodiment 1 of the present invention, a substrate 101 is stripped from a plurality of chips 301 grown on the substrate 101, and the plurality of chips 301 are uniformly arranged on the substrate 101 at intervals, and it can be understood that a spacing distance exists between the plurality of chips 301, and the spacing distance between every two chips 301 is the same by the uniform arrangement manner, so as to facilitate subsequent production and processing.
An AlN buffer layer 201 is arranged between the substrate 101 and the chip 301, and aluminum nitride (AlN) is an ultra-wide band gap semiconductor material with great application potential and market prospect, and has many excellent properties, such as a band gap of up to 6.2eV (direct band gap), high thermal conductivity (320W/m), high hardness (1200 kg/cm) 2 ) High chemical and thermal stability, high breakdown electric field (1.2 mV/cm-1.4 mV/cm), small dielectric coefficient, small lattice mismatch with GaN, etc. In general, the AlN buffer layer 201 is provided during the preparation of the LED, and is a substrate for assisting high-quality epitaxial growth.
Preferably, the thickness of the AlN buffer layer 201 is 800-5000 angstroms, by limiting the thickness of the AlN buffer layer 201, it is beneficial to mass production of products and the overall epitaxial growth process, specifically, if the thickness of the AlN buffer layer 201 is smaller than the above thickness range, the contact area between pure water and the AlN buffer layer 201 is too small when hydrolysis is performed in the subsequent reaction kettle, and the reaction time is too long, which is not beneficial to mass production of products, and if the reaction time is larger than the above thickness range, it is not beneficial to the subsequent overall epitaxial growth process.
The area of the AlN buffer layer 201 is the same as the area of the chip 301, that is, a plurality of AlN buffer layers 201 are disposed on the substrate 101, the AlN buffer layers 201 correspond to the positions of the chip 301, the substrate 101, the AlN buffer layers 201, and the chip 301 are sequentially distributed from bottom to top, and the substrate 101, the chip 301, and the AlN buffer layers 201 form a wafer. In this embodiment, the wafer is used to prepare micro leds.
The substrate peeling method includes the steps of:
s10: preprocessing the wafer to exhaust air among a plurality of chips;
it can be appreciated that, the substrate 101 is provided with the plurality of chips 301 and the AlN buffer layer 201 disposed corresponding to the plurality of chips 301, so that, in order to ensure the subsequent processing and the performance of the micro led, a separation distance exists between the adjacent chips 301, and by exhausting the air in the separation distance between the plurality of chips 301, the AlN buffer layer 201 and the pure water can be fully contacted in the subsequent reaction kettle, so that the situation that pure water cannot enter the separation distance between the plurality of chips 301, and then the AlN buffer layer 201 is insufficiently hydrolyzed and is difficult to peel is avoided.
Further, the step S10 specifically includes:
step S11: placing the wafer in a reaction tank, and performing first vacuum treatment on the reaction tank so as to enable the reaction tank to be in a vacuum state;
after the wafer is placed in the reaction tank, vacuumizing the reaction tank to a first calibration vacuum state, wherein the vacuum degree of the first calibration vacuum state is 5.3kPa, and enabling the reaction tank to maintain the first calibration vacuum state within a first calibration time, and the first calibration time is 4min. By controlling the first calibration vacuum state and the first calibration time, it is ensured that the AlN buffer layer 201 is not affected by other structures of the wafer, thereby reducing the yield.
Step S12: after pure water is injected into the reaction tank after the first vacuum treatment, the reaction tank is decompressed to a normal pressure state;
the liquid of the pure water in the reaction tank is higher than the thickness of the wafer, namely the pure water injected into the reaction tank needs to fully soak the wafer, so that the pretreatment is more sufficient.
Step S13: performing a second vacuum treatment on the reaction tank to exhaust air among a plurality of chips;
after the injection of the pure water is completed and the reaction tank is depressurized to a normal pressure state, the reaction tank is vacuumized to a second calibration vacuum state, and it can be understood that the second calibration vacuum state in step S13 is the same as the vacuum degree of the first calibration vacuum state in step S12, i.e. the vacuum degree of the second calibration vacuum state in step S13 is also 5.3kPa. And the second calibration time is 1.5min, and after the reaction tank is maintained in the second calibration vacuum state for the second calibration time, the reaction tank is depressurized to a normal pressure state so as to finish single treatment.
And circularly carrying out the single treatment on the reaction tank according to the calibration cycle times. It is understood that the single treatment is performed in a cycle in which the reaction vessel is maintained in a vacuum state of 5.3kPa vacuum for 1.5min and depressurized to a normal pressure state, and then again evacuated to a vacuum state of 5.3kPa vacuum and maintained for 1.5min. The number of calibration cycles is 25, and after the second vacuum treatment is completed, air between the plurality of chips 301 can be exhausted, so that the subsequent treatment is facilitated.
S20: transferring the pretreated wafer into a reaction kettle loaded with pure water, so that the reaction kettle is kept in a reaction state, and the AlN buffer layer is hydrolyzed by the pure water, so that the AlN buffer layer is loose in structure;
it is understood that the pure water injected into the reaction tank is the same as the pure water loaded in the reaction tank, and the liquid of the pure water in the reaction tank is also higher than the thickness of the wafer.
After transferring the wafer into the reaction kettle, heating the reaction kettle to a calibration temperature, wherein the calibration temperature is 110 ℃, adjusting the pressure in the reaction kettle to a calibration pressure, wherein the calibration pressure is 160kPa, and the calibration pressure is always higher than the saturated vapor pressure of water by more than 2kPa, so that the reaction kettle is in a reaction state, the temperature in the reaction kettle is increased, the reaction speed of pure water and the AlN buffer layer 201 in the wafer can be accelerated, namely the hydrolysis speed of the AlN buffer layer 201 is accelerated, and the calibration pressure in the reaction kettle is adjusted, so that the calibration pressure is always higher than the saturated vapor pressure of water by more than 2kPa, and the situation that the pure water enters a boiling state due to the temperature increase in the reaction kettle can be avoided, and the wafer is influenced. And enabling the reaction kettle to maintain the reaction state within a third calibration time, wherein the third calibration time can be correspondingly and dynamically adjusted based on the size of the micro LED, the smaller the size is, the shorter the third calibration time is, the larger the size is, the longer the third calibration time is, and preferably, the third calibration time is 120-240 min.
S30: taking out the hydrolyzed wafer, and stripping the substrate from the chip;
by adding pure water into the reaction kettle, the reaction kettle is kept in the reaction state by utilizing the characteristic of AlN hydrolysis, the reaction speed of the AlN buffer layer 201 and the pure water is accelerated, and the reaction principle is as follows:
AlN+3H 2 O=Al（OH） 3 +NH 3 ；
2AlN+3H 2 O=Al 2 O 3 +3H 2 +N 2 ；
from the above formula, it can be seen that, by hydrolyzing the AlN buffer layer 201 to form a product with a loose structure and easy cleaning, the substrate 101 can be directly peeled off from the chip 301, and by this way, the condition that the wafer generates micro cracks or micro defects due to too high temperature can be avoided by replacing the ultraviolet laser thermal decomposition way, and the problem of laser focal plane deviation is not required to be considered, so that the yield of the micro led is effectively improved, and the light efficiency of the subsequently manufactured micro led is improved to a certain extent. In addition, by the mode in this embodiment, after the substrate 101 is peeled, no gallium element specific to ultraviolet laser peeling is generated, so that a corresponding sewage treatment procedure can be saved, the protection performance is improved, after the substrate 101 is peeled, the substrate 101 is not damaged, and after the peeled substrate 101 is cleaned, the substrate 101 can be recycled, and the production cost is saved to a certain extent.
Referring to fig. 3 and 4, in the substrate peeling method of embodiment 2 of the present invention, a substrate 101 is peeled from a plurality of chips 301 grown on the substrate 101, an AlN buffer layer 201 is disposed between the substrate 101 and the chips 301, and the substrate 101, the chips 301 and the AlN buffer layer 201 form a wafer, and the substrate peeling method includes:
s100: and bonding one end of the chip, which is opposite to the AlN buffer layer, to a substrate through a bonding layer.
That is, in this embodiment, the wafer further includes the bonding layer 401 and the bonding substrate 501, the substrate 101, the AlN buffer layer 201, the chip 301, the bonding layer 401 and the bonding substrate 501 are sequentially disposed from bottom to top, in this embodiment, the structure of the wafer before the substrate 101 is peeled is as shown in fig. 5, preferably, the bonding substrate 501 and the substrate 101 have the same size, that is, a plurality of chips 301 are uniformly distributed on a surface of the bonding substrate 501 facing the chip 301.
S200: preprocessing the wafer to exhaust air among a plurality of chips;
specifically, the step S200 includes:
s210: placing the wafer in a reaction tank, and performing first vacuum treatment on the reaction tank so as to enable the reaction tank to be in a vacuum state;
s220: after pure water is injected into the reaction tank after the first vacuum treatment, the reaction tank is decompressed to a normal pressure state;
s230: and performing a second vacuum treatment on the reaction tank to exhaust air among a plurality of chips.
S300: transferring the pretreated wafer into a reaction kettle loaded with pure water, so that the reaction kettle is kept in a reaction state, and the AlN buffer layer is hydrolyzed by the pure water, so that the AlN buffer layer is loose in structure;
s400: and taking out the wafer after the reaction is completed, adsorbing a first sucker on one surface of the bonding substrate, which is opposite to the bonding layer, and adsorbing a second sucker on one surface of the substrate, which is opposite to the chip, so as to peel the substrate from the chip.
The structure of the wafer after delamination is shown in fig. 6. Because the plurality of chips 301 are arranged on the substrate 101, the substrate 101 and the chips 301 can be separated more quickly by arranging the bonding substrate 501 and adsorbing the first sucker on the bonding substrate 501 and adsorbing the second sucker on the substrate 101, so that the production efficiency of the micro led is improved.
In this embodiment, the first calibration time is 6min, the vacuum degrees of the first calibration vacuum state and the second calibration vacuum state are both 2.5kPa, the second calibration time is 2.5min, the number of calibration cycles is 23, the calibration temperature is 170 ℃, and the calibration pressure is 800kPa.
Comparative example 1
A substrate peeling method in this embodiment is different from that in embodiment 2 in that:
the vacuum degree of the first calibration vacuum state and the second calibration vacuum state is 7kPa.
Comparative example 2
A substrate peeling method in this embodiment is different from that in embodiment 2 in that:
the first calibration time is 8min.
Comparative example 3
A substrate peeling method in this embodiment is different from that in embodiment 2 in that:
the second calibration time is 4min.
Comparative example 4
A substrate peeling method in this embodiment is different from that in embodiment 2 in that:
the calibration temperature is 190 ℃, and the calibration pressure is 1280kPa;
comparative example 5
A substrate peeling method in this embodiment is different from that in embodiment 2 in that:
the number of calibration cycles is 30;
comparative example 6
A substrate peeling method in this embodiment is different from that in embodiment 2 in that:
stripping the substrate from a plurality of chips growing on the substrate in an ultraviolet laser irradiation mode;
the wafers were peeled off in batches according to examples 1 to 2 and comparative examples 1 to 6, and were tested in correspondence with preparation of micro leds, in this application, the number of tests in each group of examples or comparative examples was 500, and the corresponding preparation parameters and test results are shown in the following table:
in practical application, the substrate stripping methods corresponding to the embodiments 1-2 and the comparative examples 1-6 are adopted to strip substrates from wafers in batches, and subsequent processes are completed, so that micro leds are correspondingly manufactured for testing, and test data are shown in the table. In order to ensure the reliability of the verification result, when the micro leds are prepared correspondingly in the embodiments 1 to 2 and the comparative examples 1 to 6, the process and the parameters should be kept consistent except for the above parameters.
It can be obtained from the table above that, in the micro led formed by the preparation of the substrate peeling mode of the AlN buffer layer by hydrolysis in the present application, the yield is improved to a certain extent compared with the yield of the micro led formed by the preparation of the conventional substrate peeling mode by ultraviolet laser irradiation, that is, the substrate peeling mode of the AlN buffer layer by hydrolysis can replace the substrate peeling mode by ultraviolet laser irradiation without affecting the performance of the micro led finished product by the table above, and the yield is better than that of the substrate peeling mode by ultraviolet laser irradiation. And the first calibration time is controlled to be 4-6 min, the vacuum degree of the first calibration vacuum state and the second calibration vacuum state is controlled to be 2.5-5.3 kPa, the second calibration time is controlled to be 1.5-2.5 min, the calibration cycle times are controlled to be 23-25 times, and the calibration temperature is controlled to be 110-170 ℃, so that the yield can be improved better.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. A substrate peeling method for peeling a substrate from a plurality of chips grown on the substrate, an AlN buffer layer being provided between the substrate and the chips, the substrate, the chips and the AlN buffer layer forming a wafer, the substrate peeling method comprising the steps of:
preprocessing the wafer to exhaust air among a plurality of chips;
transferring the pretreated wafer into a reaction kettle loaded with pure water, so that the reaction kettle is kept in a reaction state, and the AlN buffer layer is hydrolyzed by the pure water, so that the AlN buffer layer is loose in structure;
and taking out the hydrolyzed wafer, and stripping the substrate from the chip.
2. The method of claim 1, wherein the step of pre-treating the wafer to vent air between a plurality of the chips comprises:
placing the wafer in a reaction tank, and performing first vacuum treatment on the reaction tank so as to enable the reaction tank to be in a vacuum state;
after pure water is injected into the reaction tank after the first vacuum treatment, the reaction tank is decompressed to a normal pressure state;
and performing a second vacuum treatment on the reaction tank to exhaust air among a plurality of chips.
3. The substrate peeling method according to claim 2, wherein the step of performing the first vacuum treatment on the reaction tank specifically comprises:
and vacuumizing the reaction tank to a first calibration vacuum state, and enabling the reaction tank to maintain the first calibration vacuum state within a first calibration time.
4. The method according to claim 3, wherein the first calibration time is 4min to 6min, and the vacuum degree of the first calibration vacuum state is 2.5kpa to 5.3kpa.
5. The substrate peeling method according to claim 2, wherein the step of performing the second vacuum treatment on the reaction tank specifically comprises:
vacuumizing the reaction tank to a second calibration vacuum state, and releasing the pressure of the reaction tank to a normal pressure state after the reaction tank maintains the second calibration vacuum state in a second calibration time so as to finish single treatment;
and circularly carrying out the single treatment on the reaction tank according to the calibration cycle times.
6. The method according to claim 5, wherein the second calibration time is 1.5min to 2.5min, the degree of vacuum in the second calibration vacuum state is 2.5kpa to 5.3kpa, and the number of calibration cycles is 23 times to 25 times.
7. The method according to claim 1, wherein the step of maintaining the reaction state of the reaction vessel is specifically:
heating the reaction kettle to a calibrated temperature, and adjusting the pressure in the reaction kettle to the calibrated pressure so as to enable the reaction kettle to be in a reaction state;
and enabling the reaction kettle to maintain the reaction state in a third calibration time.
8. The method according to claim 7, wherein the calibration temperature is 110 ℃ to 170 ℃, the calibration pressure is 160kPa to 800kPa, the calibration pressure is always 2kPa or more higher than the saturated vapor pressure of water, and the third calibration time is 120min to 240min.
9. The method according to claim 1, wherein the AlN buffer layer has a thickness of 800 to 5000 angstroms.
10. The method according to any one of claims 1 to 9, characterized by further comprising, before the step of pretreating the wafer to exhaust air between a plurality of the chips:
and bonding one end of the chip, which is opposite to the AlN buffer layer, to a substrate through a bonding layer.
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