CN113156723B

CN113156723B - Display panel, driving method thereof and display device

Info

Publication number: CN113156723B
Application number: CN202011634026.3A
Authority: CN
Inventors: 柯姝宇; 赵聪聪; 张建英; 余思慧
Original assignee: HKC Co Ltd; Mianyang HKC Optoelectronics Technology Co Ltd
Current assignee: HKC Co Ltd; Mianyang HKC Optoelectronics Technology Co Ltd
Priority date: 2020-12-31
Filing date: 2020-12-31
Publication date: 2024-10-11
Anticipated expiration: 2040-12-31
Also published as: CN113156723A

Abstract

The application discloses a display panel, a driving method thereof and a display device; the display panel includes: a plurality of columns of data lines, a plurality of rows of scanning lines, a plurality of pixel active switches, a pixel electrode, a plurality of reset active switches and a common electrode; the pixel driving switches are arranged in one-to-one correspondence with the pixel areas, the source electrode of the reset driving switch is connected with the pixel electrode, and the drain electrode of the reset driving switch is connected with a reset data signal; a plurality of reset control signal lines are arranged in one-to-one correspondence with the scanning lines and are connected to the grid electrodes of the reset active switch; if the data signal offset value is in the interval from zero to positive value; the offset value of the reset data signal is in the interval from zero to negative value; if the data signal offset value is in the interval from zero to negative value; the offset value of the reset data signal is in the interval from zero to positive value; so as to solve the problem that the positive and negative changes of the voltage on the data line easily cause afterimage.

Description

Display panel, driving method thereof and display device

Technical Field

The present application relates to the field of display technologies, and in particular, to a display panel, a driving method thereof, and a display device.

Background

Thin film transistor liquid crystal displays (TFT-LCDs) are increasingly being used, and the performance requirements of the liquid crystal displays are becoming higher and higher, and the requirements for picture quality are becoming stricter. The wide viewing angle, high contrast, low power consumption and quick response are main directions for improving the performance of the display, and the liquid crystal panel generally comprises an array substrate and a color film substrate which are arranged in a box, and liquid crystal molecules are filled between the array substrate and the color film substrate; the array substrate comprises a substrate base plate, grid lines and data lines, wherein the grid lines and the data lines are formed on the substrate base plate, and the pixel units are arranged on the grid lines and the data lines.

In general, in a liquid crystal display, since polarities of voltage signals applied to both ends of a liquid crystal capacitor Clc and a storage capacitor Cst must be inverted every predetermined time to avoid permanent damage caused by polarization of a liquid crystal material, it is necessary to perform polarity inversion driving on pixel units on an array substrate. The polarity inversion driving needs to change the voltage on the data line positively and negatively; however, the positive and negative changes of the voltage on the data line easily cause the problem of afterimage.

Disclosure of Invention

The application aims to provide a display panel, a driving method thereof and a display device, which are used for solving the problem that the positive and negative changes of the voltage on a data line easily cause residual images.

The application discloses a display panel, which comprises: a plurality of columns of data lines, a plurality of rows of scanning lines, a plurality of pixel active switches, a pixel electrode, a plurality of reset active switches, a plurality of reset control signal lines and a common electrode; the data lines shown provide data signals; the data lines and the scanning lines are crossed to form a plurality of pixel areas; the pixel driving switches are arranged in one-to-one correspondence with the pixel areas, the grid electrodes of the pixel driving switches are connected to the scanning lines of the current row, and the source electrodes of the pixel driving switches are connected to the data lines of the current column; the pixel area is provided with a corresponding pixel electrode, and the pixel electrode is connected with the drain electrode of the pixel active switch; the pixel electrode is connected with the pixel electrode, and the drain electrode of the reset active switch is connected with a reset data signal; the plurality of reset control signal lines are arranged in one-to-one correspondence with the scanning lines, and the grid electrode of the reset active switch is connected to the reset control signal lines; the common electrode provides a common voltage signal for the display panel;

the difference value between the voltage value of the reset data signal and the common voltage signal is a reset data signal offset value; the difference between the voltage value of the data signal and the voltage value of the common voltage signal is a data signal offset value; if the data signal offset value is in the interval from zero to positive value; the offset value of the reset data signal is in the interval from zero to negative value; if the data signal offset value is in the interval from zero to negative value; the reset data signal has an offset value ranging from zero to a positive value.

Optionally, the display panel further includes: the scanning driving circuit is connected with the scanning line and provides scanning signals for the scanning line; the reset control driving circuit is connected with the reset control signal line and provides a reset control signal for the reset control signal line; the scan driving circuit and the reset control driving circuit are disposed at different sides of the display panel.

Optionally, the display panel further includes: the two scanning driving circuits are respectively arranged at two sides of the display panel, are respectively connected to two ends of the scanning line and simultaneously provide scanning signals for the scanning line; and two reset control driving circuits are respectively arranged at two sides of the display panel, and are respectively connected to two ends of the reset control signal line and simultaneously provide reset control signals for the reset control signal line.

Optionally, the scan driving circuit includes a scan frame start signal, and the scan frame start signal controls the start of the scan signal; the reset control driving circuit comprises a reset frame starting signal, and the reset frame starting signal controls the starting of the reset control signal; the reset frame start signal is started at a time t1, the scanning frame start signal is started at a time t3, and t1 is smaller than t3.

Optionally, the reset control signal line and the scan line are formed in the same layer, and the reset control signal line and the scan line are arranged at intervals.

Optionally, a source electrode of the reset active switch is connected to the common electrode, and the reset data signal is a common voltage signal of the common electrode.

The application also discloses a driving method of the display panel, which comprises the following steps:

Providing a common voltage signal to a common electrode of the display panel;

At time t1, a reset control signal corresponding to the current pixel controls the reset active switch to be turned on, and a reset data signal is provided for the pixel electrode;

At the time t2, the reset control signal controls the reset active switch to be closed;

at time t3, the scanning signal of the scanning line corresponding to the current row of pixels controls the pixel active switch to be turned on, and a data signal is provided for the pixel electrode;

Wherein t1 is more than t2 and less than or equal to t3; the difference value between the voltage value of the reset data signal and the common voltage signal is a reset data signal offset value; the difference between the voltage value of the data signal and the voltage value of the common voltage signal is a data signal offset value; if the data signal offset value is in the interval from zero to positive value; the offset value of the reset data signal is in the interval from zero to negative value;

If the data signal offset value is in the interval from zero to negative value; the reset data signal has an offset value ranging from zero to a positive value.

Optionally, the difference of t2-t1 is equal to the line start time of the scan signal of the scan line of the current line; t3=t2.

Optionally, the difference of t2-t1 is equal to twice the line on time of the scan signal of the scan line of the current line; the difference between t3 and t2 is equal to the line on time of the scan signal of the scan line for the current line.

The application also discloses a display device which comprises the display panel and a backlight module for providing a light source for the display panel.

Compared with the technical scheme of exemplary dot inversion, the display panel is provided with the reset active switch which can be controlled independently relative to the pixel active switch for display in the display panel, so that a reset data signal can be provided to the pixel electrode before the scanning line of the current row of each frame is started, and the voltage difference between the pixel electrode and the common electrode is a reset data signal offset value at the current time t 2; when the scanning line is turned on at the current time t3, a data signal is input to the pixel electrode, namely, under the condition of normal display, the voltage difference between the pixel electrode and the common electrode is a data signal offset value, and the common electrode and the pixel electrode jointly drive liquid crystal molecules to deflect; and the polarity of the reset data signal offset value is opposite to that of the data signal offset value, namely, after the reset circuit of each frame is started, the polarity of the voltage difference between the pixel electrode and the common electrode is reversed, so that the deflection of the corresponding liquid crystal molecules is reversed, and one polarity reversal is realized. Compared with the technical scheme of the point inversion, the data signal can always be constant positive or constant negative by reversing the voltage of the data signal from positive to negative or from negative to positive, and the positive and negative data signals are not required to be input when different row scanning lines are started, so that the power consumption is saved, and the problem of afterimage caused by positive and negative changes of the data signal is solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is evident that the figures in the following description are only some embodiments of the application, from which other figures can be obtained without inventive effort for a person skilled in the art. In the drawings:

FIG. 1 is a schematic diagram of a display device according to an embodiment of the application;

FIG. 2 is a schematic diagram of a display panel according to an embodiment of the application;

FIG. 3 is a schematic diagram of a display panel according to an embodiment of the application;

FIG. 4 is a schematic diagram of a pixel active switch and reset circuit within a pixel region according to an embodiment of the application;

FIG. 5 is a timing diagram of a reset control signal, a data signal and a scan line according to an embodiment of the present application;

FIG. 6 is a schematic diagram of the timing of a reset control signal, a data signal and a scan line according to another embodiment of the present application;

FIG. 7 is a schematic waveform diagram of a reset signal according to an embodiment of the present application;

FIG. 8 is a waveform diagram of a reset signal according to another embodiment of the present application;

fig. 9 is a schematic diagram of a driving method of a display panel according to an embodiment of the application.

10, A display panel; 100. an array substrate; 110. a scan driving circuit; 111. a scanning line; 120. a data driving circuit; 121. a data line; 130. a pixel active switch; 140. a pixel region; 150. a pixel electrode; 160. a reset circuit; 161. resetting the active switch; 170. a reset control driving circuit; 171. a reset control signal line; 180. resetting the data driving circuit; 181. resetting the data signal line; 182. resetting the data signal; 190. a common line; 200. a color film substrate; 210. a common electrode; 300. and (3) liquid crystal.

Detailed Description

It is to be understood that the terminology used herein, the specific structural and functional details disclosed are merely representative for the purpose of describing particular embodiments, but that the application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.

In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or implicitly indicating the number of technical features indicated. Thus, unless otherwise indicated, features defining "first", "second" may include one or more such features either explicitly or implicitly; the meaning of "plurality" is two or more. The terms "comprises," "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that one or more other features, integers, steps, operations, elements, components, and/or groups thereof may be present or added.

In addition, terms of the azimuth or positional relationship indicated by "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., are described based on the azimuth or relative positional relationship shown in the drawings, are merely for convenience of description of the present application, and do not indicate that the apparatus or element referred to must have a specific azimuth, be constructed and operated in a specific azimuth, and thus should not be construed as limiting the present application.

Furthermore, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; either directly or indirectly through intermediaries, or in communication with each other. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.

Common polarity inversions include: frame inversion, column inversion, row inversion, and dot inversion. Wherein, before the writing of the previous frame is finished and the writing of the next frame is started, if the polarities of voltages stored in the pixel units on the whole frame are all the same, the polarities of voltages are all positive or all negative), namely frame inversion is called; if the polarities of the voltages stored in the pixel units on the same row are the same, and the polarities of the voltages stored in the pixel units on the left and right adjacent rows are opposite, the column inversion is called; if the polarities of voltages stored in the pixel units on the same row are the same, and the polarities of voltages stored in the pixel units on the upper and lower adjacent rows are opposite, the operation is called row inversion; if the polarity of the voltage stored in each pixel unit is opposite to the polarity of the voltage stored in the pixel unit adjacent to the pixel unit at the upper, lower, left and right sides, the dot inversion is called. In order to improve the quality of the whole display screen, the dot inversion driving method of the pixel unit has gradually become the current mainstream display driving method. However, both dot inversion and column inversion require positive and negative changes in the voltage on the data line, which are likely to cause image sticking problems.

The application is described in detail below with reference to the attached drawings and alternative embodiments.

As shown in fig. 1-3, as an embodiment of the present application, a display device is disclosed, which includes a display panel 10 and a backlight module for providing a light source for the display panel 10. Wherein the display panel 10 includes: the liquid crystal display comprises an array substrate 100 and a color film substrate 200, wherein a liquid crystal 300 is arranged between the array substrate 100 and the color film substrate 200, and a plurality of rows of data lines 121, a plurality of rows of scanning lines 111, a plurality of pixel active switches 130, a pixel electrode 150 and a plurality of reset circuits 160 are arranged on the array substrate 100; the color film substrate 200 is provided with a common electrode 210; the common electrode 210 and the pixel electrode 150 together drive the liquid crystal 300 molecules to deflect.

Fig. 4 shows a schematic diagram of the pixel active switch 130 and the reset circuit 160 within one pixel region 140; the data line 121 is shown providing a data signal; the scan lines 111 provide scan signals, and the data lines 121 intersect the scan lines 111 to form the plurality of pixel regions 140; the pixel active switches 130 are arranged in one-to-one correspondence with the pixel regions 140, the gates of the pixel active switches 130 are connected to the scanning lines 111 of the current row, and the sources of the pixel active switches 130 are connected to the data lines 121 of the current column;

The pixel electrode 150 is disposed in the pixel region 140 and connected to the drain electrode of the pixel active switch 130; the plurality of reset active switches 161 are arranged in a one-to-one correspondence with the plurality of pixel regions 140, the source electrode of the reset active switch 161 is connected with the pixel electrode 150, and the drain electrode of the reset active switch 161 is connected to a reset data voltage; a plurality of reset control signal lines 171, which are parallel to the scanning lines 111 and are arranged in one-to-one correspondence with the scanning lines 111, are connected to the gates of the reset active switches 161; a common electrode 210 for providing a common voltage signal to the display panel 10;

Compared with the technical scheme of exemplary dot inversion, the display panel is provided with the reset active switch which can be controlled independently relative to the pixel active switch used for displaying in the display panel, at the time t1 before the scanning signal of the current line scanning line 111 is started, the reset active switch 161 is controlled to be started by the reset control signal corresponding to the reset control signal line 171 arranged on the current line scanning line 111, a reset data signal is provided for the pixel electrode 150, at the time t2 before the scanning signal of the current line scanning line 111 is started, the reset active switch 161 is controlled to be closed by the reset control signal, the scanning signal of the current line scanning line 111 is started at the time t3, and t1 is more than t2 and less than or equal to t3; so that the reset data signal can be supplied to the pixel electrode 150 before the scan line 111 of the current row of each frame is turned on, so that the voltage difference between the pixel electrode 150 and the common electrode 210 is the reset data signal offset value at the current time t 2; when the scanning line 111 is turned on at the current time t3, a data signal is input to the pixel electrode 150, that is, in the case of normal display, the voltage difference between the pixel electrode 150 and the common electrode 210 is a data signal offset value, and the common electrode 210 and the pixel electrode 150 jointly drive the liquid crystal 300 molecules to deflect; and the polarity of the reset data signal offset value is opposite to that of the data signal offset value, that is, after the reset circuit 160 of each frame is turned on, the polarity of the voltage between the pixel electrode 150 and the common electrode 210 is inverted, so that the bias of the corresponding liquid crystal 300 molecules is inverted, thereby realizing one polarity inversion. Compared with the technical scheme of the exemplary dot inversion, the data signals can be always constant positive or constant negative by reversing the voltage of the data signals from positive to negative or from negative to positive, and the positive and negative data signals are not required to be input when different row scanning lines 111 are started, so that the power consumption is saved, and the problem of afterimage caused by positive and negative changes of the data signals is solved.

And the present application can select the timing at which the reset active switch 161 is turned on by the reset control signal line 171; the reset control signal lines 171 and the scan lines 111 are lines corresponding to each other one by one, and can provide a reset control signal similar to a scan signal to the reset active switch 161, so as to realize the row-by-row opening of the reset active switch 161, so that only the liquid crystal 300 molecules corresponding to one row of the pixel area 140 are refreshed in each row opening time, thereby realizing the row-by-row refreshing.

Specifically, a schematic diagram of the scan driving circuit 111 and the reset control driving circuit 170 is shown in fig. 5; the display panel 10 includes: a scan driving circuit 111, wherein the scan driving circuit 111 is connected to the scan line 111, and provides a scan signal for the scan line 111; a reset control driving circuit 170, the reset control driving circuit 170 being connected to the reset control signal line 171, and providing a reset control signal to the reset control signal line 171; the scan driving circuit 111 and the reset control driving circuit 170 are disposed at different sides of the display panel 10. Correspondingly, the scan driving circuit 111 outputs a scan signal to the corresponding pixel active switch 130 from the left side, the reset control driving circuit 170 outputs a reset control signal to the corresponding reset active switch 161 from the right side, the scan driving circuit 111 and the reset driving circuit do not interfere with each other, and for the small-sized high-refresh liquid crystal 300 display panel 10, when one side of the display panel 10 cannot load more wiring space, the scan driving circuit 111 and the reset control driving circuit 170 are arranged on different sides of the display panel 10, and under the condition that the normal scan driving circuit 111 of the display panel 10 is not affected, the reset control is realized, and the display effect of high refresh is not affected. The relationship between the on time t1, t2 of each row of the reset control driving circuit 170 and the on time t3 of each row of the scan driving circuit 111 is not affected by the on time of each row of the scan signal, i.e., the row on time; that is, the on time of t2-t1, i.e. the reset control signal of each row, may be equal to half the on time of a row, or may be equal to one row on time, which may be specifically selected according to the actual situation.

As shown in fig. 6, which shows a scan driving circuit 111 and a reset control driving circuit 170 according to another embodiment of the present application, the display panel 10 includes: two scan driving circuits 111 and two reset control driving circuits 170; two scan driving circuits 111 are respectively disposed at two sides of the display panel 10, and the two scan driving circuits 111 are respectively connected to two ends of the scan line 111, and simultaneously provide scan signals for the scan line 111; two reset control driving circuits 170 are respectively disposed at both sides of the display panel 10, and the two reset control driving circuits 170 are respectively connected to both ends of the reset control signal line 171 while providing a reset control signal to the reset control signal line 171. For a large-sized display panel 10, the wiring space is large, and the scan driving circuit 111 and the reset control driving circuit 170 may be provided at both sides of the display panel 10 at the same time, so that it is suitable for different display panels 10.

The reset control signal line 171 in the above two reset control driving circuits 170 and the scan line 111 of the scan driving circuit 111 may be provided in a layered manner, or may be provided in the same layer. Specifically, the reset control signal line 171 is formed in the same layer as the scan line 111, and the reset control signal line 171 is disposed at a distance from the scan line 111. The reset control signal lines 171 are arranged at intervals of one scan line 111 with one reset control signal line 171, and when the metal layer of the scan line 111 is etched, the reset control signal lines 171 which are arranged at intervals and are the same layer as the scan line 111 can be etched only by changing the original mask. And the reset active switch 161 and the pixel active switch 130 are also in the same layer process, and only the mask is required to be changed without increasing the process, and the process of other structures in the display panel 10 is not affected.

However, the arrangement of the same layer has a certain influence on the aperture ratio, and in order to pursue a high aperture ratio, the reset control signal line 171 and the scan line 111 are arranged in a stacked manner in this embodiment, specifically, may be completely overlapped, or may be partially overlapped, so that the aperture ratio of the display panel 10 is improved to a certain extent, and the partial overlap may reduce the load between the scan line 111 and the reset control signal line 171. Those skilled in the art will choose from the actual situation.

Specifically, the timing of the scan driving circuit 111 and the reset control driving circuit 170 may be controlled by the corresponding reset control driving circuit 170, for example, from time t1 to time t2 is a row on time before the current row scanning line 111 is turned on, t2=t3, where the row on time is a time when the row scanning line 111 is turned on, that is, one row on time is advanced, the reset active switch 161 is turned on, and the reset data signal is transmitted to the pixel electrode 150; after the current scan line 111 is turned on, the pixel active switch 130 is turned on to transmit a data signal to the pixel electrode 150; the gate of the corresponding reset active switch 161 is connected to the current row reset control signal line 171, and the current row reset control signal line 171 is turned on one row on time earlier than the on time of the current row scan line 111. That is, a function of controlling the input of a reset data signal through the reset control signal line 171 in the display panel 10; moreover, in this embodiment, the supply time of the reset data signal is only one line on time before the current line scan line 111 is turned on, that is, after the pixel electrode 150 corresponding to the current line scan line 111 is charged in one frame time, before the next frame scan is turned on, before each line scan line 111 is scanned line by line, the pixel electrode 150 corresponding to each line scan line 111 is connected to the reset data signal line by line, and reset is performed, that is, the polarity of the liquid crystal 300 is inverted; the corresponding timing is shown in fig. 7. In the drawing, inversion is a reset control signal, and n is the n-th row pixel region 140 or the n-th row pixel active switch 130 or the n-th row reset active switch 161; as shown, the same line 111 is displayed on the display panel 10 according to the data signal after the previous frame scanning is completed, and the display panel 10 inverts the polarity of the liquid crystal 300 according to the reset data signal at the line on time before the next frame scanning is started.

In another embodiment, the time t 1to the time t2 is a row on time before the current row scan line 111 is turned on, and the time t2 to the time t3 is also a row on time, that is, two row on times are advanced before the current row scan line 111 is turned on, the reset active switch 161 is turned on, and the reset data signal is transmitted to the pixel electrode 150; after the current scan line 111 is turned on, the pixel active switch 130 is turned on to transmit a data signal to the pixel electrode 150; the gate of the corresponding reset active switch 161 is connected to the current row reset control signal line 171, and the current row reset control signal line 171 is turned on two rows earlier than the turn-on time of the current row scan line 111. Compared to the previous embodiment, the embodiment of the present invention advances the on time of the reset active switch 161 corresponding to the reset data signal by two row on times, so that the current row scan line 111 is turned on after the reset active switch 161 is turned off for the next row on time, thereby preventing signal delay, and the pixel active switch 130 is turned on before the reset active switch 161 is not turned off, resulting in insufficient charging of the pixel electrode 150 and color difference.

In another embodiment, the time from t1 to t2 is half the row on time, or the time from t2 to t3 is half the row on time, and half the row on time is enough to discharge the pixel electrode 150, so that the polarity of the liquid crystal 300 molecules can be reversed without affecting the display. The corresponding timing is not limited to the on timing of the scan line 111 only if the reset data signal is transmitted to the pixel electrode 150 before the current scan line 111 is turned on.

In another embodiment, the scan driving circuit 111 is a GOA (Gate on Array) circuit, and the reset control driving circuit 170 is a GOA (Gate on Array) circuit; the driving circuits of the two driving circuits have different turn-on timings, specifically, the scan driving circuit 111 includes a scan frame start signal, and the scan frame start signal controls turn-on of the scan signal; the reset control driving circuit 170 includes a reset frame start signal, and the reset frame start signal controls the start of the reset control signal; the reset frame start signal is started at time t1, and the scan frame start signal is started at time t 3.

In the above, the reset data signal is provided in the following manner:

In an embodiment, the reset data signal is a common voltage signal, and the drain of the reset active switch 161 is connected to the common electrode 210. In each pixel region 140, the drain electrode of the corresponding reset active switch 161 is directly connected to the common line of the array substrate 100, and in general, the common line of the array substrate 100 and the common electrode 210 of the color film substrate 200 are connected together, so in this embodiment, the drain electrode of the reset active switch 161 may be directly connected to the common line, and during the on time of the reset active switch 161, the common electrode 210 provides a common voltage signal to the pixel electrode 150, so that the differential pressure between the pixel electrode 150 and the common electrode 210 is zero, that is, the capacitance between the current pixel electrode 150 and the common line is released, so that the discharge of the pixel unit is completed, and under the condition of zero differential pressure, the liquid crystal 300 molecules are restored to a natural state, and after the next frame is charged, the liquid crystal 300 molecules are deflected again, so as to prevent the polarization effect of the liquid crystal 300 molecules under a certain differential pressure for a long time.

Unlike the previous embodiment, the present application may further provide a reset data signal line 181 running and arranged similar to the data line 121, the display panel 10 further includes a plurality of reset data signal lines 181, the data signal lines are parallel to the data line 121, and the reset data signal line 181 is externally connected to a timing controller. The timing controller provides a reset data signal, where the reset data signal may be either a fixed value or a variable value. The fixed value is that the liquid crystal 300 molecules are deflected to a fixed differential pressure position before the next frame is charged, and the fixed differential pressure position can cause the situation that the absolute value of the offset value of the data voltage in the refresh period is unequal to the absolute value of the offset value of the data voltage in the display period at the moment of deflection, and the gray scale in the refresh period is different from the gray scale in the display period, although the time is extremely short, for some display panels 10 with low brushing requirements, the effect is hardly affected, and a better display effect is pursued, and a variable reset data signal can be selected.

The following embodiments are specific to the following embodiments of the present application, in which the reset data signal offset is a fixed value, and the specific values are selected according to the data signal offset:

In an embodiment, the reset data signal offset value is equal to an absolute value of a maximum value of the data signal offset values. The maximum value of the data signal offset value is the maximum voltage difference between the pixel electrode 150 and the common electrode 210, that is, the maximum offset angle of the liquid crystal 300 molecules, after the display period in each frame is completed, the liquid crystal 300 molecules are applied with the reverse maximum voltage, so that the liquid crystal 300 molecules are deflected to the reverse maximum gray level no matter what gray level value the display period is, for example, the current pixel region 140 is 160 gray levels in the display period, then the reset period is-255 gray levels, and the reverse deflection is realized, so that the liquid crystal 300 molecules can be refreshed in each frame to prevent polarization, and in the embodiment, each frame is reversely deflected to the maximum value, so that the polarization effect is maximally prevented; in addition, according to the principle that the scanning lines 111 are turned on row by row, the reset data signals are turned on and reset row by row through the reset control signals, so that the whole pixel areas 140 in each row are refreshed row by row from top to bottom in each frame, and are not reset and refreshed at the same time point, so that strong human eye reaction is caused, and the effect on the display picture is lower due to the fact that the pixel areas 140 in the scheme are refreshed row by row. The following description is needed: the display period is the current frame scanning signal input and before the reset control signal input, the reset period is the reset control signal input before the next frame scanning signal input.

Specifically, when the data signal is within a voltage value range of 0-7V, the voltage value Vcom of the common voltage signal is in a range of [0V,1V ]; the range of the reset data signal offset value is any value of [0V,7V ], and the range of the data signal offset value is [ -7V,0V ]; or the reset data signal offset value ranges from any one of [ -7v,0v ], and the data signal offset value ranges from [0v,7v ]. For example, the voltage value of the common voltage signal is 0V, the reset data signal is 7V, the data signal is-7V-0V, wherein the offset value of the reset data signal is 7, and the maximum value of the offset value of the data signal is 7; the voltage of the common voltage signal is at the bottom, and the voltage values of the data signal and the reset data signal are also lower, so that the effect of low power consumption is achieved. Conversely, the voltage value of the common voltage signal is 0V, the reset data signal is-7V, and the data signal is 0V-7V, wherein the offset value of the reset data signal is 7, and the maximum value of the offset value of the data signal is 7; is suitable for a display panel 10 with a low refresh rate and has low power consumption.

Of course, it is also possible that the reset data signal offset value ranges from any value of [0v,7v ], so that the absolute value of the reset data signal offset value is not equal to the maximum value of the data signal offset values, for example: the voltage value of the common voltage signal is 0V, the reset data signal is 0V, the data signal is 0V-7V, wherein the offset value of the reset data signal is 0, and the offset value of the data signal is 7; at this time, the offset value of the reset data signal is 0, that is, in the reset period, the liquid crystal 300 molecules recover to a natural state, and the natural state can also avoid polarization; and before the next frame is charged, the residual electric quantity of the previous frame of the pixel electrode 150 is completely released, so that the residual electric quantity of the previous frame does not exist in the pixel capacitor, the next frame is more accurately charged, and the charge quantity of the current frame is not influenced by the residual electric quantity of the previous frame.

In another embodiment, when the data signal takes a value in the range of 7-14V, such as a high refresh display panel 10, a higher data signal voltage is required; specifically, the voltage value Vcom of the common voltage signal ranges from [6V,8V ] to [ -8V, -6V ]; the range of the reset data signal offset value is any value of [0V,7V ], and the range of the data signal offset value is [ -7V,0V ]; or the range of the offset value of the reset data signal is any value of [ -7V,0V ], and the range of the offset value of the data signal is [0V,7V ], wherein the reset data signal can select 0V or 14V. For example, the voltage value Vcom of the common voltage signal is 7V, the voltage value range of the data signal is [7V,14V ], and the voltage value of the reset data signal is 0V. Compared with the voltage value of the reset data signal taking 14V, the power consumption is lower when the voltage value of the reset data signal taking 0V.

As shown in fig. 9, the present application also discloses a driving method of a display panel, including the steps of:

s1: providing a common voltage signal to a common electrode of the display panel;

S2: at time t1, a reset control signal corresponding to the current pixel controls the reset active switch to be turned on, and a reset data signal is provided for the pixel electrode;

S3: at the time t2, the reset control signal controls the reset active switch to be closed;

s4: at time t3, the scanning signal of the scanning line corresponding to the current row of pixels controls the pixel active switch to be turned on, and a data signal is provided for the pixel electrode;

Wherein t1 is more than t2 and less than or equal to t3; the difference value between the voltage value of the reset data signal and the common voltage signal is a reset data signal offset value; the difference between the voltage value of the data signal and the voltage value of the common voltage signal is a data signal offset value; if the data signal offset value is in the interval from zero to positive value; the reset data signal offset value is zero or negative; if the data signal offset value is in the interval from zero to negative value; the reset data signal offset value is zero or positive.

Before the scanning line of the current row of each frame is started, a reset data signal is provided for the pixel electrode, so that the voltage difference between the pixel electrode and the common electrode is a reset data signal offset value at the current time t 2; when the scanning line is turned on at the current time t3, a data signal is input to the pixel electrode, namely, under the condition of normal display, the voltage difference between the pixel electrode and the common electrode is a data signal offset value, and the common electrode and the pixel electrode jointly drive liquid crystal molecules to deflect; and the polarity of the reset data signal offset value is opposite to that of the data signal offset value, namely, after the reset circuit of each frame is started, the polarity of the voltage between the pixel electrode and the common electrode is reversed, so that the deflection of the corresponding liquid crystal molecules is reversed, and one polarity reversal is realized. Compared with the technical scheme of the point inversion, the data signal can always be constant positive or constant negative by reversing the voltage of the data signal from positive to negative or from negative to positive, and the positive and negative data signals are not required to be input when different row scanning lines are started, so that the power consumption is saved, and the problem of afterimage caused by positive and negative changes of the data signal is solved.

Specifically, the value of t2-t1 is equal to the line start time of the scanning signal of the current line scanning line; t3=t2. The row opening time is the time for opening a row of scanning lines, namely, one row opening time is advanced, a reset active switch is opened, and a reset data signal is transmitted to a pixel electrode; after the current scanning line is started, a pixel active switch is turned on, and a data signal is transmitted to a pixel electrode; the grid electrode of the corresponding reset active switch is connected to the current line reset control signal line, and the current line reset control signal line is earlier than the opening time of the current line scanning line by one line opening time.

In another embodiment, the value of t2-t1 is equal to twice the row on time of the scan signal of the current row scan line; the value of t3-t2 is equal to the row on time of the scan signal of the current row scan line. Compared with the previous embodiment, the embodiment advances the on time of the reset active switch corresponding to the reset data signal by two row on times, so that the current row scanning line is turned on after the reset active switch is turned off by one row on time, signal delay is prevented, and before the reset active switch is not turned off, the pixel active switch is turned on, which results in insufficient charging of the pixel electrode and color difference.

It should be noted that, the limitation of each step in the present solution is not to be considered as limiting the sequence of steps on the premise of not affecting the implementation of the specific solution, and the steps written in the previous step may be executed before, or executed after, or even executed simultaneously, so long as the implementation of the present solution is possible, all the steps should be considered as falling within the protection scope of the present application.

The technical scheme of the application can be widely applied to various display panels, such as TN (TWISTED NEMATIC ) display panels, IPS (In-PLANE SWITCHING ) display panels, VA (VERTICAL ALIGNMENT, vertical alignment) display panels, MVA (Multi-Domain VERTICAL ALIGNMENT, multi-quadrant vertical alignment) display panels, and of course, other types of display panels, such as OLED (Organic Light-Emitting Diode) display panels, can be applied to the scheme.

The above description of the application in connection with specific alternative embodiments is further detailed and it is not intended that the application be limited to the specific embodiments disclosed. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the application, and these should be considered to be within the scope of the application.

Claims

1. A display panel, the display panel comprising:

A plurality of columns of data lines for providing data signals;

A plurality of rows of scanning lines for providing scanning signals, wherein the rows of data lines and the rows of scanning lines are intersected to form a plurality of pixel areas;

The pixel active switches are arranged in one-to-one correspondence with the pixel areas, the grid electrodes of the pixel active switches are connected to the scanning lines of the current row, and the source electrodes of the pixel active switches are connected to the data lines of the current column;

the pixel electrode is arranged in the pixel area and is connected with the drain electrode of the pixel active switch;

the pixel electrode is connected with the pixel electrode, and the drain electrode of the reset active switch is connected with a reset data signal;

The grid electrodes of the reset active switches are connected to the reset control signal lines; and

A common electrode for providing a common voltage signal to the display panel;

the difference value between the voltage value of the reset data signal and the voltage value of the common voltage signal is a reset data signal offset value; the difference between the voltage value of the data signal and the voltage value of the common voltage signal is a data signal offset value;

If the data signal offset value is in the interval from zero to positive value; the offset value of the reset data signal is in the interval from zero to negative value;

if the data signal offset value is in the interval from zero to negative value; the offset value of the reset data signal is in the interval from zero to positive value;

wherein the data signal offset value is constant positive or constant negative;

The reset control signal controls the reset active switch to be turned on at a time t1 before the scanning signal of the scanning line of the current line is turned on, and turned off at a time t2 before the scanning signal of the scanning line of the current line is turned on, and the scanning signal of the scanning line of the current line is turned on at a time t3, wherein t1 is more than t2 and less than or equal to t3;

wherein, the difference of t2-t1 is equal to the line opening time of the scanning signal of the scanning line of the current line, t3=t2;

Or the difference value of t2-t1 is equal to twice the line opening time of the scanning signals of the scanning lines of the current line, and the difference value of t3-t2 is equal to the line opening time of the scanning signals of the scanning lines of the current line;

The line on time is the time that a line scan line is on.

2. The display panel of claim 1, wherein the display panel further comprises:

The scanning driving circuit is connected with the scanning line and provides scanning signals for the scanning line; and

The reset control driving circuit is connected with the reset control signal line and provides a reset control signal for the reset control signal line;

The scan driving circuit and the reset control driving circuit are disposed at different sides of the display panel.

3. The display panel of claim 1, wherein the display panel further comprises:

the two scanning driving circuits are respectively arranged at two sides of the display panel, are respectively connected to two ends of the scanning line and simultaneously provide scanning signals for the scanning line; and

The two reset control driving circuits are respectively arranged on two sides of the display panel, are respectively connected to two ends of the reset control signal line and simultaneously provide reset control signals for the reset control signal line.

4. A display panel according to claim 2 or 3, wherein the scan driving circuit comprises a scan frame start signal, the scan frame start signal controlling the turn-on of the scan signal;

The reset control driving circuit comprises a reset frame starting signal, and the reset frame starting signal controls the starting of the reset control signal;

The reset frame start signal is started at a time t1, the scanning frame start signal is started at a time t3, and t1 is smaller than t3.

5. The display panel according to claim 1, wherein the reset control signal line is formed in the same layer as the scan line, and the reset control signal line is disposed at a distance from the scan line.

6. The display panel of claim 1, wherein a source of the reset active switch is connected to the common electrode, and the reset data signal is a common voltage signal of the common electrode.

7. A driving method of a display panel, applied to the display panel according to claim 1, comprising the steps of:

Providing a common voltage signal to a common electrode of the display panel;

wherein t1 is more than t2 and less than or equal to t3; the difference value between the voltage value of the reset data signal and the common voltage signal is a reset data signal offset value; the difference between the voltage value of the data signal and the voltage value of the common voltage signal is a data signal offset value;

If the data signal offset value is in the interval from zero to positive value; the offset value of the reset data signal is in the interval from zero to negative value; if the data signal offset value is in the interval from zero to negative value; the offset value of the reset data signal is in the interval from zero to positive value;

wherein the data signal offset value is constant positive or constant negative;

the difference value of t2-t1 is equal to the line opening time of the scanning signals of the scanning line of the current line, and t3=t2;

The line on time is the time that a line scan line is on.

8. A display device comprising a display panel according to any one of claims 1-6 and a backlight module providing a light source for the display panel.