CN113067565B - Anti-interference short-circuit protection circuit with adjustable blanking time for SiC MOSFET - Google Patents
Anti-interference short-circuit protection circuit with adjustable blanking time for SiC MOSFET Download PDFInfo
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- CN113067565B CN113067565B CN202110216369.6A CN202110216369A CN113067565B CN 113067565 B CN113067565 B CN 113067565B CN 202110216369 A CN202110216369 A CN 202110216369A CN 113067565 B CN113067565 B CN 113067565B
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- 238000012544 monitoring process Methods 0.000 claims abstract description 16
- 238000011084 recovery Methods 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 9
- 230000010355 oscillation Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/165—Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention relates to an anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET, which comprises the following components: the Vds monitoring module is used for monitoring the source drain voltage Vds of the SiC MOSFET; the Vds comparison module is configured to compare the monitored source-drain voltage Vds with a threshold value, and output a logic signal, and further includes: a register module for storing the logic signal; the clock generation module is connected with the register module and used for generating a required working clock signal of the register module; the blanking time configuration module is connected with the register module and used for adjusting the effective digit and the working clock frequency of the register module; and the logic processing module is used for outputting a short-circuit protection signal when a short circuit occurs according to the logic signals stored in the register module. The invention can adjust the blanking time and has stronger anti-interference capability.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to an anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET.
Background
Compared with the traditional Si-IGBT, the SiC-MOSFET has the advantages of high switching speed, high breakdown voltage, high temperature resistance, compact package, high current density and the like, and can be widely applied to the fields of high-frequency high-voltage power converters, such as electric automobiles, photovoltaic inversion, rail transit and the like. At the same time, siC MOSFETs have a faster switching speed and a greater current density, resulting in their short-circuit withstand times being shorter, typically below 3 mus.
The SiC MOSFET short circuit condition is divided into two types, one is that a short circuit has occurred in the power loop before the SiC MOSFET is turned on, the current rises rapidly after the SiC MOSFET is turned on, and the source-drain voltage Vds keeps the bus voltage unchanged, which is called a hard-turn-on short circuit. The other is that a short circuit occurs in the on state after the SiC MOSFET is turned on, and at this time, the source-drain voltage Vds of the SiC MOSFET rapidly rises from the on voltage drop to the bus voltage, and the current also rapidly rises, which is called a load short circuit. If no measures are taken to turn off the SiC MOSFET in time, the power consumption of the SiC MOSFET is rapidly increased under the two short circuit conditions until the SiC MOSFET is burnt.
In order to effectively short-circuit the SiC MOSFET, after a short circuit occurs, it is necessary to quickly detect the short circuit condition and turn the SiC MOSFET off as soon as possible. At present, the conventional desaturation DESAT (Desaturation) scheme commonly used by Si-IGBT is still widely used for the short-circuit protection problem of SiC MOSFET. The idea of the desaturation protection scheme is to monitor the SiC MOSFET source drain voltage Vds, compare the source drain voltage Vds to a reference voltage, which is typically set to a value higher than the device turn-on voltage drop; the source-drain voltage Vds should be lower than the reference voltage when the SiC MOSFET is normally on or conducting, as shown in fig. 1. The basic working principle of the desaturation protection scheme is as follows: for the hard-on short condition (as shown in fig. 2), after the SiC MOSFET gate drive signal (v_drive_logic) is pulled high, after a fixed blanking time, it is detected whether the source drain voltage Vds drops below the threshold voltage. If the source drain voltage Vds is reduced below the threshold voltage, judging that the SiC MOSFET is normally started; if the source drain voltage Vds does not drop to the threshold voltage, the hard-on short circuit of the SiC MOSFET is judged, meanwhile, a short circuit signal is fed back to the protection circuit, and the SiC MOSFET is turned off. For a load short circuit condition (as shown in fig. 3), after the SiC MOSFET is turned on, it is monitored whether the source-drain voltage Vds is below a threshold voltage. If the source-drain voltage Vds is below the threshold voltage, determining that the SiC MOSFET works in a normal conduction state; if the source-drain voltage Vds exceeds the threshold voltage, the SiC MOSFET is judged to have load short circuit, and meanwhile, a short circuit signal is fed back to the protection circuit to turn off the SiC MOSFET.
The blanking time determines the detection delay of the desaturation short circuit protection scheme for both short circuit conditions. The delay is too short, and the protection circuit is easy to trigger by mistake; the delay is too long to effectively protect the SiC MOSFET. The blanking time of the current desaturation short-circuit protection scheme is set by charging the capacitor to the threshold voltage by the current source, i.e. the blanking time isWherein C is DESAT To blank the capacitance value, V DESAT_TH To protect the threshold reference voltage, I DESAT To charge the blanking capacitor with a current value, a conventional desaturation circuit is shown in fig. 4. There are several problems here: first, blanking timeThe time is long, and the influence of a current source error and a capacitance value error is large, so that the accurate setting is difficult; secondly, a blanking capacitor outside the chip is needed, so that the desaturation protection scheme is difficult to integrate with a single chip, thirdly, the anti-interference capability is poor, and if the source drain voltage Vds oscillates, erroneous judgment can be caused. Compared with the traditional Si-IGBT, the SiC MOSFET has high switching speed and obvious switching oscillation, so that the desaturation scheme cannot be fully applied to the SiC MOSFET.
Disclosure of Invention
The invention aims to solve the technical problem of providing an anti-interference short-circuit protection circuit with adjustable blanking time aiming at a SiC MOSFET, which can adjust the blanking time and has stronger anti-interference capability.
The technical scheme adopted for solving the technical problems is as follows: provided is an anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET, comprising: the Vds monitoring module is used for monitoring the source drain voltage Vds of the SiC MOSFET; the Vds comparison module is configured to compare the monitored source-drain voltage Vds with a threshold value, and output a logic signal, and further includes: a register module for storing the logic signal; the clock generation module is connected with the register module and used for generating a required working clock signal of the register module; the blanking time configuration module is connected with the register module and used for adjusting the effective digit and the working clock frequency of the register module; and the logic processing module is used for outputting a short-circuit protection signal when a short circuit occurs according to the logic signals stored in the register module.
The Vds monitoring module comprises a fast recovery high-voltage diode and a current source, wherein the cathode of the fast recovery high-voltage diode is connected with the drain electrode of the SiC MOSFET to be monitored, and the anode of the fast recovery high-voltage diode is connected with the current source.
The Vds comparison module is a comparator, a first input end of the comparator is connected with the output end of the Vds monitoring module, a second input end of the comparator is connected with the threshold signal end, and the output end of the comparator is connected with the register module.
The register module adopts an N-bit serial shift register.
The clock generation module is realized by adopting an oscillator.
The logic processing module adopts a digital chip or a logic circuit to realize logic control.
Advantageous effects
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: the invention realizes the adjustment of the blanking time by adding the blanking time configuration module, the register module and the clock generation module and changing the number of bits of the register and the frequency of the working clock, and meanwhile, as the SiC MOSFET is judged whether to have short circuit or not according to the monitoring result of the source drain voltage Vds of n clock periods, the influence of the oscillation of the source drain voltage Vds on the protection circuit can be reduced.
Drawings
FIG. 1 is a normal switching waveform diagram of a SiC MOSFET;
FIG. 2 is a schematic diagram of a hard-on short circuit condition for a SiC MOSFET;
FIG. 3 is a schematic diagram of a SiC MOSFET load short circuit condition;
FIG. 4 is a circuit diagram of a conventional DESAT protection circuit structure;
FIG. 5 is a block diagram of the structure of an embodiment of the present invention;
FIG. 6 is a circuit implementation diagram of an embodiment of the present invention;
FIG. 7 is a diagram of register data during normal switching of an embodiment of the present invention;
FIG. 8 is a diagram of register data when a hard-on occurs at the time of on in an embodiment of the present invention;
fig. 9 is a schematic diagram of register data when a load short occurs after the start of the embodiment of the present invention.
Detailed Description
The invention will be further illustrated with reference to specific examples. It is to be understood that these examples are illustrative of the present invention and are not intended to limit the scope of the present invention. Further, it is understood that various changes and modifications may be made by those skilled in the art after reading the teachings of the present invention, and such equivalents are intended to fall within the scope of the claims appended hereto.
The embodiment of the invention relates to an anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET, which comprises a Vds monitoring module, a Vds comparison module, a register module and a logic processing module which are connected in sequence as shown in figure 5. The register module is also connected with the clock generation module and the blanking time configuration module.
As shown in fig. 6, the Vds monitoring module is configured to monitor the source-drain voltage Vds of the SiC MOSFET, and may include a fast recovery high voltage diode, where a cathode of the fast recovery high voltage diode is connected to a drain of the SiC MOSFET to be monitored, and an anode of the fast recovery high voltage diode is connected to the current source. The fast recovery high-voltage diode can be formed by equivalent series connection of a plurality of diodes, and the reverse breakdown voltage of the fast recovery high-voltage diode is higher than the rated voltage of the SiC MOSFET to be monitored.
And the Vds comparison module is used for comparing the monitored source-drain voltage Vds with a threshold value and outputting a logic signal, and can be realized through a comparator, wherein the non-inverting input end of the comparator is connected with the output end of the Vds monitoring module, the inverting input end of the comparator is connected with the threshold value signal end, and the output end of the comparator is connected with the register module, so that when the source-drain voltage Vds is smaller than the threshold value, the output of the output end of the comparator is 0, and when the source-drain voltage Vds is larger than the threshold value, the output of the output end of the comparator is 1.
And the register module is used for storing the logic signals. The register module in this embodiment may adopt an 8-bit serial shift register, and when the effective bit number of the 8-bit serial shift register is 8 bits, the register module may store the logic signal output by the Vds comparison module with 8 clock cycles, so when the source-drain voltage Vds oscillates, the register module may not directly output a short-circuit signal, and has a stronger anti-interference capability. In the initial state, the initial values of the register modules in the present embodiment are all 0.
And the clock generation module is used for generating a required working clock signal of the register module, and can be realized by adopting an oscillator.
A blanking time configuration module for adjusting the effective bit number and the working clock frequency of the register module by adjusting the existence of the register moduleThe number of significands and the operating clock frequency can be adjusted to eliminate time. Blanking time t of the short-circuit protection circuit of the present embodiment blanking ＝n×T clk Wherein n is the number of valid bits of the register module, T clk Is the operating clock frequency of the register module.
And the logic processing module is used for outputting a short-circuit protection signal when a short circuit occurs according to the logic signals stored in the register module. The logic processing module may adopt a digital chip to realize logic control, or may adopt a logic circuit to realize logic control, in this embodiment, an and gate is adopted, and the input ends of the and gate are respectively connected with 8 output ends of the 8-bit serial shift register, so that the and gate outputs a short-circuit protection signal only when all n significant digits of the 8-bit serial shift register are 1.
The working principle of the present invention will be described below in terms of one switching process of a SiC MOSFET. First, the logic signal of the driving circuit is pulled up, the grid voltage of the SiC MOSFET is gradually increased, the source drain voltage Vds is reduced, and the device starts to be started. The comparator receives the monitored source-drain voltage Vds of the SiC MOSFET, and when the source-drain voltage Vds is higher than a threshold value, the comparator outputs 1; when the source-drain voltage Vds is below the threshold, the comparator output is 0. After the logic signal of the driving circuit is pulled high, the output value of the comparator starts to be read once every other clock cycle, and the data is moved into the register for storage. After 8 clock cycles, if the register value is all 1, it indicates that the source-drain voltage Vds does not normally drop, a hard-on short circuit occurs, and a short circuit signal is output, as shown in fig. 8. After 8 clock cycles, if the register value is not all 1, the Vds is normally reduced, and the SiC MOSFET is normally opened. Secondly, after the SiC MOSFET is normally turned on, the source drain voltage Vds is reduced to be lower than the conduction voltage drop of the threshold value of the comparator, and the output of the comparator is 0, the register reads all 0, so that the SiC MOSFET is normally turned on; if the source-drain voltage Vds has a large-amplitude on oscillation, the comparator alternately outputs a high-low level, and the register is read into 010101, so that the register is not all 1, and thus a short-circuit signal is not output. If the SiC MOSFET is in a load short circuit condition during the on process, the source drain voltage Vds rises rapidly to the bus voltage, the comparator output is high, after 8 clock cycles, the register reads all 1 s, and a short circuit signal is output, as shown in fig. 9. Therefore, the circuit can effectively detect the hard-start short circuit and load short circuit condition, and reduce the interference of the source drain voltage Vds start oscillation to the short circuit protection circuit. Finally, the logic signal of the driving circuit is pulled down, the SiC MOSFET device is turned off, the register is all set to 0, and the protection process is finished. Fig. 7,8, and 9 depict waveforms of register data changes for three conditions of normal switching, hard-on shorting, and load shorting, respectively.
By analyzing the switching process of the SiC MOSFET, the blanking time t of the short-circuit protection circuit can be seen blanking ＝8×T clk The blanking time can be adjusted by changing the number of register bits and the operating clock frequency if necessary. Meanwhile, whether the SiC MOSFET is short-circuited is judged according to the monitoring result of the source-drain voltage Vds of 8 clock cycles, so that the influence of Vds oscillation on a protection circuit can be reduced.
It is easy to find that the invention realizes the adjustment of the blanking time by adding the blanking time configuration module, the register module and the clock generation module and changing the number of bits of the register and the frequency of the working clock, and meanwhile, as judging whether the SiC MOSFET is short-circuited or not according to the monitoring result of the source drain voltage Vds of n clock cycles, the influence of the source drain voltage Vds oscillation on the protection circuit can be reduced.
Claims (5)
1. An anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET, comprising: the Vds monitoring module is used for monitoring the source drain voltage Vds of the SiC MOSFET; the Vds comparison module is configured to compare the monitored source-drain voltage Vds with a threshold value, and output a logic signal, and is characterized by further comprising: a register module for storing the logic signal; the clock generation module is connected with the register module and used for generating a required working clock signal of the register module; the blanking time configuration module is connected with the register module and used for adjusting the effective digit and the working clock frequency of the register module; the logic processing module is used for outputting a short-circuit protection signal when a short circuit occurs according to the logic signals stored in the register module; the register module adopts an N-bit serial shift register.
2. The anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET according to claim 1, wherein the Vds monitoring module comprises a fast recovery high voltage diode and a current source, a cathode of the fast recovery high voltage diode is connected with a drain of the SiC MOSFET to be monitored, and an anode of the fast recovery high voltage diode is connected with the current source.
3. The anti-interference short-circuit protection circuit with adjustable blanking time for a SiC MOSFET according to claim 1, wherein the Vds comparison module is a comparator, a first input end of the comparator is connected with an output end of the Vds monitoring module, a second input end of the comparator is connected with a threshold signal end, and an output end of the comparator is connected with the register module.
4. The anti-interference short-circuit protection circuit with adjustable blanking time for SiC MOSFETs according to claim 1, wherein the clock generation module is implemented with an oscillator.
5. The anti-interference short-circuit protection circuit with adjustable blanking time for SiC MOSFETs according to claim 1, wherein the logic processing module implements logic control using a digital chip or a logic circuit.
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| CN202110216369.6A CN113067565B (en) | 2021-02-26 | 2021-02-26 | Anti-interference short-circuit protection circuit with adjustable blanking time for SiC MOSFET |
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| CN202110216369.6A CN113067565B (en) | 2021-02-26 | 2021-02-26 | Anti-interference short-circuit protection circuit with adjustable blanking time for SiC MOSFET |
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| CN113067565B true CN113067565B (en) | 2024-03-12 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113659827B (en) * | 2021-08-20 | 2023-05-26 | 深圳市优联半导体有限公司 | Improved circuit for self-adaptive desaturation protection of blanking time, design method and application |
| WO2024158696A1 (en) * | 2023-01-23 | 2024-08-02 | Tae Power Solutions, Llc | Systems, devices, and methods for short-circuit detection for low voltage semiconductor switch-based converters |
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| US9397597B2 (en) * | 2013-07-29 | 2016-07-19 | Texas Instruments Incorporated | Sensed motor winding current adapting blanking period between max/min values |
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| CN111656686A (en) * | 2018-01-30 | 2020-09-11 | 西门子股份公司 | Protection of field effect transistors operating in switched mode against overload currents |
| CN111244883A (en) * | 2020-02-20 | 2020-06-05 | 南京航空航天大学 | SiC MOSFET short-circuit protection circuit and protection method for comprehensively comparing grid charge and voltage |
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