CN112671428B - Multichannel radio frequency signal receiving and transmitting amplitude-phase control device - Google Patents
Multichannel radio frequency signal receiving and transmitting amplitude-phase control device Download PDFInfo
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Abstract
A multichannel radio frequency signal receiving and sending amplitude-phase control device utilizes a multichannel digital-to-analog converter to convert a digital control signal into amplitude-phase control signals of L channels, and a passive vector modulator of each channel performs amplitude-phase adjustment on the radio frequency signal input into the passive vector modulator according to the amplitude-phase control signal of the corresponding channel; when the power divider/synthesizer is in a radio frequency signal sending mode, dividing the first radio frequency signal into L paths of second radio frequency signals and sending the second radio frequency signals into L channels; the passive vector modulator of each channel performs amplitude phase adjustment on the second radio frequency signal to generate a third radio frequency signal, and the third radio frequency signal is transmitted by the antenna unit after passing through the first amplifier under the control of the switch unit; when the antenna unit of each channel is in a radio frequency signal receiving mode, the antenna unit of each channel receives a fourth radio frequency signal, the fourth radio frequency signal is sent to the passive vector modulator through the second amplifier under the control of the switch unit to be subjected to amplitude phase adjustment to generate a fifth radio frequency signal, and the power divider/combiner combines the L fifth radio frequency signals into one path.
Description
Technical Field
The invention belongs to the technical field of radio frequency signal receiving and transmitting and integrated circuit design, and relates to a multichannel radio frequency signal receiving and transmitting amplitude-phase control device.
Background
The multichannel radio frequency signal receiving and transmitting component is commonly used for a wireless communication or radar system, and the transmitting power and the angle of a radio frequency signal can be adjusted by controlling the amplitude and the phase of the receiving and transmitting component. At present, a plurality of integrated circuits are mostly adopted to realize the amplitude and phase control function of a multichannel radio frequency signal transceiving component, and the main defects are large size, low transceiving switching speed (us level), low precision (less than 6 bits), large power consumption and low efficiency, so that the component is limited in certain specific application scenes.
Disclosure of Invention
Aiming at the defects of the traditional amplitude-phase control scheme for realizing the multichannel radio-frequency signal transceiving component by adopting an integrated circuit in the aspects of volume, speed, precision, power consumption, efficiency and the like, the invention provides the multichannel radio-frequency signal transceiving amplitude-phase control device which can be integrated in a chip so as to realize miniaturization of the component.
In order to realize the purpose of the invention, the technical scheme is as follows:
a multi-channel radio frequency signal receiving and transmitting amplitude-phase control device comprises a power divider/synthesizer, a multi-channel digital-to-analog converter and L channels, wherein L is a positive integer greater than 1, and each channel comprises a passive vector modulator, a switch unit, a first amplifier, a second amplifier and an antenna unit; the multi-channel digital-to-analog converter is used for converting the digital control signal to obtain an amplitude-phase control signal of the L channels, and the passive vector modulator of each channel adjusts the amplitude and the phase of the radio-frequency signal input into the passive vector modulator according to the amplitude-phase control signal of the corresponding channel generated by the multi-channel digital-to-analog converter;
when the multichannel radio-frequency signal receiving and transmitting amplitude-phase control device is in a radio-frequency signal transmitting mode, the power divider/synthesizer divides a first radio-frequency signal into L paths of second radio-frequency signals with equal power and then respectively sends the second radio-frequency signals into the L channels; in each channel, the passive vector modulator adjusts the amplitude and the phase of the second radio frequency signal to generate a third radio frequency signal, and the third radio frequency signal is amplified by the first amplifier and then sent by the antenna unit under the control of the switch unit;
when the multichannel radio-frequency signal receiving and transmitting amplitude-phase control device is in a radio-frequency signal receiving mode, the antenna unit receives a fourth radio-frequency signal in each channel, and the fourth radio-frequency signal is amplified by the second amplifier under the control of the switch unit and then sent into the passive vector modulator to be subjected to amplitude and phase adjustment and generate a fifth radio-frequency signal; and the power divider/synthesizer synthesizes the L fifth radio-frequency signals generated by the L channels into one path.
Specifically, in each channel, the switch unit includes a first single-pole double-throw switch and a second single-pole double-throw switch, a first connection end of the first single-pole double-throw switch is connected to a first connection end of the passive vector modulator, a second connection end of the first single-pole double-throw switch is connected to an input end of the first amplifier, and a third connection end of the first single-pole double-throw switch is connected to an output end of the second amplifier; the first connecting end of the second single-pole double-throw switch is connected with the first connecting end of the antenna unit, the second connecting end of the second single-pole double-throw switch is connected with the output end of the first amplifier, and the third connecting end of the second single-pole double-throw switch is connected with the input end of the second amplifier;
when the multichannel radio-frequency signal transceiving amplitude-phase control device is in a radio-frequency signal transmitting mode, a second connecting end of the passive vector modulator is connected with the second radio-frequency signal, and a first connecting end of the passive vector modulator outputs the third radio-frequency signal; the first connection end and the second connection end of the first single-pole double-throw switch are connected, the first connection end and the second connection end of the second single-pole double-throw switch are connected, and the first amplifier works; the second connecting end of the antenna unit transmits a signal obtained by amplifying the third radio frequency signal by the first amplifier;
when the multichannel radio-frequency signal receiving-transmitting amplitude-phase control device is in a radio-frequency signal receiving mode, the second connecting end of the antenna unit receives the fourth radio-frequency signal, the first connecting end and the third connecting end of the first single-pole double-throw switch are connected, the first connecting end and the third connecting end of the second single-pole double-throw switch are connected, and the second amplifier works; and the first connecting end of the passive vector modulator receives the fourth radio-frequency signal which is amplified by the second amplifier, and the second connecting end of the passive vector modulator outputs the fifth radio-frequency signal.
Specifically, the passive vector modulator includes a coupler, a bi-phase modulator, an attenuator, and an in-phase combiner, where the coupler is configured to divide an input radio frequency signal of the passive vector modulator into two equal-amplitude orthogonal signals, the bi-phase modulator and the attenuator convert the two signals output by the coupler according to an amplitude-phase control signal of a channel generated by the multi-channel digital-to-analog converter to obtain four signals whose phases are different by 90 ° and whose amplitudes are adjusted, and the in-phase combiner is configured to vector-add the four signals whose phases are different by 90 ° and whose amplitudes are adjusted to obtain an output radio frequency signal of the passive vector modulator whose amplitudes and phases are continuously adjustable.
Specifically, the multi-channel digital-to-analog converter comprises a digital signal receiving and processing module, a level conversion module, a calibration module and a digital-to-analog conversion module;
the digital signal receiving and processing module is used for receiving the M-bit binary digital control signal and decoding the M-bit binary digital control signal to obtain N decoded digital signals, wherein M and N are positive integers greater than 1, and N is greater than M;
the level conversion module is used for receiving an internal reference voltage and the N decoding digital signals and converting the internal reference voltage into N sub-reference levels according to the N decoding digital signals;
the digital-analog conversion module comprises N DAC data registers, N R-2R resistance networks and N current-voltage conversion units;
the digital signal receiving and processing module stores the digital control signal into one DAC data register after receiving the digital control signal every time, and N DAC data registers respectively store the digital control signal received by the digital signal receiving and processing module for N times;
the N DAC data registers respectively output the digital control signals stored in the DAC data registers to the N R-2R resistance networks; each R-2R resistance network is used for converting one sub-reference level into corresponding output current according to the digital control signal, and then N R-2R resistance networks respectively convert N sub-reference levels into corresponding output currents;
the N current-voltage conversion units are respectively used for converting output currents of the N R-2R resistance networks into corresponding output voltages, and the N current-voltage conversion units generate 4L output voltages as amplitude-phase control signals of the L channels;
the calibration module is used for calibrating the multi-channel digital-to-analog converter, and comprises gain calibration and offset calibration.
Specifically, the current-voltage conversion unit includes a transimpedance amplifier, an input end of the transimpedance amplifier is connected to the output current of the R-2R resistor network, and an output end thereof generates a corresponding output voltage; when the R-2R resistance network generates a plurality of output currents, the current-voltage conversion unit is provided with a corresponding number of trans-impedance amplifiers, and each output current generated by the R-2R resistance network is converted into a corresponding output voltage.
Specifically, the power divider/synthesizer, the passive vector modulator, the switch unit, the first amplifier and the second amplifier are all monolithic integrated circuits adopting a GaAs pHEMT process, the antenna unit adopts a PCB patch antenna, and the multi-channel digital-to-analog converter adopts a CMOS process.
Specifically, the power divider/synthesizer, the multi-channel digital-to-analog converter, the passive vector modulator, the switch unit, the first amplifier, the second amplifier and the antenna unit in the L channels are bonded to the multi-layer microwave board in a bare chip mode, each bare chip is connected with the microwave board through a micro-assembly process by using a gold wire, and all the bare chips and the microwave board are packaged by using a metal cavity and a cover plate.
The invention has the beneficial effects that: the multichannel radio-frequency signal transceiving amplitude-phase control device provided by the invention can realize the multichannel digital-to-analog converter and the passive vector modulator in a single-chip mode, so that the volume and the power consumption of a multichannel radio-frequency signal transceiving component are greatly reduced; the control of the amplitude and the phase of the radio frequency signals of a plurality of channels can be realized; the multi-channel digital-to-analog converter used by the invention is designed and manufactured by adopting a high-speed circuit, the digital-to-analog conversion resolution can be up to 12 bits, the amplitude-phase high-resolution control is realized, and the radio-frequency signal receiving and transmitting function and the beam pointing high-speed switching can be realized.
Drawings
The following description of various embodiments of the invention may be better understood with reference to the following drawings, which schematically illustrate major features of some embodiments of the invention. These figures and examples provide some embodiments of the invention in a non-limiting, non-exhaustive manner. For purposes of clarity, the same reference numbers will be used in different drawings to identify the same or similar elements or structures having the same function.
Fig. 1 is a block diagram of a multi-channel rf signal transmit-receive amplitude-phase control device according to the present invention.
Fig. 2 is a block diagram of an implementation adopted by a multi-channel digital-to-analog converter in a multi-channel rf signal transmit-receive amplitude-phase control device according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the multichannel rf signal transmit-receive amplitude-phase control apparatus provided by the present invention includes a power divider/synthesizer, a multichannel digital-to-analog converter, and L channels, where L is a positive integer greater than 1. The multi-channel digital-to-analog converter is used for converting an externally input digital control signal to obtain an amplitude-phase control signal of the L channels, and the amplitude-phase control signals of the L channels generated by the multi-channel digital-to-analog converter can be different, so that different amplitude and phase control can be performed on radio-frequency signals in the L channels. Each channel comprises a passive vector modulator, a switch unit, a first amplifier, a second amplifier and an antenna unit, and amplitude and phase control signals of L channels generated by the multi-channel digital-to-analog converter realize amplitude and phase adjustment of radio frequency signals through the passive vector modulators in the channels.
The power divider/synthesizer can be used as a power divider for dividing radio frequency signal energy into multiple paths of energy with equal output, or used as a power synthesizer for combining the multiple paths of radio frequency signal energy into one path of energy for output, and the energy is determined according to a corresponding working mode; the switch unit is also used for controlling the first amplifier or the second amplifier to work according to different working modes. As shown in fig. 1, in some embodiments, the switch unit in each channel includes a first single-pole double-throw switch and a second single-pole double-throw switch, a first connection terminal of the first single-pole double-throw switch is connected to the first connection terminal of the passive vector modulator, a second connection terminal thereof is connected to the input terminal of the first amplifier, and a third connection terminal thereof is connected to the output terminal of the second amplifier; the first connection end of the second single-pole double-throw switch is connected with the first connection end of the antenna unit, the second connection end of the second single-pole double-throw switch is connected with the output end of the first amplifier, and the third connection end of the second single-pole double-throw switch is connected with the input end of the second amplifier. The time-sharing conduction path switching of the radio frequency transceiving signals is realized through the control of the single-pole double-throw switch, the single-pole double-throw switch can adopt an absorption type single-pole multi-throw switch chip, the number of switch channels is determined by the number of rear-stage antenna units, the switching speed is less than 4Ls, the chip is manufactured by adopting a GaAs pHEMT process, and the power of the input P1dB is high. The first amplifier can adopt a power amplifier chip and is used for providing amplification for the radio frequency transmission signal; the second amplifier may employ a low noise amplifier chip for providing low noise figure amplification of the rf receive signal. The antenna unit is used for providing electric and magnetic conversion for radio frequency transceiving signals, can be printed on a circuit board in a microstrip transmission line patch mode, and is connected with the single-pole double-throw switch unit through a microstrip transmission line to convert the electric signals into electromagnetic waves.
When the multi-channel radio-frequency signal receiving and transmitting amplitude-phase control device is in a radio-frequency signal transmitting mode, the transmission direction of radio-frequency signals in the structure of fig. 1 is input from the power divider/combiner on the left side and output from the antenna unit on the right side; firstly, realizing power distribution function by a power distribution/synthesizer, dividing a first radio frequency signal into L paths of second radio frequency signals with equal power, and then respectively sending the second radio frequency signals into L channels; and then in each channel, a second connecting end of the passive vector modulator is connected with a second radio-frequency signal, the passive vector modulator adjusts the amplitude and the phase of the second radio-frequency signal to generate a third radio-frequency signal and outputs the third radio-frequency signal from a first connecting end of the passive vector modulator, finally, the first connecting end and the second connecting end of the first single-pole double-throw switch are connected by using the control of the switch unit, the first connecting end and the second connecting end of the second single-pole double-throw switch are connected to enable the first amplifier to work, the third radio-frequency signal is amplified by the first amplifier and output to the first connecting end of the antenna unit, and the signal of the third radio-frequency signal after being amplified by the first amplifier is sent out from the second connecting end of the antenna unit.
When the multi-channel radio-frequency signal receiving-transmitting amplitude-phase control device is in a radio-frequency signal receiving mode, the transmission direction of radio-frequency signals in the structure of fig. 1 is that the radio-frequency signals are input from the antenna unit on the right side and output from the power divider/synthesizer on the left side; firstly, in each channel, receiving a fourth radio frequency signal by a second connecting end of an antenna unit, then connecting a first connecting end and a third connecting end of a first single-pole double-throw switch by using the control of a switch unit, connecting the first connecting end and the third connecting end of a second single-pole double-throw switch so as to enable a second amplifier to work, sending the fourth radio frequency signal received by the antenna unit into a second amplifier from the first connecting end of the antenna unit for amplification, connecting the amplified radio frequency signal to the first connecting end of a passive vector modulator, and generating a fifth radio frequency signal after amplitude and phase adjustment in the passive vector modulator and outputting the fifth radio frequency signal from the second connecting end of the passive vector modulator; and finally, realizing a power synthesis function by a power distributor/synthesizer, and synthesizing the L fifth radio-frequency signals generated by the L channels into one path.
The passive vector modulator is used for controlling the amplitude and the phase of the radio frequency signal input into the passive vector modulator, dividing the radio frequency signal input into the passive vector modulator into equal parts in quadrature, and obtaining an amplitude-modulated and phase-modulated radio frequency output signal through in-phase synthesis after amplitude modulation, wherein the amplitude-modulated and phase-modulated error of the radio frequency signal is minimum. In some embodiments, the passive vector modulator adopts an I-Q modulation principle, can realize the phase adjustment within the range of 0-360 degrees and the amplitude adjustment larger than 30dB on the radio frequency signal which is randomly input into the passive vector modulator, and comprises a coupler, a bi-phase modulator, an attenuator and an in-phase combiner; the coupler can adopt a Lange coupler, a radio frequency signal input into the passive vector modulator is divided into two paths of equal-amplitude orthogonal I and Q signals by the 3dB orthogonal Lange coupler, the two paths of I and Q signals are respectively converted by the two-phase modulator and the attenuator to obtain I, I 'and Q' four signals, signals with 90-degree phase difference and adjusted amplitude are obtained according to the amplitude control signal (the amplitude control signal comprises I, I 'and Q' four amplitude control signals) of the channel, and finally the four signals with 90-degree phase difference and adjusted amplitude are subjected to vector addition by the in-phase combiner to obtain the output radio frequency signal of the passive vector modulator with continuously adjustable amplitude and phase.
The multi-channel digital-to-analog converter is used for generating amplitude and phase control signals of L channels according to digital control signals input from the outside, in the embodiment, the passive vector modulator divides radio-frequency signals input into the multi-channel digital-to-analog converter into I, I ', Q and Q', and each channel has the corresponding amplitude and phase control signal, so that the multi-channel digital-to-analog converter needs to generate 4L amplitude and phase control signals. Taking L =4 as an example, the multi-channel digital-to-analog converter needs to generate 16 amplitude-phase control signals, i.e., the multi-channel digital-to-analog converter needs to have at least 16 channels.
As shown in fig. 2, an implementation structure of a multi-channel digital-to-analog converter is provided, which includes a digital signal receiving and processing module, a level conversion module, a calibration module, and a digital-to-analog conversion module; the digital signal receiving and processing module is used for receiving M-bit binary digital control signals and decoding the M-bit binary digital control signals to obtain N decoded digital signals, the resolution of the digital control signals is K bits, K, M and N are both positive integers greater than 1, and N is greater than M.
In some embodiments, the digital signal receiving and processing module uses a Serial Peripheral Interface 2 (SPI Interface) for communication, and the Serial Peripheral Interface 2 is a high-speed full-duplex synchronous communication bus, and uses a 4-wire Interface for communication to receive a 4-bit binary digital control signal, thereby saving the system volume and improving the communication rate. The multi-channel digital-to-analog converter provided by this embodiment can provide an amplitude-phase control function for 4 radio frequency channels, and the serial peripheral interface 2 can save the number of communication lines in the system, and the resolution of the 4-bit binary digital control signal is set to 12 bits, that is, M =4, and K = 12. In another embodiment, the digital signal receiving and processing module may use the decoder 3 to convert the 4-bit binary digital control signal into 16 decoded digital signals, N =16, where the 16 decoded digital signals are used to control the level converting module 4 to convert the internal reference voltage into 16 sub-reference levels for controlling all digital circuits in the chip. The digital signal receiving and processing module acquires the digital control signal for multiple times according to the frame length.
The level conversion module 4 is used for receiving the internal reference voltage and the N decoding digital signals generated by the digital signal receiving and processing module, and converting the internal reference voltage into N sub-reference levels according to the N decoding digital signals; if the decoder 3 converts the 4-bit binary digital control signal into 16 decoded digital signals in this embodiment, the level conversion module 4 correspondingly converts the internal reference voltage into 16 sub-reference levels, for example, the 16 sub-reference levels can be evenly distributed between 0 to 1.6V; these 16 sub-reference levels can provide the required levels for the gain calibration circuit 6, the R-2R resistor network 8 and the offset calibration circuit 9 in the subsequent stage for gain, offset calibration and digital-to-analog conversion.
The internal reference voltage can be generated by providing a reference voltage processing module 1, the reference voltage processing module 1 comprising a buffer amplifier having an input terminal connected to an external input reference voltage and an output terminal generating a stable internal reference voltage with sufficient driving capability. In some embodiments, the buffer amplifier can be implemented by a unity gain amplifier, which can play a better isolation role; the buffer amplifier can be of a two-stage structure, the first stage adopts a common source differential pair folded structure, and the second stage adopts a common source common gate structure to provide larger gain. The internal reference voltage is used for providing all reference levels for the chip, the reference voltage processing module 1 can provide enough driving capability for the internal reference voltage, and can better protect internal signals when input signals have interference, so that the anti-interference capability of the chip is improved.
The Digital-to-Analog conversion module (Digital-to-Analog Converter) comprises N DAC data registers 7, N R-2R resistor networks 8 and N current-voltage conversion units 11, wherein the current-voltage conversion units 11 are combined with the DAC data registers 7 and the R-2R resistor networks 8 to realize rapid conversion of beams.
The DAC data register 7 is configured to store the digital control signal received by the digital signal receiving and processing module and output the digital control signal to the R-2R resistor network, for example, in this embodiment, the DAC data register 7 stores the digital signal of the 12-bit DAC received by the serial peripheral interface 2, the digital signal is stored in one DAC data register 7 every time the serial peripheral interface 2 receives the digital signal, and the digital signal is stored in 16 DAC data registers 7 after the serial peripheral interface 2 receives the digital signal for 16 times.
The R-2R resistor network 8 is configured to convert one sub-reference level into a corresponding output current according to the digital control signal stored in the DAC data register 7, in this embodiment, 16 DAC data registers 7 are respectively output to the 16R-2R resistor networks 8, and the 16R-2R resistor networks 8 respectively convert the 16 sub-reference levels into corresponding output currents. The working process of the single R-2R resistor network 8 is that a sub-reference level is divided into a plurality of potentials, for example, the sub-reference level can be divided into 1024 potentials which are distributed between 0-1.6V, and one or more potentials are selected from the 1024 potentials to generate corresponding output current.
The current-voltage conversion unit is used for converting the output current of the R-2R resistor network into corresponding output voltage and using the output voltage as an analog output signal of the multi-channel digital-to-analog converter; since the R-2R resistance network 8 divides the sub-reference level into 1024 potentials distributed between 0V and 1.6V, the current-voltage conversion unit can realize the output of analog voltage within 0V to 1.6V.
When the R-2R resistor network 8 generates a plurality of output currents, the current-voltage conversion unit 11 also has a corresponding number of transimpedance amplifiers, so as to convert each output current generated by the R-2R resistor network into a corresponding output voltage, and the transimpedance amplifiers function to convert a preceding-stage current signal into a voltage signal, and have a high conversion speed, and can complete conversion within 100 Ls. As shown in fig. 2, one R-2R resistor network generates 2 output currents, and one current-voltage conversion unit includes two transimpedance amplifiers TIA-a and TIA-B that convert the 2 output currents of the R-2R resistor network into 2 output voltages VOUT _ a and VOUT _ B, respectively. When the multi-channel digital-to-analog converter is used for amplitude-phase control of 4 radio frequency channels, 16 amplitude-phase control signals are needed for the 4 radio frequency channels, N =8 and 8R-2R resistor networks are enabled to respectively generate two output currents, one current-voltage conversion unit is provided with two transimpedance amplifiers to generate two corresponding output voltages VOUT _ A and VOUT _ B, and the output voltages VOUT _ A and VOUT _ B are set to be in opposite phases, so that the output voltages VOUT _ A and VOUT _ B can be used for amplitude-phase control of two paths I and I 'or amplitude-phase control of two paths Q and Q'. I. The four paths of I 'and Q, Q' all contain the amplitude and phase signal control of the input signal, and the phase and amplitude control of the input radio frequency signal of the passive vector modulator is formed by combining the four signals.
The calibration module is used for calibrating the multi-channel digital-to-analog converter, and comprises gain calibration and offset calibration. As shown in fig. 2, the gain calibration of the calibration module is implemented by using the second otp memory unit 5 and the gain calibration circuit 6, in this embodiment, the 6-bit e-fuse unit (i.e., the second otp memory unit 5) is used for performing the gain calibration, the gain error adjustment range is 1.5-1.7V, and the 6-bit e-fuse unit can modify 64 levels within 200mV at one time. The gain calibration circuit 6 utilizes different levels of the previous stage to match with the selection of the e-fuse, so that the gain error caused by manufacturing in the circuit is reduced, and the adjustment range of the minimum gain error is 3 mV.
As shown in fig. 2, the offset calibration of the calibration module is implemented by using a first otp memory unit 10 and an offset calibration circuit 9, in this embodiment, a 5-bit e-fuse unit (i.e., the first otp memory unit 10) is used for offset calibration, the offset error adjustment range is-0.1 to 0.1V, and 32 levels within 200mV can be adjusted at one time; the offset calibration circuit 9 can reduce the offset error in the circuit by matching with the e-fuse, and the adjustment range of the minimum offset error is 6.4 mV. The e-fuse unit is capable of correcting an error generated at the time of chip manufacturing to a small value.
In some embodiments, the multi-channel digital-to-analog converter further comprises a buffer amplifier 12 for monitoring the internal state, wherein an input terminal of the buffer amplifier 12 is connected to the output voltage generated by the current-to-voltage conversion unit 11, and an output terminal thereof generates a flag signal indicating the internal state. For example, two buffer amplifiers 12 are provided in the embodiment, and two flag signals MOUT _ a and MOUT _ B are generated according to two output voltages VOUT _ a and VOUT _ B generated by the current-voltage conversion unit 11, respectively, and the internal state of the chip can be monitored according to the flag signals MOUT _ a and MOUT _ B.
The power divider/synthesizer, the passive vector modulator, the switch unit, the first amplifier and the second amplifier can all adopt GaAs pHEMT process monolithic integrated circuits, the antenna unit can adopt a PCB patch antenna, the multi-channel digital-to-analog converter can adopt a CMOS process, and the multi-channel, high-precision, high-speed and low-power digital-to-analog converter is integrated in the multi-channel digital-to-analog converter chip. All the units are bonded on a multilayer microwave board in a bare chip mode, a gold wire with the diameter of 25um is connected with the bare chip and the microwave board through a micro-assembly process, and finally, a metal cavity and a cover plate are adopted for packaging. In some embodiments, the power divider/combiner is manufactured by using a gallium arsenide process, a Wilkinson structure is used, a port is impedance matched with 50 ohms, the number of channels of the power divider/combiner is determined by the number of antenna units, which may be 2, 4, or 8, and the like, and a subarray mode is formed, so that 1 radio frequency signal is divided into multiple channels with equal power, or multiple radio frequency signals are combined into 1 radio frequency signal.
In summary, the multi-channel digital-to-analog converter and the passive vector modulator are designed independently as core structures for radio frequency signal receiving and sending amplitude-phase control, a multi-channel high-speed digital-to-analog conversion chip can be designed and manufactured by using a CMOS (complementary metal oxide semiconductor) process, and a millimeter wave passive vector modulator chip can be designed and manufactured by using a GaAs (gallium arsenide) process, so that the component can realize the amplitude-phase control with miniaturization (chip-level packaging realizes small volume), high speed (Ls level, the beam switching speed can be less than 100 Ls), high precision (the amplitude modulation and phase modulation resolution is greater than 12 bits), low power consumption (less than 30 mW/channel), high efficiency, and can meet the applications in the fields of 5G communication, low-orbit satellite communication and the like.
While the present invention has been described in detail with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, and various modifications and optimizations may be made by those skilled in the art without departing from the spirit and scope of the claims of the present application.
Claims (4)
1. A multi-channel radio frequency signal receiving and transmitting amplitude-phase control device is characterized by comprising a power divider/synthesizer, a multi-channel digital-to-analog converter and L channels, wherein L is a positive integer greater than 1, and each channel comprises a passive vector modulator, a switch unit, a first amplifier, a second amplifier and an antenna unit; the multi-channel digital-to-analog converter is used for converting the digital control signal to obtain an amplitude-phase control signal of the L channels, and the passive vector modulator of each channel adjusts the amplitude and the phase of the radio-frequency signal input into the passive vector modulator according to the amplitude-phase control signal of the corresponding channel generated by the multi-channel digital-to-analog converter;
when the multichannel radio-frequency signal receiving and transmitting amplitude-phase control device is in a radio-frequency signal transmitting mode, the power divider/synthesizer divides a first radio-frequency signal into L paths of second radio-frequency signals with equal power and then respectively sends the second radio-frequency signals into the L channels; in each channel, the passive vector modulator adjusts the amplitude and the phase of the second radio frequency signal to generate a third radio frequency signal, and the third radio frequency signal is amplified by the first amplifier and then sent by the antenna unit under the control of the switch unit;
when the multichannel radio-frequency signal receiving and transmitting amplitude-phase control device is in a radio-frequency signal receiving mode, the antenna unit receives a fourth radio-frequency signal in each channel, and the fourth radio-frequency signal is amplified by the second amplifier under the control of the switch unit and then sent into the passive vector modulator to be subjected to amplitude and phase adjustment and generate a fifth radio-frequency signal; the power divider/synthesizer synthesizes L fifth radio-frequency signals generated by the L channels into one path;
in each channel, the switch unit comprises a first single-pole double-throw switch and a second single-pole double-throw switch, wherein a first connecting end of the first single-pole double-throw switch is connected with a first connecting end of the passive vector modulator, a second connecting end of the first single-pole double-throw switch is connected with an input end of the first amplifier, and a third connecting end of the first single-pole double-throw switch is connected with an output end of the second amplifier; the first connecting end of the second single-pole double-throw switch is connected with the first connecting end of the antenna unit, the second connecting end of the second single-pole double-throw switch is connected with the output end of the first amplifier, and the third connecting end of the second single-pole double-throw switch is connected with the input end of the second amplifier;
when the multichannel radio-frequency signal transceiving amplitude-phase control device is in a radio-frequency signal transmitting mode, a second connecting end of the passive vector modulator is connected with the second radio-frequency signal, and a first connecting end of the passive vector modulator outputs the third radio-frequency signal; the first connection end and the second connection end of the first single-pole double-throw switch are connected, the first connection end and the second connection end of the second single-pole double-throw switch are connected, and the first amplifier works; the second connecting end of the antenna unit transmits a signal obtained by amplifying the third radio frequency signal by the first amplifier;
when the multichannel radio-frequency signal receiving-transmitting amplitude-phase control device is in a radio-frequency signal receiving mode, the second connecting end of the antenna unit receives the fourth radio-frequency signal, the first connecting end and the third connecting end of the first single-pole double-throw switch are connected, the first connecting end and the third connecting end of the second single-pole double-throw switch are connected, and the second amplifier works; the first connecting end of the passive vector modulator receives the fourth radio-frequency signal which is amplified by the second amplifier, and the second connecting end outputs the fifth radio-frequency signal;
the passive vector modulator comprises a coupler, a bi-phase modulator, an attenuator and an in-phase combiner, wherein the coupler is used for dividing an input radio frequency signal of the passive vector modulator into two paths of signals which are orthogonal in constant amplitude, the bi-phase modulator and the attenuator are used for converting the two paths of signals output by the coupler according to an amplitude-phase control signal of a channel generated by the multi-channel digital-to-analog converter to obtain four paths of signals which are respectively 90-degree different in phase and adjusted in amplitude, and the in-phase combiner is used for vector-adding the four paths of signals which are respectively 90-degree different in phase and adjusted in amplitude to obtain an output radio frequency signal of the passive vector modulator, and the amplitude and the phase of the output radio frequency signal of the passive vector modulator are continuously adjustable;
the multi-channel digital-to-analog converter comprises a digital signal receiving and processing module, a level conversion module, a calibration module and a digital-to-analog conversion module;
the digital signal receiving and processing module is used for receiving the M-bit binary digital control signal and decoding the M-bit binary digital control signal to obtain N decoded digital signals, wherein M and N are positive integers greater than 1, and N is greater than M;
the level conversion module is used for receiving an internal reference voltage and the N decoding digital signals and converting the internal reference voltage into N sub-reference levels according to the N decoding digital signals;
the digital-analog conversion module comprises N DAC data registers, N R-2R resistance networks and N current-voltage conversion units;
the digital signal receiving and processing module stores the digital control signal into one DAC data register after receiving the digital control signal every time, and N DAC data registers respectively store the digital control signal received by the digital signal receiving and processing module for N times;
the N DAC data registers respectively output the digital control signals stored in the DAC data registers to the N R-2R resistance networks; each R-2R resistance network is used for converting one sub-reference level into corresponding output current according to the digital control signal, and then N R-2R resistance networks respectively convert N sub-reference levels into corresponding output currents;
the N current-voltage conversion units are respectively used for converting output currents of the N R-2R resistance networks into corresponding output voltages, and the N current-voltage conversion units generate 4L output voltages as amplitude-phase control signals of the L channels;
the calibration module is used for calibrating the multi-channel digital-to-analog converter, and comprises gain calibration and offset calibration.
2. The multi-channel radio-frequency signal transceiving amplitude-phase control device according to claim 1, wherein the current-voltage conversion unit comprises a transimpedance amplifier, an input end of the transimpedance amplifier is connected with the output current of the R-2R resistor network, and an output end of the transimpedance amplifier generates a corresponding output voltage; when the R-2R resistance network generates a plurality of output currents, the current-voltage conversion unit is provided with a corresponding number of trans-impedance amplifiers, and each output current generated by the R-2R resistance network is converted into a corresponding output voltage.
3. The multi-channel radio frequency signal transceiving amplitude and phase control device of claim 1, wherein the power divider/combiner, the passive vector modulator, the switch unit, the first amplifier and the second amplifier are all monolithic integrated circuits adopting GaAs pHEMT technology, the antenna unit adopts a PCB patch antenna, and the multi-channel digital-to-analog converter adopts CMOS technology.
4. The multi-channel radio frequency signal transceiving amplitude-phase control device according to claim 3, wherein the power divider/combiner, the multi-channel digital-to-analog converter, the passive vector modulator, the switch unit, the first amplifier, the second amplifier and the antenna unit in the L channels are bonded to the multi-layer microwave board in a bare chip manner, and are connected with the microwave board through a micro-assembly process by using gold wires, and all the bare chips and the microwave board are packaged by using a metal cavity and a cover plate.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0539760A3 (en) * | 1991-10-29 | 1994-01-12 | Siemens Ag | |
| CN103985965A (en) * | 2014-05-28 | 2014-08-13 | 成都雷电微力科技有限公司 | Application system of simulation vector modulator in phased-array antenna |
| CN112152622A (en) * | 2020-09-27 | 2020-12-29 | 上海类比半导体技术有限公司 | Digital-to-analog converter |
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| US7773019B2 (en) * | 2008-08-26 | 2010-08-10 | Atmel Corporation | Digital-to-analog converter |
| CN203813778U (en) * | 2014-05-13 | 2014-09-03 | 成都雷电微力科技有限公司 | TR radio frequency module |
| CN106953658B (en) * | 2017-01-20 | 2019-05-07 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | High integration active phased array transmitting-receiving subassembly |
| CN106848608B (en) * | 2017-01-25 | 2020-03-17 | 东南大学 | Broadband mixed beam forming integrated antenna array |
| CN110311701B (en) * | 2018-03-23 | 2022-03-01 | 中兴通讯股份有限公司 | Transceiver, receiving channel and transmitting channel calibration method and device |
-
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103985965A (en) * | 2014-05-28 | 2014-08-13 | 成都雷电微力科技有限公司 | Application system of simulation vector modulator in phased-array antenna |
| CN112152622A (en) * | 2020-09-27 | 2020-12-29 | 上海类比半导体技术有限公司 | Digital-to-analog converter |
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