CN111859630B - Image compression simulation verification method, device, equipment and readable storage medium - Google Patents
Image compression simulation verification method, device, equipment and readable storage medium Download PDFInfo
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Abstract
The invention discloses an image compression simulation verification method, which comprises the following steps: acquiring a target digital image file to be compressed; sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps; reading a target original image file, and comparing the target written image file with the target original image file to obtain a first comparison result; when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result; and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result. The invention improves the problem positioning speed and the simulation verification efficiency. The invention also discloses an image compression simulation verification device, equipment and a storage medium, and has corresponding technical effects.
Description
Technical Field
The present invention relates to the field of image compression technologies, and in particular, to a method, an apparatus, a device, and a computer-readable storage medium for image compression simulation verification.
Background
With the continuous development of internet multimedia technology, digital image information becomes more and more important, and due to the large data volume, the image compression technology becomes an indispensable part, and commonly used are JPEG compression, wavelet transform compression and fractal compression. In the chip design process, the JPEG image compression technology is often used, and the verification of the design is a work which is large in workload and long in time consumption.
As shown in fig. 1, information at the HOST (HOST) end is transmitted to the remote display through a Baseboard Management Controller (BMC), which is convenient for experimenters to remotely observe and operate, and the amount of data involved in the process is huge, so that JPEG is required to compress the information, which is convenient for fast real-time transmission. Information at a host end is interacted with a memory (DDR) through a Video Graphics Array (VGA), then is transmitted to JPEG (joint photographic experts group) through a Digital Visual Interface (DVI) or an AXI (advanced extensible Interface) bus for compression, and the compressed data is placed back into the DDR and is transmitted to a remote display through a network.
The conventional image compression simulation verification mode is to judge whether the jpeg works normally or not by manually observing waveform signals, which is time-consuming and huge-workload work, and in the jpeg working process, the data volume is huge, manpower is wasted, observation is not easy, and the problem is difficult to locate.
In summary, how to effectively solve the problems of manpower waste, difficulty in observation, difficulty in problem positioning and the like in the existing image compression simulation verification mode is a problem which needs to be solved urgently by a person skilled in the art at present.
Disclosure of Invention
The invention aims to provide an image compression simulation verification method, which improves the problem positioning speed, saves labor, improves the simulation verification efficiency and promotes the development of chip verification; another object of the present invention is to provide an image compression simulation verification apparatus, device and computer-readable storage medium.
In order to solve the technical problems, the invention provides the following technical scheme:
an image compression simulation verification method comprises the following steps:
analyzing the received simulation verification request to obtain a target digital image file to be compressed;
sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which correspond to the processed target digital image file respectively;
respectively reading the target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result;
when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result;
and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
In a specific embodiment of the present invention, parsing a received simulation verification request to obtain a target digital image file to be compressed includes:
analyzing the received simulation verification request to obtain target simulation verification configuration information;
and reading a target digital image file matched with the target simulation verification configuration information from the source file.
In one embodiment of the present invention, reading a target digital image file matching the target simulation verification configuration information from a source file comprises:
determining a target digital image capturing mode according to the target simulation verification configuration information;
reading the target digital image file from the source file in the target digital image capture mode.
In one embodiment of the present invention, reading the target digital image file from the source file in the target digital image capture mode comprises:
and reading the target digital image file from the source file by using a preset FPGA chip according to the target digital image capturing mode.
In a specific embodiment of the present invention, reading a target original image file corresponding to the target digital image file includes:
determining a target original image capturing mode according to the target simulation verification configuration information;
and reading the target original image file from a target image storage area corresponding to the target original image capturing mode.
In an embodiment of the present invention, reading the target original image file from a target image storage area corresponding to the target original image capturing mode includes:
and when the target original image capturing mode is a DVI mode, reading the target original image file from a DVI interface.
In an embodiment of the present invention, after reading the target original image file corresponding to the target writing image file and the target digital image file, respectively, the method further includes:
storing the target writing image file and the target original image file into a preset jpg file;
comparing the target writing image file with the target original image file, wherein the comparing operation comprises the following steps:
and comparing the target writing image file with the target original image file in the preset jpg file.
An image compression simulation verification apparatus, comprising:
the digital image acquisition unit is used for analyzing the received simulation verification request to obtain a target digital image file to be compressed;
the image processing unit is used for sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps;
a first comparison result obtaining unit, configured to read the target write-in image file and a target original image file corresponding to the target digital image file, respectively, and perform a comparison operation on the target write-in image file and the target original image file to obtain a first comparison result;
a second comparison result obtaining unit, configured to, when the first comparison result is that the images are inconsistent, obtain a second comparison result by comparing the target format image file and the target compressed image file with the target original image file, respectively;
and the problem positioning unit is used for carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
An image compression emulation verification device comprising:
a memory for storing a computer program;
a processor for implementing the steps of the image compression simulation verification method as described above when executing the computer program.
A computer readable storage medium having stored thereon a computer program which, when executed by a processor, carries out the steps of the image compression simulation verification method as set out above.
By applying the method provided by the embodiment of the invention, the received simulation verification request is analyzed to obtain a target digital image file to be compressed; sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps; respectively reading a target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result; when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result; and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result. By monitoring and storing the image files of each stage of data compression processing, when the finally output target written image file is determined to be inconsistent with the target original image file, problem location is carried out by comparing the target original image file with the image files of each stage, so that the problem location speed is improved, labor is saved, the simulation verification efficiency is improved, and the development of chip verification is promoted.
Correspondingly, the embodiment of the invention also provides an image compression simulation verification device, equipment and a computer readable storage medium corresponding to the image compression simulation verification method, which have the technical effects and are not described herein again.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a block diagram of an image compression system;
FIG. 2 is a flow chart of an implementation of a simulation verification method for image compression according to an embodiment of the present invention;
FIG. 3 is a flowchart of another embodiment of a simulation verification method for image compression according to the present invention;
FIG. 4 is a block diagram of an image compression simulation verification system according to an embodiment of the present invention;
FIG. 5 is a block diagram of an image compression simulation verification apparatus according to an embodiment of the present invention;
fig. 6 is a block diagram of an image compression simulation verification apparatus according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The first embodiment is as follows:
referring to fig. 2, fig. 2 is a flowchart of an implementation of an image compression simulation verification method according to an embodiment of the present invention, where the method may include the following steps:
s201: and analyzing the received simulation verification request to obtain a target digital image file to be compressed.
When image compression simulation verification is required, a simulation verification request is sent to an image compression simulation verification platform, and the simulation verification request comprises a target digital image file to be compressed. And the image compression simulation verification platform receives the simulation verification request, and analyzes the received simulation verification request to obtain a target digital image file to be compressed.
S202: and sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed target digital image file.
After the target digital image file to be compressed is obtained through analysis, the format conversion, the compression and the writing step-by-step processing are sequentially carried out on the target digital image file, and a target format image file, a target compressed image file and a target writing image file which correspond to the target digital image file after the step-by-step processing are obtained. Specifically, the target digital image file can be converted from the rgb format to the yuv format, the image file in the yuv format is compressed, and the compressed image file is written into a memory (DDR).
S203: and respectively reading the target writing image file and the target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result.
After sequentially carrying out format conversion, compression and writing processing on the target digital image file to obtain a target writing image file, reading the target writing image file, reading a target original image file corresponding to the target digital image file, and carrying out comparison operation on the target writing image file and the target original image file to obtain a first comparison result. The target digital image file is a hexadecimal file corresponding to the target original image file.
S204: and when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result.
And comparing the target written image file with the target original image file to obtain a first comparison result, and when the first comparison result is that the images are inconsistent, indicating that an error exists in at least one link in the processes of format conversion, compression and writing of the target digital image file.
S205: and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
And after the first comparison result and the second comparison result are obtained, carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result. If the target format image file is consistent with the target original image file and the target compressed image file is also consistent with the target original image file, an error occurs in the process of writing the image file, and the problem is positioned in a file writing link; when the target format image file is consistent with the target original image file but the target compressed image file is inconsistent with the target original image file, an error occurs in the process of compressing the image file, and the problem is positioned to a file compression link; when the standard format image file is inconsistent with the target original image file, the error occurs in the process of converting the format of the image file, and the problem is positioned to the file format conversion link.
By applying the method provided by the embodiment of the invention, the received simulation verification request is analyzed to obtain a target digital image file to be compressed; sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps; respectively reading a target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result; when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result; and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result. By monitoring and storing the image files of each stage of data compression processing, when the finally output target written image file is determined to be inconsistent with the target original image file, problem location is carried out by comparing the target original image file with the image files of each stage, so that the problem location speed is improved, labor is saved, the simulation verification efficiency is improved, and the development of chip verification is promoted.
It should be noted that, based on the first embodiment, the embodiment of the present invention further provides a corresponding improvement scheme. In the following embodiments, steps that are the same as or correspond to those in the first embodiment may be referred to each other, and corresponding advantageous effects may also be referred to each other, which are not described in detail in the following modified embodiments.
Example two:
referring to fig. 3, fig. 3 is a flowchart of another implementation of an image compression simulation verification method according to an embodiment of the present invention, where the method may include the following steps:
s301: and analyzing the received simulation verification request to obtain target simulation verification configuration information.
The simulation verification request comprises target simulation verification configuration information, and the target simulation verification configuration information can comprise the resolution of a target digital image file to be compressed, the working mode of a simulation verification platform, the number of image frames to be read and the like. And after receiving the simulation verification request, analyzing the received simulation verification request to obtain target simulation verification configuration information. As shown in fig. 4, by performing simulation verification on a jpeg design based on a hardware verification language (SV, System Verilog), SystemVerilog has many characteristics of design, verification, assertion, and others, by which a higher-level, highly flexible test can be created, and a reliable and repeatable verification environment can be constructed. The operation modes of the simulation verification platform can comprise a DVI mode and a DDR mode. In fig. 4, the upper branch led out from the source file is in DVI mode, and the lower branch is in DDR mode.
S302: and determining a target digital image capturing mode according to the target simulation verification configuration information.
After the target simulation verification configuration information is obtained through analysis, the target digital image capturing mode is determined according to the target simulation verification configuration information, namely, whether the target digital image file is captured from a DVI interface or the target digital image file is captured from a DDR is determined.
S303: and reading the target digital image file from the source file by using a preset FPGA chip according to a target digital image capturing mode.
The method comprises the steps of presetting FPGA chips for image file reading in two digital image capturing modes, presetting original image files with different resolutions and hexadecimal digital image files corresponding to the original image files in a source file, reading a target digital image file from the source file according to the target digital image capturing mode by using the preset FPGA chips after determining the target digital image capturing mode, namely capturing the target digital image file from a DVI interface when the target digital image capturing mode is the DVI mode, and capturing the target digital image file from a DDR when the target digital image capturing mode is the DDR mode. Specifically, as shown in fig. 4, the digital video interface module (vga model) and the input module may be implemented by using an FPGA chip in a hardware form, and the image file reading speed is greatly increased by using the FPGA chip to read the image file.
S304: and sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed target digital image file.
S305: the read target writes the image file.
S306: and determining a target original image capturing mode according to the target simulation verification configuration information.
After the target simulation verification configuration information is obtained through analysis, a target original image capturing mode is determined according to the target simulation verification configuration information, namely, whether a target original image file is captured from a DVI interface or a target original image file is captured from a DDR is determined.
S307: and reading the target original image file from the target image storage area corresponding to the target original image capturing mode.
After the target original image capturing mode is determined, the target original image file is read from the target image storing area corresponding to the target original image capturing mode. That is, when the target original image capturing mode is the DVI mode, the target original image file is read from the DVI interface, and when the target original image capturing mode is the DDR mode, the target original image file is read from the DDR.
In one embodiment of the present invention, step S307 may include the following steps:
when the target original image capturing mode is the DVI mode, the target original image file is read from the DVI interface.
And when the target original image capturing mode is determined to be the DVI mode, namely the image compression simulation verification platform is in a system starting state, reading the target original image file from the DVI interface. By setting the DVI mode, when the image compression simulation verification platform is in a system starting state, the image compression simulation processing can still be smoothly carried out, and the image compression simulation verification efficiency is improved.
S308: and storing the target writing image file and the target original image file into a preset jpg file.
And presetting a jpg file, and after reading the target writing image file, storing the target writing image file and the target original image file into the preset jpg file. The target writing image file and the target original image file are stored in the preset jpg file for comparison, so that the image comparison speed is improved.
S309: and comparing the target written image file with the target original image file in the preset jpg file to obtain a first comparison result.
S310: and when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result.
S311: and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
As shown in fig. 4, the work projects of the two working modes of the simulation verification platform are respectively:
DDR mode: the driving module is used for configuring registers of JPEG (joint photographic experts group) to enable the registers to work in a DDR (double data rate) mode, the input module is used for reading source files with different resolutions according to target simulation verification configuration information, then target original image files are written into the DDR through an AXI (advanced extensible interface) bus, the target digital image files are read from the DDR by the JPEG capturing module, the target digital image files are converted into yuv format from rgb format by the format conversion module to obtain target format image files, the target format image files are compressed by the compression module to obtain target compressed image files, the target compressed image files are written into the DDR by the transmission module to obtain target written image files, and the target written image files are read from the DDR by the output module to be stored into j files.
DVI mode: the JPEG image processing method comprises the steps that a driving module configures registers of JPEG to enable the JPEG to work in a DVI mode, a video digital interface module reads source files with different resolutions according to target simulation verification configuration information, then target original image files are written into the DVI interface, a JPEG capturing module obtains target digital image files from the DVI interface, a format conversion module converts the target digital image files from an rgb format into a yuv format to obtain target format image files, a compression module compresses the target format image files to obtain target compressed image files, a transmission module writes the target compressed image files into a DDR to obtain target write-in image files, and an output module reads the target write-in image files from the DDR and stores the target write-in image files into a j file.
And the MUX module determines that the data source is from a DDR or DVI interface according to the target digital image capturing mode or the target original image capturing mode of the jpeg. The monitoring module stores data of some working nodes in the JPEG working process, including target format image files, target compressed image files and target written image files, and is convenient for quickly positioning problems. The driver module configures the JPEG for various reasons, including resolution, maximum frame rate control for capture, capture mode, interrupt enable, and so forth.
Corresponding to the above method embodiment, the embodiment of the present invention further provides an image compression simulation verification apparatus, and the image compression simulation verification apparatus described below and the image compression simulation verification described above may be referred to correspondingly.
Referring to fig. 5, fig. 5 is a block diagram of an image compression simulation verification apparatus according to an embodiment of the present invention, where the apparatus may include:
a digital image obtaining unit 51, configured to analyze the received simulation verification request to obtain a target digital image file to be compressed;
the image processing unit 52 is configured to sequentially perform format conversion, compression, and write-in step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file, and a target write-in image file respectively corresponding to each step of processing;
a first comparison result obtaining unit 53, configured to read a target write-in image file and a target original image file corresponding to the target digital image file, respectively, and perform a comparison operation on the target write-in image file and the target original image file to obtain a first comparison result;
a second comparison result obtaining unit 54, configured to, when the first comparison result is that the images are inconsistent, obtain a second comparison result by comparing the target format image file and the target compressed image file with the target original image file, respectively;
and the problem positioning unit 55 is used for carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
The device provided by the embodiment of the invention is applied to analyze the received simulation verification request to obtain a target digital image file to be compressed; sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps; respectively reading a target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result; when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result; and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result. By monitoring and storing the image files of each stage of data compression processing, when the finally output target written image file is determined to be inconsistent with the target original image file, problem location is carried out by comparing the target original image file with the image files of each stage, so that the problem location speed is improved, labor is saved, the simulation verification efficiency is improved, and the development of chip verification is promoted.
In one embodiment of the present invention, the digital image obtaining unit 51 includes:
the configuration information obtaining subunit is used for analyzing the received simulation verification request to obtain target simulation verification configuration information;
and the digital image obtaining subunit is used for reading a target digital image file matched with the target simulation verification configuration information from the source file.
In an embodiment of the invention, the digital image acquisition subunit is embodied as
Determining a target digital image capturing mode according to the target simulation verification configuration information;
the cells of the target digital image file are read from the source file in a target digital image capture mode.
In a specific embodiment of the present invention, the digital image obtaining subunit is specifically a unit that reads a target digital image file from a source file according to a target digital image capturing mode by using a preset FPGA chip.
In one embodiment of the present invention, the first comparison result obtaining unit 53 includes an original image reading subunit, which is specifically configured to determine a target original image capturing mode according to the target simulation verification configuration information;
and a unit reading the target original image file from the target image storage area corresponding to the target original image capturing mode.
In one embodiment of the present invention, the original image reading subunit is specifically a unit that reads the target original image file from the DVI interface when the target original image capture mode is the DVI mode.
In one embodiment of the present invention, the apparatus may further include:
the file storage unit is used for storing the target writing image file and the target original image file into a preset jpg file after respectively reading the target writing image file and the target original image file corresponding to the target digital image file;
the first comparison result obtaining unit 53 is specifically a unit that performs a comparison operation between the target write image file and the target original image file in a preset jpg file.
Corresponding to the above method embodiment, referring to fig. 6, fig. 6 is a schematic diagram of an image compression simulation verification apparatus provided by the present invention, where the apparatus may include:
a memory 61 for storing a computer program;
the processor 62, when executing the computer program stored in the memory 61, may implement the following steps:
analyzing the received simulation verification request to obtain a target digital image file to be compressed; sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps; respectively reading a target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result; when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result; and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
For the introduction of the device provided by the present invention, please refer to the above method embodiment, which is not described herein again.
Corresponding to the above method embodiment, the present invention further provides a computer-readable storage medium having a computer program stored thereon, the computer program, when executed by a processor, implementing the steps of:
analyzing the received simulation verification request to obtain a target digital image file to be compressed; sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps; respectively reading a target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result; when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result; and carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result.
The computer-readable storage medium may include: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
For the introduction of the computer-readable storage medium provided by the present invention, please refer to the above method embodiments, which are not described herein again.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device, the apparatus and the computer-readable storage medium disclosed in the embodiments correspond to the method disclosed in the embodiments, so that the description is simple, and the relevant points can be referred to the description of the method.
The principle and the implementation of the present invention are explained in the present application by using specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
Claims (10)
1. An image compression simulation verification method is characterized by comprising the following steps:
analyzing the received simulation verification request to obtain a target digital image file to be compressed;
sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps;
respectively reading the target writing image file and a target original image file corresponding to the target digital image file, and comparing the target writing image file with the target original image file to obtain a first comparison result;
when the first comparison result is that the images are inconsistent, respectively comparing the target format image file and the target compressed image file with the target original image file to obtain a second comparison result;
combining the first comparison result and the second comparison result to perform simulation verification problem positioning;
when the target format image file is consistent with the target original image file and the target compressed image file is also consistent with the target original image file, indicating that an error occurs in the process of writing the image file, and positioning a problem to a file writing link; when the target format image file is consistent with the target original image file but the target compressed image file is inconsistent with the target original image file, indicating that an error occurs in the process of compressing the image file, and positioning the problem to a file compression link; and when the target format image file is inconsistent with the target original image file, indicating that an error occurs in the process of converting the format of the image file, and positioning the problem to a file format conversion link.
2. The image compression simulation verification method according to claim 1, wherein parsing the received simulation verification request to obtain a target digital image file to be compressed comprises:
analyzing the received simulation verification request to obtain target simulation verification configuration information;
and reading a target digital image file matched with the target simulation verification configuration information from the source file.
3. The image compression simulation verification method of claim 2, wherein reading the target digital image file matching the target simulation verification configuration information from a source file comprises:
determining a target digital image capturing mode according to the target simulation verification configuration information;
reading the target digital image file from the source file in the target digital image capture mode.
4. The image compression simulation verification method of claim 3, wherein reading the target digital image file from the source file in the target digital image capture mode comprises:
and reading the target digital image file from the source file by using a preset FPGA chip according to the target digital image capturing mode.
5. The image compression simulation verification method according to any one of claims 2 to 4, wherein reading the target original image file corresponding to the target digital image file comprises:
determining a target original image capturing mode according to the target simulation verification configuration information;
and reading the target original image file from a target image storage area corresponding to the target original image capturing mode.
6. The image compression simulation verification method according to claim 5, wherein reading the target raw image file from a target image storage area corresponding to the target raw image capture mode comprises:
and when the target original image capturing mode is a DVI mode, reading the target original image file from a DVI interface.
7. The image compression simulation verification method according to claim 1, further comprising, after reading the target original image file corresponding to the target write image file and the target digital image file, respectively:
storing the target writing image file and the target original image file into a preset jpg file;
comparing the target writing image file with the target original image file, wherein the comparing operation comprises the following steps:
and comparing the target writing image file with the target original image file in the preset jpg file.
8. An image compression simulation verification apparatus, comprising:
the digital image acquisition unit is used for analyzing the received simulation verification request to obtain a target digital image file to be compressed;
the image processing unit is used for sequentially carrying out format conversion, compression and writing step-by-step processing on the target digital image file to obtain a target format image file, a target compressed image file and a target writing image file which respectively correspond to the processed steps;
a first comparison result obtaining unit, configured to read the target write-in image file and a target original image file corresponding to the target digital image file, respectively, and perform a comparison operation on the target write-in image file and the target original image file to obtain a first comparison result;
a second comparison result obtaining unit, configured to, when the first comparison result is that the images are inconsistent, obtain a second comparison result by comparing the target format image file and the target compressed image file with the target original image file, respectively;
the problem positioning unit is used for carrying out simulation verification problem positioning by combining the first comparison result and the second comparison result;
the problem positioning unit is specifically used for positioning a problem to a file writing link when the target format image file is consistent with the target original image file and the target compressed image file is also consistent with the target original image file, which indicates that an error occurs in the process of writing the image file; when the target format image file is consistent with the target original image file but the target compressed image file is inconsistent with the target original image file, indicating that an error occurs in the process of compressing the image file, and positioning the problem to a file compression link; and when the target format image file is inconsistent with the target original image file, indicating that an error occurs in the process of converting the format of the image file, and positioning the problem to a file format conversion link.
9. An image compression simulation verification apparatus, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the image compression simulation verification method according to any one of claims 1 to 7 when executing said computer program.
10. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the image compression simulation verification method according to any one of claims 1 to 7.
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