CN110401522A

CN110401522A - Data communication device, controller and data communication method thereof

Info

Publication number: CN110401522A
Application number: CN201910786640.2A
Authority: CN
Inventors: 郭锋; 叶秀群; 曾佳; 金德武; 黄小河; 王浩
Original assignee: Gree Electric Appliances Inc of Zhuhai
Current assignee: Gree Electric Appliances Inc of Zhuhai
Priority date: 2019-08-23
Filing date: 2019-08-23
Publication date: 2019-11-01
Anticipated expiration: 2039-08-23
Also published as: CN110401522B

Abstract

The invention discloses a data communication device, a controller and a data communication method thereof, wherein the device comprises: a UART receive module, comprising: the UART module is used for realizing UART receiving of data based on the UART receiving function of the UART module; the UART transmitting module comprises: the UART module is used for simulating a UART sending time sequence of the UART module to realize the UART sending of data; or another UART module, the other UART module is used for realizing the UART sending of data based on the UART sending function of the UART module. The scheme of the invention can solve the problem that the cost is increased due to the fact that the main MCU for full duplex communication is used for improving the communication speed, and achieves the effect of reducing the cost.

Description

Data communication device, controller and data communication method thereof

Technical Field

The invention belongs to the technical field of communication, particularly relates to a data communication device, a controller and a data communication method thereof, and particularly relates to a realization device for simulating a UART (Universal Asynchronous Receiver/Transmitter) sending data scheme through a timer, the controller and the data communication method thereof.

Background

At present, along with the continuous progress of the internet of things technology and the gradual improvement of the communication speed requirement of users, the household appliances are bound to increase the internet of things technology. At present, more and more household appliances are provided with the WIFI function, a user can directly operate the household appliances such as an air conditioner and the like by using a mobile phone, but the main complaint point that the WIFI function is not satisfied by the user is still caused by too low communication speed.

In order to improve the communication speed, a main MCU supporting full duplex communication is selected to improve the communication speed on the selection of most main chips; the upgrade uses a full duplex communication chip, which results in increased cost.

The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.

Disclosure of Invention

The present invention is directed to provide a data communication device, a controller and a data communication method thereof, so as to solve the problem that increasing the communication speed by using a master MCU for full duplex communication leads to an increase in cost, thereby achieving the effect of reducing cost.

The invention provides a data communication device, comprising: the UART receiving module and the UART transmitting module; the UART receiving module is used for realizing UART receiving of data based on a UART receiving function of the UART module; the UART transmitting module is used for simulating a UART transmitting time sequence of the UART module or realizing the UART transmission of data based on the UART transmitting function of the UART module; wherein, the UART sending module comprises: the UART module is used for simulating a UART sending time sequence of the UART module to realize UART sending of data; or another UART module, the other UART module is used for realizing the UART sending of data based on the UART sending function of the UART module.

Optionally, the analog UART module includes: the device comprises an output module, a counting module and a control module; the output module is used for simulating a UART sending function of the UART module to realize data sending; the counting module is used for timing according to the set baud rate range to obtain timing time; and the control module is used for controlling the sending time sequence of the output module according to the timing time so as to realize the simulation of the UART sending function of the UART module by the output module.

Optionally, wherein the UART module includes: a UART communication resource module of the half-duplex chip; and/or, the output module comprises: an IO port of the controller; and/or, the counting module comprises: the internal timing of the controller interrupts the resource module.

Optionally, the controlling module controls the sending timing sequence of the output module according to the timing time, including: controlling the controller to be electrified and initialized, setting the port level of the output module as a first signal, and configuring the counting module according to a preset interrupt requirement; determining whether data needs to be transmitted; if the data needs to be sent, storing the data to be sent, calculating a check bit of the data to be sent, and starting a counting function of the counting module; under the control of the timing interruption of the counting module, the output module is controlled to transmit the next data bit according to the preset baud rate under the condition that the timing time arrives, so that the UART transmission of data is realized by simulating the UART transmission time sequence.

Optionally, the controlling module controls the output module to send the next data bit according to a preset baud rate when the timing time arrives, including: determining the position of the number of data bits of data to be sent in a preset value range; and after the port level of the output module is adjusted according to the position or corresponding data of corresponding data bits are sent, controlling the number of the data bits to be automatically increased or closing the counting function of the counting module after sending an end bit.

Optionally, the adjusting, by the control module, the port level of the output module according to the position or sending corresponding data of a corresponding data bit includes: if the number of the data bits is the lower limit of a preset numerical range, sending an initial bit, namely setting the port level of the output module as a second signal; if the number of the data bits is larger than the lower limit of a preset numerical range and smaller than the upper limit of the preset numerical range, sequentially sending each data bit of data to be sent according to the size sequence of the number of the data bits; if the number of the data bits is equal to the upper limit of a preset numerical range, transmitting check bits; and if the number of the data bits is larger than the upper limit of the preset numerical range, sending an end bit, and setting the port level of the output module as a first signal.

In accordance with the above apparatus, a further aspect of the present invention provides a controller, comprising: the data communication device is described above.

In another aspect, the present invention provides a data communication method for a controller, including: the UART module is used as a UART receiving module, and the UART receiving of data is realized based on the UART receiving function of the UART module; the UART sending module is used for simulating a UART sending time sequence of the UART module or realizing the UART sending of data based on the UART sending function of the UART module; wherein, the UART sending module comprises: the UART module is used for simulating a UART sending time sequence of the UART module to realize UART sending of data; or another UART module, the other UART module is used for realizing the UART sending of data based on the UART sending function of the UART module.

Optionally, the simulating the UART transmission timing of the UART module by the simulated UART module includes: simulating a UART sending function of the UART module through an output module to realize data sending; timing according to the set baud rate range through a counting module to obtain timing time; and controlling the sending time sequence of the output module according to the timing time through a control module, so as to realize that the output module simulates the UART sending function of the UART module.

Optionally, controlling, by a control module, a sending timing sequence of the output module according to the timing time includes: controlling the controller to be electrified and initialized, setting the port level of the output module as a first signal, and configuring the counting module according to a preset interrupt requirement; determining whether data needs to be transmitted; if the data needs to be sent, storing the data to be sent, calculating a check bit of the data to be sent, and starting a counting function of the counting module; under the control of the timing interruption of the counting module, the output module is controlled to transmit the next data bit according to the preset baud rate under the condition that the timing time arrives, so that the UART transmission of data is realized by simulating the UART transmission time sequence.

Optionally, adjusting, by the control module, the port level of the output module according to the position or sending corresponding data of a corresponding data bit, including: if the number of the data bits is the lower limit of a preset numerical range, sending an initial bit, namely setting the port level of the output module as a second signal; if the number of the data bits is larger than the lower limit of a preset numerical range and smaller than the upper limit of the preset numerical range, sequentially sending each data bit of data to be sent according to the size sequence of the number of the data bits; if the number of the data bits is equal to the upper limit of a preset numerical range, transmitting check bits; and if the number of the data bits is larger than the upper limit of the preset numerical range, sending an end bit, and setting the port level of the output module as a first signal.

According to the scheme, the full-duplex communication function is realized by utilizing the half-duplex chip, so that the cost can be saved; the communication speed of the household appliance can be improved, and the use comfort of a user is improved.

Furthermore, the scheme of the invention can realize the full-duplex communication function of the chip by using the internal timer resource which can only support the half-duplex communication chip, ensure the normal full-duplex communication function and reduce the cost of the finished product.

Furthermore, the scheme of the invention realizes the full-duplex communication mode on a chip platform only supporting half-duplex communication by utilizing UART communication resources of a half-duplex chip and internal timing interruption as resource configuration for completing full-duplex communication, using an internal counter to time for different times according to different baud rates and controlling the level of a common output port to simulate the UART sending function, and has low cost and good user experience.

Therefore, according to the scheme provided by the invention, the full-duplex communication function is realized by using the chip only supporting half-duplex communication, the problem that the cost is increased due to the fact that the communication speed is improved by using the main MCU of the full-duplex communication is solved, and the effect of reducing the cost is achieved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.

Drawings

FIG. 1 is a schematic structural diagram of a data communication device according to an embodiment of the present invention;

FIG. 2 is a flowchart illustrating a data communication method according to an embodiment of the present invention;

FIG. 3 is a flowchart illustrating an embodiment of simulating a UART transmitting timing of a UART module by the UART simulating module according to the present invention;

FIG. 4 is a flowchart illustrating an embodiment of controlling the sending timing of the output module according to the timing time in the method of the present invention;

FIG. 5 is a flow chart illustrating an embodiment of sending a next data bit according to a predetermined baud rate when the timing time arrives in the method of the present invention;

fig. 6 is a schematic flow chart of a transmission simulation process according to an embodiment of the controller of the present invention, in which (a) is a schematic flow chart of a transmission data logic, and (b) is a schematic flow chart of a transmission data simulation processing manner;

fig. 7 is a schematic diagram of a framework structure for using chip resources according to an embodiment of the controller of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the specific embodiments of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

According to an embodiment of the present invention, a data communication apparatus is provided. Referring to fig. 1, a schematic diagram of an embodiment of the apparatus of the present invention is shown. The data communication device may include: the UART comprises a UART receiving module and a UART transmitting module.

Specifically, the UART receiving module may include: and the UART module is used for realizing the UART receiving of data based on the UART receiving function of the UART module.

Optionally, the UART module may include: and the UART communication resource module of the half-duplex chip.

For example: UART communication resources of a half-duplex chip and internal timing interruption are used as resource allocation for completing full-duplex communication, a corresponding software algorithm is provided, and a full-duplex communication mode is realized on a chip platform only supporting half-duplex communication.

For example: and two groups of different UART ports of a chip supporting half-duplex communication are adopted to receive and send data, or one group of UART ports and external interrupt simulation UART are adopted to receive.

Therefore, the UART communication resource module of the half-duplex chip is used as the UART module, so that the cost is low, and the data receiving function can be reliably realized.

Specifically, the UART transmitting module may be configured to simulate a UART transmitting timing of the UART module, or implement UART transmitting of data based on a UART transmitting function of the UART module itself. Preferably, the UART transmitting module may be configured to simulate a UART transmitting timing of the UART module by using a counter and an IO port, or implement UART transmission of data based on a UART transmitting function of the UART module itself. That is, the analog UART module may be configured to simulate a UART transmission timing of the UART module by using an internal counter of the controller and an external IO port, or to implement UART transmission of data based on a UART transmission function of the UART module itself.

For example: in functional logic, the UART receive function is used, but not its transmit function; the transmitting function simulates a UART time sequence by using an internal counter and a common IO port, so that the UART transmitting function is realized.

The UART transmitting module may include: the UART module is used for simulating a UART sending time sequence of the UART module to realize UART sending of data; or another UART module, the other UART module is used for realizing the UART sending of data based on the UART sending function of the UART module.

For example: a scheme for simulating UART (universal asynchronous receiver transmitter) sending data by a timer utilizes a half-duplex chip to realize a full-duplex communication function, thereby saving the cost; the communication speed of the household appliance can be increased, the use comfort of a user is improved, and the complaint of the user is reduced.

For example: the full-duplex communication chip only can support other internal resources of the half-duplex communication chip, realizes the full-duplex communication function of the chip, ensures the normal full-duplex communication function and reduces the cost of the finished product. Therefore, the scheme of the invention can realize the full-duplex communication function by using the chip only supporting half-duplex communication. By the scheme, the half-duplex chip with low cost can meet the requirement of a full-duplex communication function, the cost of developing products is low, and the market competitiveness of the products is improved.

Therefore, the UART module realizes the receiving function and the simulated UART module simulates the transmitting time sequence of the UART to realize the transmitting function, thereby not only realizing the reliable communication of data, but also reducing the cost.

Optionally, the analog UART module may include: the device comprises an output module, a counting module and a control module.

That is, the data communication apparatus may include: the device comprises a UART module, an output module, a counting module and a control module. The output module, the counting module and the control module are all internal resource modules of the controller.

For example: the UART scheme is simulated using a set of UARTs (i.e., universal asynchronous receiver transmitter) + common output ports + internal counters. If the full-duplex communication cannot be realized by simultaneously using two sets of UART ports due to limited chip resources or the need of using multiple sets of UART ports in practical application, an internal counter can be used for timing different times according to different baud rates and controlling the level of a common output port to simulate the UART transmitting function, so that the full-duplex communication requirement is realized.

Specifically, the output module may be configured to simulate a UART sending function of the UART module, so as to implement data sending.

More optionally, the output module may include: IO port of controller.

Therefore, the IO port of the controller is used as the output module, so that the cost is not increased, and the data can be reliably transmitted.

Specifically, the counting module may be configured to count time according to a set baud rate range to obtain a timing time.

More optionally, the counting module may include: the internal timing of the controller interrupts the resource module.

Therefore, by using the internal timer interruption resource of the controller as the counting module, the cost is not increased, and the reliable timer interruption control can be realized when the UART sending function is simulated by using the IO port.

Specifically, the control module may be configured to control a transmission timing sequence of the output module according to the timing time, so as to implement that the output module simulates a UART transmission function of the UART module.

For example: the control module may employ a control portion of a controller, such as an MCU.

Therefore, the transmission function of the simulation UART module is realized by using the matching of the output module, the counting module and the control module, the structure is simple, the cost is low, and the reliability of data transmission can be ensured.

Further optionally, the controlling module controls the sending timing sequence of the output module according to the timing time, and may include:

the control module may be further configured to control power-on initialization of the controller, set a port level of the output module to be a first signal, and configure the counting module according to a preset interrupt requirement. For example: the first signal may be high.

For example: and (2) electrifying and initializing, namely setting a common IO port (namely a sending IO port) of a sending port using the simulated UART function as a high level, and initializing a counter required to be used.

The control module may be further configured to determine whether data needs to be sent; if the data needs to be sent, storing the data to be sent, calculating a check bit of the data to be sent, and starting a counting function of the counting module; under the control of the timing interruption of the counting module, the output module is controlled to transmit the next data bit according to the preset baud rate under the condition that the timing time arrives, so that the UART transmission of data is realized by simulating the UART transmission time sequence; and if the data does not need to be sent, continuing to wait.

For example: judging whether data needs to be sent or not, if not, not carrying out any treatment; if so, storing the data to be transmitted into the variable A, calculating the check bit, and starting the counter to time. And judging the transmitted data, setting the time of a timer according to the baud rate, transmitting the next data bit when the time is up, and simulating the UART transmitting function.

Therefore, the timing setting of the counting module is configured during power-on initialization, and the timing interruption is started when data needs to be sent, so that the sending function of the UART is simulated to realize data sending, the control module controls the sending time sequence of the output module according to the timing time, and the simulation of the UART sending function is accurate and reliable.

More optionally, the controlling module controls the output module to send the next data bit according to a preset baud rate when the timing time arrives, and the controlling module may include:

the control module may be further configured to determine a position where the number of data bits of the data to be sent is within a preset value range.

The control module may be further configured to control the number of the data bits to be automatically increased after adjusting the port level of the output module according to the position or sending the corresponding data of the corresponding data bit, or to turn off the counting function of the counting module after sending the end bit. For example: after the transmission is completed, the variable B is added by 1. If the data transmission of one frame is finished, resetting the variable, closing the timer interruption, and turning to the step b; if the frame data is not completely transmitted, waiting for the timer to time up, and continuing to transmit the data.

For example: and (4) entering timer interruption, judging the number of bits (such as a variable B) of the data to be sent, and processing according to a judgment result.

Therefore, corresponding data are transmitted at the position of the preset value range based on the number of the data bits of the data to be transmitted, so that the data of the corresponding data bits are reliably and accurately transmitted.

Further optionally, the control module adjusts the port level of the output module or sends corresponding data of the corresponding data bit according to the position (that is, the control module adjusts the port level of the output module or sends corresponding data of the corresponding data bit according to the position where the number of data bits of the data to be sent is in the preset value range), which may include any one of the following sending situations.

The first transmission scenario: the control module may be further specifically configured to send a start bit if the number of the data bits is a lower limit of a preset value range, that is, to set a port level of the output module to be a second signal. For example: the second signal may be a low level signal.

For example: if the variable B is zero, it indicates that the start bit needs to be sent, and the sending IO port is set to low level.

The second transmission scenario: the control module may be further specifically configured to sequentially send each data bit of the data to be sent according to a size sequence of the number of the data bits if the number of the data bits is greater than a lower limit of a preset numerical range and smaller than an upper limit of the preset numerical range.

For example: if the variable B is not zero and is less than 9, it represents the bits (e.g. variable a) of the data to be transmitted (here, the size of the variable a is one byte, i.e. 8 bits, and the variable B is exactly 1-8, so that each data bit of the variable a can be transmitted in turn by using this relationship).

The third transmission scenario: the control module may be further configured to send a check bit if the number of the data bits is equal to an upper limit of a preset value range.

For example: if the variable B is 9, it indicates that the check bit is transmitted.

A fourth transmission scenario: the control module may be further specifically configured to send an end bit if the number of the data bits is greater than an upper limit of a preset value range, and set a port level of the output module to be a first signal.

For example: if the variable B is greater than 9, the end bit is sent, the transmit IO port is set to high (the end bit is sent once or twice according to the communication protocol, in this example, one end bit is taken as an example, and two end bits are sent only once more), and the end bit is sent.

Therefore, the accuracy and the reliability of the transmission of each data bit data are ensured by different transmission and processing modes of each data bit data.

Through a large number of tests, the technical scheme of the invention can save the cost by utilizing the half-duplex chip to realize the full-duplex communication function. The communication speed of the household appliance can be improved, and the use comfort of a user is improved.

According to an embodiment of the present invention, there is also provided a controller corresponding to the data communication apparatus. The controller may include: the data communication device is described above.

In an optional example, the scheme of the present invention provides a scheme for transmitting data by using a timer to simulate a UART (universal asynchronous receiver transmitter), and a half-duplex chip is used to implement a full-duplex communication function, thereby saving cost; the communication speed of the household appliance can be increased, the use comfort of a user is improved, and the complaint of the user is reduced.

In this case, Half Duplex (Half Duplex) data transmission means that data can be transmitted in both directions of a signal carrier, but not simultaneously. For example, using a technique with half-duplex transmission over a local area network, a workstation can send data on the line and then immediately receive data on the line from the direction in which the data was just transmitted. Like full duplex transmission, half duplex contains a bi-directional line (a line can carry data in both directions).

In an optional example, the scheme of the invention uses other internal resources such as internal timed interrupt resources and the like which can only support a half-duplex communication chip, so as to realize the full-duplex communication function of the chip, ensure the normal full-duplex communication function and reduce the cost of products.

Therefore, the scheme of the invention can realize the full-duplex communication function by using the chip only supporting half-duplex communication. By the scheme, the half-duplex chip with low cost can meet the requirement of a full-duplex communication function, the cost of developing products is low, and the market competitiveness of the products is improved.

In an alternative embodiment, reference may be made to the examples shown in fig. 6 and 7 to illustrate specific implementation procedures of the scheme of the present invention.

The scheme of the invention utilizes UART communication resources of a half-duplex chip and internal timing interruption as resource allocation for completing full-duplex communication, and provides a corresponding software algorithm to realize a full-duplex communication mode on a chip platform only supporting half-duplex communication.

In the scheme of the present invention, most of the chips supporting half-duplex communication are configured to use the same address (i.e., UART transceiving buffer) for the transmit buffer and the receive buffer. During full-duplex communication, the chip simultaneously sends and receives data, and because the UART transceiving buffers, the same address of the buffer cannot simultaneously store two data, so that the received and sent data collide (namely, when data is sent and received, the data is not sent and is received, and the received data is stored in the UART transceiving buffer to cause the loss of the sent data), the communication function is disordered, and the problem can be solved in the internal resources of the half-duplex chip.

In an alternative embodiment, a UART scheme is simulated using a set of UARTs (i.e., UARTs) + common outlets + internal counters.

If the full-duplex communication cannot be realized by simultaneously using two sets of UART ports due to limited chip resources or the need of using multiple sets of UART ports in practical application, an internal counter can be used for timing different times according to different baud rates and controlling the level of a common output port to simulate the UART transmitting function, so that the full-duplex communication requirement is realized.

In functional logic, the UART receiving function is used, and the transmitting function is not used; the transmitting function simulates a UART time sequence by using an internal counter and a common IO port, so that the UART transmitting function is realized.

Specifically, the algorithm steps of the external interrupt simulating UART transmission may be as follows:

step a, power-on initialization, in which a common IO port (i.e., a transmission IO port) of a transmission port using an analog UART function is set to a high level, and a counter to be used is initialized (interrupt enable is turned on, and the counter interrupt entry time is, for example, 4800bps, the entry time of the counter is 1/4800 ═ 0.208 ms).

Wherein, turning on interrupt enable means: the chip has a plurality of resources, and the timer, the UART receiving and the UART sending are all interrupt operations; taking a timer as an example, if the chip timer resource needs to be used, the interrupt enable needs to be turned on, which indicates to turn on the chip resource signal, and the chip can enter the timer interrupt.

The counter interrupt entry time refers to: the timer is an interrupt, and after the timer is set, the timer enters a timer interrupt function at set time intervals to process programs in the function.

B, judging whether data needs to be sent, if not, not carrying out any treatment; if so, storing the data to be transmitted into the variable A, calculating the check bit, and starting the counter to time.

For example: whether data needs to be sent or not can be determined according to the two-party communication protocol, if the user operates the air conditioner, the operation mode is changed (possibly a windshield is changed or the mode is changed), the operation mode of the air conditioner of the communication module needs to be updated synchronously, and the data needs to be sent at this time.

The check bit is judged to be odd check, even check or no check according to the communication protocol specified by the two communication party modules, the check bit is present in the embodiment, and if the communication protocol has no check bit, the step is skipped to directly send the end bit.

And c, entering timer interruption, judging the number of bits (such as a variable B) of the data to be sent, and processing according to a judgment result. Namely, the transmitted data is judged, the timer time is set according to the baud rate, the next data bit is transmitted when the timer time is up, and the UART transmitting function is simulated.

The UART transmit data is a byte, taking transmit data 0x55 (this data is variable a) as an example, and the data format of the UART transmit data is as follows: start bit (bit0) + data (0x55) + check bit (bit1 or bit0) + end bit (bit 1). Here, the end bit may be one bit or two bits depending on the protocols of both parties.

Optionally, if the variable B is zero, it indicates that a start bit needs to be sent, and the sending IO port is set to a low level.

Alternatively, if the variable B is not zero and is less than 9, it represents (for example, the variable a) bits of the data to be transmitted (here, the variable a has a size of one byte, i.e., 8 bits, and the variable B has exactly 1-8 bits, so that each data bit of the variable a can be transmitted in turn by using this relationship).

Alternatively, if the variable B is 9, it indicates that the check bit is transmitted.

Alternatively, if the variable B is greater than 9, the end bit is sent, the send IO port is set to high level (the end bit is sent once or twice according to the communication protocol, in this example, one end bit is taken as an example, two end bits are sent only once more), and the end bit is sent.

Wherein, after the transmission is completed, the variable B is added by 1.

D, if the data transmission of one frame is finished, resetting the variable, closing the timer interruption, and turning to the step b; if the frame data is not transmitted completely, waiting, and continuing to transmit the data with the timer.

In the scheme of the invention, two groups of different UART ports of a chip supporting half-duplex communication are adopted to receive and send data, or one group of UART ports and external interrupt simulation UART are adopted to receive.

Since the processes and functions implemented by the controller of this embodiment substantially correspond to the embodiments, principles and examples of the apparatus shown in fig. 1, reference may be made to the related descriptions in the foregoing embodiments without being detailed in the description of this embodiment.

Through a large number of tests, the technical scheme of the invention can realize the full-duplex communication function of the chip by using the internal timer resource which only can support the half-duplex communication chip, ensure the normal full-duplex communication function and reduce the cost of finished products.

According to an embodiment of the present invention, a data communication method corresponding to a controller is also provided, as shown in fig. 2, which is a schematic flow chart of an embodiment of the method of the present invention. The data communication method of the controller may include: step S110 and step S120.

At step S110, UART reception of data is achieved through the UART receiving module based on its own UART receiving function.

At step S120, UART transmission of data is achieved by using a UART module as a UART transmitting module, simulating a UART transmitting timing of the UART module, or based on a UART transmitting function of the UART module itself. Preferably, the UART transmitting module may be configured to simulate a UART transmitting timing of the UART module by using a counter and an IO port, or implement UART transmission of data based on a UART transmitting function of the UART module itself. That is, the analog UART module may be configured to simulate a UART transmission timing of the UART module by using an internal counter of the controller and an external IO port, or to implement UART transmission of data based on a UART transmission function of the UART module itself.

Optionally, with reference to the flowchart of an embodiment of the method of the present invention shown in fig. 3, in which the UART transmitting timing of the UART module is simulated by the simulated UART module, a specific process of simulating the UART transmitting timing of the UART module by the simulated UART module in step S120 is further described, which may include: step S210 to step S230.

Step S210, simulating a UART sending function of the UART module through an output module, to implement data sending.

And step S220, timing according to the set baud rate range through a counting module to obtain timing time.

Step S230, controlling, by the control module, the transmission timing sequence of the output module according to the timing time, so as to realize that the output module simulates the UART transmission function of the UART module.

That is, the apparatus for implementing the data communication method may include: the device comprises a UART module, an output module, a counting module and a control module. The output module, the counting module and the control module are all internal resource modules of the controller.

Further optionally, with reference to a flowchart of an embodiment of controlling the sending timing of the output module according to the timing time in the method of the present invention shown in fig. 4, a specific process of controlling the sending timing of the output module according to the timing time (specifically, controlling the sending timing of the output module according to the timing time by the control module in step S230) will be further described, which may include: step S310 to step S340.

Step S310, controlling the controller to power on and initialize, setting the port level of the output module as a first signal, and configuring the counting module according to a preset interrupt requirement. For example: the first signal may be high.

Step S320, it is determined whether data needs to be transmitted.

Step S330, if data needs to be sent, storing the data to be sent, calculating the check bit of the data to be sent, and starting the counting function of the counting module.

Step S340, under the control of the timing interruption of the counting module, controlling the output module to transmit the next data bit according to the preset baud rate under the condition that the timing time arrives, so as to realize the UART transmission of data by simulating the UART transmission time sequence; and if the data does not need to be sent, continuing to wait.

More optionally, with reference to a flowchart of an embodiment of the method shown in fig. 5, in which the next data bit is sent according to the preset baud rate when the timing time arrives, further describing a specific process of sending the next data bit according to the preset baud rate when the timing time arrives (specifically, the step S340 of controlling the output module by the control module according to the preset baud rate to send the next data bit when the timing time arrives) may include: step S410 and step S420.

Step S410, determining the position of the data bit number of the data to be transmitted in the preset value range.

Step S420, after adjusting the port level of the output module according to the position or sending the corresponding data of the corresponding data bit, controlling the number of the data bits to be automatically increased, or closing the counting function of the counting module after sending the end bit. For example: after the transmission is completed, the variable B is added by 1. If the data transmission of one frame is finished, resetting the variable, closing the timer interruption, and turning to the step b; if the frame data is not completely transmitted, waiting for the timer to time up, and continuing to transmit the data.

Further optionally, in step S420, adjusting the port level of the output module or sending the corresponding data of the corresponding data bit through the control module according to the position (that is, adjusting the port level of the output module or sending the corresponding data of the corresponding data bit through the control module according to the position where the number of the data bits of the data to be sent is in the preset value range) may include any one of the following sending situations.

The first transmission scenario: and if the number of the data bits is the lower limit of the preset numerical range, sending an initial bit, namely setting the port level of the output module as a second signal. For example: the second signal may be a low level signal.

The second transmission scenario: and if the number of the data bits is larger than the lower limit of a preset numerical range and smaller than the upper limit of the preset numerical range, sequentially sending each data bit of the data to be sent according to the size sequence of the number of the data bits.

The third transmission scenario: and if the number of the data bits is equal to the upper limit of the preset numerical range, transmitting check bits.

A fourth transmission scenario: and if the number of the data bits is larger than the upper limit of the preset numerical range, sending an end bit, and setting the port level of the output module as a first signal.

Since the processing and functions implemented by the method of the present embodiment substantially correspond to the embodiments, principles, and examples of the controller, reference may be made to the related descriptions in the embodiments without being detailed in the description of the present embodiment, which is not described herein again.

Through a large number of tests, the technical scheme of the embodiment is adopted, UART communication resources of a half-duplex chip and internal timing interruption are used as resource configuration for completing full-duplex communication, an internal counter is used for timing different times according to different baud rates, the level of a common output port is controlled to simulate the UART sending function, a full-duplex communication mode is realized on a chip platform only supporting half-duplex communication, the cost is low, and the user experience is good.

In summary, it is readily understood by those skilled in the art that the advantageous modes described above can be freely combined and superimposed without conflict.

The above description is only an example of the present invention, and is not intended to limit the present invention, and it is obvious to those skilled in the art that various modifications and variations can be made in the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A data communication device, comprising: the UART receiving module and the UART transmitting module; wherein,

the UART receiving module comprises: the UART module is used for realizing UART receiving of data based on the UART receiving function of the UART module;

the UART transmitting module is used for simulating a UART transmitting time sequence of the UART module or realizing the UART transmission of data based on the UART transmitting function of the UART module;

wherein, the UART sending module comprises: the UART module is used for simulating a UART sending time sequence of the UART module to realize the UART sending of data; or another UART module, the other UART module is used for realizing the UART sending of data based on the UART sending function of the UART module.

2. The apparatus of claim 1, wherein the analog UART module comprises: the device comprises an output module, a counting module and a control module; wherein,

the output module is used for simulating a UART sending function of the UART module to realize data sending;

the counting module is used for timing according to the set baud rate range to obtain timing time;

and the control module is used for controlling the sending time sequence of the output module according to the timing time so as to realize the simulation of the UART sending function of the UART module by the output module.

3. The apparatus of claim 2, wherein,

the UART module includes: a UART communication resource module of the half-duplex chip; and/or the presence of a gas in the gas,

the output module includes: an IO port of the controller; and/or the presence of a gas in the gas,

the counting module comprises: the internal timing of the controller interrupts the resource module.

4. The apparatus according to claim 2 or 3, wherein the control module controls the transmission timing of the output module according to the timing time, and comprises:

controlling the controller to be electrified and initialized, setting the port level of the output module as a first signal, and configuring the counting module according to a preset interrupt requirement;

determining whether data needs to be transmitted;

if the data needs to be sent, storing the data to be sent, calculating a check bit of the data to be sent, and starting a counting function of the counting module;

under the control of the timing interruption of the counting module, the output module is controlled to transmit the next data bit according to the preset baud rate under the condition that the timing time arrives, so that the UART transmission of data is realized by simulating the UART transmission time sequence.

5. The apparatus of claim 4, wherein the control module controls the output module to send the next data bit according to a predetermined baud rate when the timing time arrives, comprising:

determining the position of the number of data bits of data to be sent in a preset value range;

and after the port level of the output module is adjusted according to the position or corresponding data of corresponding data bits are sent, controlling the number of the data bits to be automatically increased or closing the counting function of the counting module after sending an end bit.

6. The apparatus of claim 5, wherein the control module adjusts the port level of the output module or sends corresponding data of corresponding data bits according to the position, comprising:

if the number of the data bits is the lower limit of a preset numerical range, sending an initial bit, namely setting the port level of the output module as a second signal;

if the number of the data bits is larger than the lower limit of a preset numerical range and smaller than the upper limit of the preset numerical range, sequentially sending each data bit of data to be sent according to the size sequence of the number of the data bits;

if the number of the data bits is equal to the upper limit of a preset numerical range, transmitting check bits;

and if the number of the data bits is larger than the upper limit of the preset numerical range, sending an end bit, and setting the port level of the output module as a first signal.

7. A controller, comprising: a data communications device according to any one of claims 1 to 6.

8. A data communication method of a controller according to claim 7, comprising:

the UART module is used as a UART receiving module, and the UART receiving of data is realized based on the UART receiving function of the UART module;

the UART sending module is used for simulating a UART sending time sequence of the UART module or realizing the UART sending of data based on the UART sending function of the UART module;

wherein, the UART sending module comprises: the UART module is used for simulating a UART sending time sequence of the UART module to realize UART sending of data; or another UART module, the other UART module is used for realizing the UART sending of data based on the UART sending function of the UART module.

9. The method of claim 8, wherein simulating the UART transmit timing of the UART module by the simulated UART module comprises:

simulating a UART sending function of the UART module through an output module to realize data sending;

timing according to the set baud rate range through a counting module to obtain timing time;

and controlling the sending time sequence of the output module according to the timing time through a control module, so as to realize that the output module simulates the UART sending function of the UART module.

10. The method of claim 9, wherein controlling, by a control module, a transmission timing of the output module according to the timing time comprises:

determining whether data needs to be transmitted;

11. The method of claim 10, wherein controlling the output module to send the next data bit according to the predetermined baud rate at the timing time by the control module comprises:

12. The method of claim 11, wherein adjusting, by a control module, a port level of the output module or sending corresponding data of a corresponding data bit according to the position comprises: