CN109887536A - A kind of non-volatile memory cell structure - Google Patents

A kind of non-volatile memory cell structure Download PDF

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Publication number
CN109887536A
CN109887536A CN201910117375.9A CN201910117375A CN109887536A CN 109887536 A CN109887536 A CN 109887536A CN 201910117375 A CN201910117375 A CN 201910117375A CN 109887536 A CN109887536 A CN 109887536A
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China
Prior art keywords
volatile memory
memory cell
field effect
effect transistor
semiconductor field
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CN201910117375.9A
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Chinese (zh)
Inventor
景蔚亮
王海波
张格毅
陈邦明
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Shanghai Xinchu Integrated Circuit Co Ltd
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Shanghai Xinchu Integrated Circuit Co Ltd
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Priority to CN201910117375.9A priority Critical patent/CN109887536A/en
Publication of CN109887536A publication Critical patent/CN109887536A/en
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Abstract

The present invention relates to memory cell structure field more particularly to a kind of non-volatile memory cell structures.It is characterized in that, including the first Metal Oxide Semiconductor Field Effect Transistor, the second Metal Oxide Semiconductor Field Effect Transistor, a non-volatile memory cells and a capacitor, the source electrode of first Metal Oxide Semiconductor Field Effect Transistor is connected with the grid of second Metal Oxide Semiconductor Field Effect Transistor, one end of the capacitor is connected with the source electrode of first Metal Oxide Semiconductor Field Effect Transistor, and the other end of the capacitor is connected with the non-volatile memory cells.The present invention improves the read or write speed of Memory Storage Unit, can automatically save data, and chronically storing data, save a large amount of power consumption by providing a kind of non-volatile memory cell structure.

Description

A kind of non-volatile memory cell structure
Technical field
The present invention relates to memory cell structure field more particularly to a kind of non-volatile memory cell structures.
Background technique
Although current volatile storage such as dynamic random access memory has faster read or write speed, but due to it Volatibility needs constantly to carry out the refreshing of data, thereby results in a large amount of power consumption penalty.And although nonvolatile memory has The features such as powering off energy consumption non-volatile, high and low by byte access, storage density, but it is slower often to read or write speed, therefore cannot use In memory or the field more demanding to read or write speed.With the development of artificial intelligence, deep learning algorithm needs faster Read or write speed carries out the training of neural network model, and after training, the supplemental characteristic in neural network model is kept substantially It is constant, if these constant data, which are stored in the memory of volatibility, will expend a large amount of power consumption, but it is stored in Non-volatile memories wherein often impact performance since the read or write speed of nonvolatile memory is lower.Based on this Invention propose it is a kind of it is non-volatile can fast reading and writing storage unit, both improved the read-write speed of Memory Storage Unit Degree, at the same can chronically storing data, save a large amount of power consumption.
Summary of the invention
The object of the present invention is to provide a kind of non-volatile memory cell structures, solve the above technical problem.
Technical problem solved by the invention can be realized using following technical scheme:
A kind of non-volatile memory cell structure, which is characterized in that including the first metal oxide semiconductor field-effect crystalline substance Body pipe, the second Metal Oxide Semiconductor Field Effect Transistor, a non-volatile memory cells and a capacitor, first metal The grid phase of the source electrode of oxide semiconductor field effect transistor and second Metal Oxide Semiconductor Field Effect Transistor Even, one end of the capacitor is connected with the source electrode of first Metal Oxide Semiconductor Field Effect Transistor, the capacitor The other end is connected with the non-volatile memory cells.
Preferably, first Metal Oxide Semiconductor Field Effect Transistor and the second metal oxide semiconductcor field effect Answering transistor is N-type Metal Oxide Semiconductor Field Effect Transistor or P type metal oxide semiconductor field effect transistor.
Preferably, the non-volatile memory cells are flash memory cell.
Preferably, the non-volatile memory cells are phase-change memory cell.
Preferably, the capacitor is the parasitic capacitance of the non-volatile memory cells.
Preferably, the capacitor is the independent capacitance of the non-volatile memory cells.
Preferably, the independent capacitance is metal capacitance.
Preferably, the independent capacitance is semicoductor capacitor.
Preferably, under write data mode, the write-in bit line of first Metal Oxide Semiconductor Field Effect Transistor adds High level, write-in wordline increase level or low level;Under read data pattern, second metal oxide semiconductor field-effect is brilliant The readout bit line of body pipe increases level, detects the level in sense word line;It saves under data pattern, the metal oxide is partly led The source electrode line high voltage of body field effect transistor.
Preferably, the non-volatile memory cells are used to store the supplemental characteristic of neural network model.
The beneficial effect is that:
The present invention improves the read-write speed of Memory Storage Unit by providing a kind of non-volatile memory cell structure Degree, can automatically save data, and chronically storing data, save a large amount of power consumption.
Detailed description of the invention
Fig. 1 is a kind of schematic diagram of non-volatile memory cell structure;
Fig. 2 is the flow diagram of storage unit;
Fig. 3 is the structural schematic diagram of flash memory.
Appended drawing reference indicates explanation in description above:
1, the first MOS memory;
2, the second MOS memory;
3, capacitor;4, non-volatile memory cells;
5, flash memory cell.
BL: bit line;WBL: write-in bit line;RBL: readout bit line;
WL: wordline;WWL: write-in wordline;RWL: sense word line;
SL: source electrode line.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art without creative labor it is obtained it is all its His embodiment, shall fall within the protection scope of the present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase Mutually combination.
The present invention will be further explained below with reference to the attached drawings and specific examples, but not as the limitation of the invention.
As shown in Figure 1, a kind of non-volatile memory cell structure, which is characterized in that partly led including the first metal oxide Body field effect transistor 1, the second Metal Oxide Semiconductor Field Effect Transistor 2, a non-volatile memory cells 4 and a capacitor 3, the source electrode of the first Metal Oxide Semiconductor Field Effect Transistor 1 and the second Metal Oxide Semiconductor Field Effect Transistor 2 Grid be connected, 3 one end of capacitor are connected with the source electrode of the first Metal Oxide Semiconductor Field Effect Transistor 1, capacitor 3 it is another One end is connected with non-volatile memory cells 4.
In preferred embodiments of the present invention, as shown in Fig. 2, 5 start-up operation process of whole memory cell is as follows, it is single in storage During memory operation where member 5, only the first Metal Oxide Semiconductor Field Effect Transistor 1, the second metal oxide Semiconductor field effect transistor 2 and capacitor 3 participate in work, and when data 1 or 0 is written, write-in bit line increases level, and wordline is written Increasing level, perhaps low level fills high voltage or low-voltage on capacitor 3 as a result,;When data are read, readout bit line increases electricity It is flat, the level in sense word line is then detected, the data for detecting that high level or low level respectively represent reading are 1 or 0;When depositing Reservoir will stop working, and when needing to save data, to high voltage on source electrode line, data 1 or 0 are written to non-volatile deposit Long-term preservation data are carried out in storage unit.
In preferred embodiments of the present invention, as shown in figure 3, the first Metal Oxide Semiconductor Field Effect Transistor 1 and Two Metal Oxide Semiconductor Field Effect Transistor 2 are that N-type Metal Oxide Semiconductor Field Effect Transistor or p-type metal aoxidize Object semiconductor field effect transistor, non-volatile memory cells 4 are flash memory cell or phase-change memory cell.
In preferred embodiments of the present invention, capacitor 3 is the parasitic capacitance 3 of independent capacitance 3 or non-volatile memory cells 4, Independent capacitance 3 is semi-conductor electricity perhaps metal capacitance, and semicoductor capacitor is mos pipe capacitor.
In preferred embodiments of the present invention, storage neural network mould is carried out using by the memory of storage unit of the present invention Data in type, supplemental characteristic during training in neural network model are constantly updated, be it is continually changing, at this time only Using the first Metal Oxide Semiconductor Field Effect Transistor of N/P type 1, the second metal oxide semiconductor field-effect of N/P type is brilliant Body pipe 2 and capacitor 3 work, and after training is completed, the supplemental characteristic of neural network model no longer updates, and will count at this time According to being stored in non-volatile memory cells 4;When neural network model needs to be trained or make inferences again, data The training process or reasoning process for carrying out neural network model are read out from non-volatile storage unit 4, can both be mentioned in this way The speed that supply training process is read and write faster, promotes neural network model training performance, and can not expend excessive function Data are saved on the basis of consumption for a long time.
The foregoing is merely preferred embodiments of the present invention, are not intended to limit embodiments of the present invention and protection model It encloses, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content Equivalent replacement and obviously change obtained scheme, should all be included within the scope of the present invention.

Claims (10)

1. a kind of non-volatile memory cell structure, which is characterized in that including the first metal oxide semiconductor field effect transistor Pipe, the second Metal Oxide Semiconductor Field Effect Transistor, a non-volatile memory cells and a capacitor, first metal oxygen The source electrode of compound semiconductor field effect transistor is connected with the grid of second Metal Oxide Semiconductor Field Effect Transistor, One end of the capacitor is connected with the source electrode of first Metal Oxide Semiconductor Field Effect Transistor, the capacitor it is another End is connected with the non-volatile memory cells.
2. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that the first metal oxidation Object semiconductor field effect transistor and the second Metal Oxide Semiconductor Field Effect Transistor are N-type MOS field Effect transistor or P type metal oxide semiconductor field effect transistor.
3. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that the non-volatile memories Unit is flash memory cell.
4. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that the non-volatile memories Unit is phase-change memory cell.
5. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that the capacitor is described non- The parasitic capacitance of volatile memory cell.
6. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that the capacitor is described non- The independent capacitance of volatile memory cell.
7. a kind of non-volatile memory cell structure according to claim 6, which is characterized in that the independent capacitance is gold Belong to capacitor.
8. a kind of non-volatile memory cell structure according to claim 6, which is characterized in that the independent capacitance is half Capacitance of conductor.
9. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that under write data mode, institute The write-in bit line for stating the first Metal Oxide Semiconductor Field Effect Transistor increases level, and write-in wordline increases level or low electricity It is flat;Under read data pattern, the readout bit line of second Metal Oxide Semiconductor Field Effect Transistor increases level, and detection is read Level in wordline out;It saves under data pattern, the source electrode line of the Metal Oxide Semiconductor Field Effect Transistor increases electricity Pressure.
10. a kind of non-volatile memory cell structure according to claim 1, which is characterized in that described non-volatile to deposit Storage unit is used to store the supplemental characteristic of neural network model.
CN201910117375.9A 2019-02-13 2019-02-13 A kind of non-volatile memory cell structure Pending CN109887536A (en)

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CN116206643A (en) * 2022-07-25 2023-06-02 北京超弦存储器研究院 Dynamic random access memory unit, memory device and reading method

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Cited By (2)

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Publication number Priority date Publication date Assignee Title
CN116206643A (en) * 2022-07-25 2023-06-02 北京超弦存储器研究院 Dynamic random access memory unit, memory device and reading method
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