CN109599489A - High q-factor three-dimensional spiral structure inductance based on MEMS technology and preparation method thereof - Google Patents
High q-factor three-dimensional spiral structure inductance based on MEMS technology and preparation method thereof Download PDFInfo
- Publication number
- CN109599489A CN109599489A CN201811186644.9A CN201811186644A CN109599489A CN 109599489 A CN109599489 A CN 109599489A CN 201811186644 A CN201811186644 A CN 201811186644A CN 109599489 A CN109599489 A CN 109599489A
- Authority
- CN
- China
- Prior art keywords
- layer
- spiral winding
- coil
- spiral
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005516 engineering process Methods 0.000 title claims abstract description 27
- 238000002360 preparation method Methods 0.000 title abstract description 4
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 238000004804 winding Methods 0.000 claims abstract description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 25
- 239000010703 silicon Substances 0.000 claims abstract description 25
- 238000009413 insulation Methods 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000011810 insulating material Substances 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 87
- 238000000034 method Methods 0.000 claims description 33
- 239000010949 copper Substances 0.000 claims description 23
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 20
- 229910052802 copper Inorganic materials 0.000 claims description 20
- 238000001259 photo etching Methods 0.000 claims description 17
- 230000008569 process Effects 0.000 claims description 16
- 238000011161 development Methods 0.000 claims description 14
- 238000004544 sputter deposition Methods 0.000 claims description 13
- 238000009713 electroplating Methods 0.000 claims description 11
- 238000007747 plating Methods 0.000 claims description 11
- 238000004140 cleaning Methods 0.000 claims description 7
- 229910052681 coesite Inorganic materials 0.000 claims description 6
- 229910052906 cristobalite Inorganic materials 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052682 stishovite Inorganic materials 0.000 claims description 6
- 229910052905 tridymite Inorganic materials 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 5
- 229910021641 deionized water Inorganic materials 0.000 claims description 5
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 239000002356 single layer Substances 0.000 claims description 4
- 239000003792 electrolyte Substances 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 230000003071 parasitic effect Effects 0.000 abstract description 3
- 238000004377 microelectronic Methods 0.000 abstract description 2
- 238000012536 packaging technology Methods 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 8
- 230000008859 change Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 230000006698 induction Effects 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000012010 growth Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 230000034655 secondary growth Effects 0.000 description 2
- 239000000725 suspension Substances 0.000 description 2
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- LDDQLRUQCUTJBB-UHFFFAOYSA-N ammonium fluoride Chemical compound [NH4+].[F-] LDDQLRUQCUTJBB-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 229920002457 flexible plastic Polymers 0.000 description 1
- -1 line width 15um Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
- 125000004469 siloxy group Chemical group [SiH3]O* 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000031068 symbiosis, encompassing mutualism through parasitism Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Coils Or Transformers For Communication (AREA)
Abstract
The invention belongs to microelectronics technologies, specially the high q-factor three-dimensional spiral structure integrated inductor and preparation method thereof based on MEMS technology.Three-dimensional spiral structure integrated inductor of the invention includes supporter between silicon substrate, substrate insulation layer, spiral winding, spiral winding；The substrate insulation layer forms electrical connection by the cylindrical metal in intercoil insulation layer for inductance spiral winding and silicon substrate, spiral winding to be isolated.The present invention is using the three-dimensional perpendicular Integrated Solution improved, inductance and silicon substrate is isolated by substrate insulation layer, reduce substrate loss, and vertical spin structure is supported by insulating materials, the upward Vertical collection lattice coil in lesser area, ultimately form be lost low, stray parasitic capacitance is small, with high q-factor, compatible with packaging technology, mechanically stable miniature integrated inductor simultaneously.
Description
Technical field
The invention belongs to microelectronics technologies, and in particular to a kind of high q-factor three-dimensional spiral structure inductance and its production side
Method.
Background technique
In the past 30 years, as the function of the handheld devices such as the development of electronic communication, intelligent consumption electronics is continuously increased,
Inductance is widely used in integrated circuits as one of key element, plays matching network, filtering, storage energy, chokes etc.
Effect.Traditional discrete formula inductance has no longer been met growing due to the restriction of its packaging cost, size and performance condition
Demand, the inductance demand with low energy consumption, small size, low noise, high band continue to increase.
Integrated inductor generallys use the realization of metal spiral form, by selecting its characteristic size, shape and structure and realization
Mode, may be implemented to the different designs of integrated inductor with change and improve.Additionally due to the CMOS radio circuit of standard is usual
It is to be formed on the substrate of low-resistivity, planar spiral inductor would generally be shown because of serious substrate and ohmic loss
Lower Q value, with the increase of IC working frequency, substrate loss can be increasingly severe, leads to the reduced performance of film inductor.
In order to reduce substrate loss and ohmic loss, the effort of many technologies has been made in MEMS technology field in this respect, passes through change
Inductance performance is continuously improved in the methods of substrate material, induction structure and packing material.
It carries out analysis to existing literature data to find, the existing method for improving integrated inductor performance includes: (1) improvement lining
Bottom is partially formed in P+ silicon substrate porous to reduce ghost effect and substrate loss, including the use of HF electrochemical anodic oxidation
Silicon makes film inductor using porous substrate[1], or using flexible plastic substrate and low k dielectric films improvement substrate, have
Effect reduces the vortex section of shunt conductance and capacitor and inductor series resistance, to realize higher Q value.(2) the integrated electricity of optimization
Feel structure, including suspension beam supports two-dimensional helical inductance[2,3], i.e., using the firm micromechanics with the support of cross interlayer film
Spiral inductor enhances structural rigidity and signal stabilization, and eliminates the variation of inductance caused by temperature change, hangs simultaneously
The silicon substrate of Fuliang structure removal below proposes high q-factor to inhibit substrate loss；Design three-dimensional spiral pipe inductor[4], pass through
Air gap is introduced between substrate and conductor coils to reduce the influence of substrate dielectric constant, made inductance has less base
Plate dependence magnetism, less stray capacitance and higher Q factor；Embedded suspension solenoid structure inductance[5], pass through compact cloth
Office saves area occupied 50% while guaranteeing inductance performance.
However above-mentioned all kinds of methods are respectively present compatible integrated inconvenient, the subsequent encapsulation difficulty of process complexity, IC, machinery
Stability is insufficient, the highly difficult various problem such as big of process costs, difficult Quan Qimei.
[1] Chong K, Xie Y, Yu K, Huang D and Chang M. High-performance
inductors integrated on porous silicon. IEEE Electron Device Letters 2005;
26:93–95.
[2] Lin J, Chen C and Cheng Y. A robust high-Q micromachined RF inductor
for RFIC applications. IEEE Transactions on Electron Devices 2005; 52:1489-
1496.
[3] Yoon J, Choi Y, Kim B, Eo Y, and Yoon E. CMOS-compatible surface-
micromachined suspended-spiral inductors for multi-GHz silicon RF ICs. IEEE
Electron Device Letters 2002; 23:591-593.
[4] Kim Y and Allen M. Surface micromachined solenoid inductors for high
frequency applications. IEEE Transactions on Components, Packaging, and
Manufacturing Technology: PART C 1998; 21:26-33.
[5] Gu L and Li X. Concave-suspended high-Q solenoid inductors with an
RFIC-compatible bulkmicromachining technology. IEEE Transactions on Electron
Devices 2007; 54:882-885.。
Summary of the invention
It is an object of the invention to overcome the shortcomings of above-mentioned induction structure, provide it is a kind of effectively substrate can be inhibited to be lost, it is miscellaneous
Dissipate the small high q-factor three-dimensional spiral structure inductance and preparation method thereof of parasitic capacitance.
High q-factor three-dimensional spiral structure inductance provided by the invention is based on MEMS technology, using the three-dimensional perpendicular of improvement
Integrated Solution, the upward Vertical collection lattice coil in lesser area support vertical spin structure by insulating materials.
High q-factor three-dimensional spiral structure integrated inductor provided by the invention based on MEMS technology, including silicon substrate 1, base
Supporter 4 between insulating layer 2, spiral winding 3, coil；The substrate insulation layer 2 is for being isolated inductance spiral winding 3 and silicon substrate
1；The spiral winding 3 forms electrical connection by the cylindrical metal 5 in intercoil insulation layer.
In the present invention, plasma-reinforced chemical vapor deposition method is can be used with a thickness of 6~10 um in substrate insulation layer, point
The realization of two steps, every 3~5 um of secondary growth.
In the present invention, single-layer spiral coil 3 is octagonal, the figure of eight, round rectangle or other similar shape with unfilled corner
Shape, 10~15 um of line width, external dimensions are designed as desired, are can be controlled within 180 um.
In the present invention, in spiral winding, each layer of helical coil structure is identical, and only unfilled corner position is different, has and repeats
Property；Through-hole is formed by unfilled corner, to realize that electric interconnection between layers is prepared.
In the present invention, the single-layer spiral coil structure realizes that spiral winding is recessed by photoetching and wet-etching technology
Structure is fallen into, since lattice coil structure has repeatability, photoetching process need to only adjust the angle of lay photoetching mask plate (Mask)
Mask is reused to realize multilayer photoetching process, save the cost.
In the present invention, the notch and through-hole form through-hole using photoetching and etching technics by supporter between coil,
Again by sputtering seed layer and adhesion layer and subsequent electroplating process, cylindrical metal is formed to provide electrical connection.
In the present invention, adhesion layer and plating seed layer are respectively formed using magnetron sputtering TiW and Cu.
In the present invention, spiral winding metal layer is formed using electroplating technology, and coated metal is copper, with a thickness of 3~5 um.
In the present invention, supporter is photosensitive insulating material between multiple spiral windings, supports photoetching process, simplifies inductance manufacture
Technique, such as photosensitive PI material or the photosensitive insulating cement of siloxy group (such as SAP2038 model) material.
In the present invention, supporting layer is between multiple spiral windings with a thickness of 3~5 um.
In the present invention, the number of plies of spiral winding has expandability, according to the need to inductance quality factor and inductance value size
It asks, eight layers can be expanded to from single layer, more layers is even reached when adjusting process control is good.
The present invention also provides the production methods of above-mentioned high q-factor three-dimensional spiral structure inductance, the specific steps are as follows:
Step 1: by plasma-reinforced chemical vapor deposition (PECVD) method grown above silicon a layer thickness be 6~10 um
SiO2Dielectric layer reduces substrate loss for inductance coil and silicon substrate to be isolated as substrate insulation layer；
The substrate insulation layer good insulating, thickness are larger, other techniques can also be used or insulating materials is substituted.When growth
It can realize in two steps, every 3~5 um of secondary growth；
Step 2: photoetching is carried out to substrate insulation layer, forms notched spiral winding pattern, and etched, sputtering adhesion layer and
The techniques such as seed layer, copper plating form coil；
Since each layer of spiral winding pattern is all similar, only gap position is different, and therefore, photoetching process need to only adjust mask
The angle of version (Mask), it can realize multilayer photoetching process, save the cost；
The etching carries out wet etching to coil pattern using BOE solution, by the control time to SiO2Realize different-thickness
Etching, formed first layer coil recess；
The sputtering technology is respectively formed adhesion layer and plating seed layer using the method sputtering TiW and Cu of magnetron sputtering；
The electroplating technology, using copper-bath as electrolyte, plating forms the notched spiral winding of 3-5um thickness；
Step 3: the photosensitive insulating material of required thickness is coated on molded spiral winding, as supporter between coil, and
Photoetching, development cleaning are carried out, through-hole is formed, after sputtering adhesion layer, seed layer and copper plating process, copper, shape are filled up in through-hole
At copper microtrabeculae to connect next layer line circle；
Step 4: carrying out photoetching, development, the cleaning of next layer line circle on supporter between the coil for forming copper vias, form band and lack
The spiral winding pattern of mouth, and coil is formed through sputtering adhesion layer and seed layer, copper electroplating technology；
Step 3 and step 4 are repeated, lattice coil structure is formed, ultimately forms multi-layer three-dimension vertical spin structure integrated inductor.
Development described in step 3 and step 4 is cleaned, and is to immerse the silicon wafer that exposure is completed in developer solution to develop,
After the completion of development, fixing is impregnated in deionized water, then rinse silicon wafer with deionized water and dry up.
The sputtering and electroplating technology are the same as step 2.
High performance vertical spiral inductor can be achieved in the present invention, when the spiral winding number of plies is eight layers, line width 15um, interlayer
Reach away from inductance quality factor q peak value when can realize 3.5GHz frequency when being 180um for 5um, external dimensions up to 40, inductance value
12nH, self-resonance frequency can be adapted for working frequency range in the 5G communication equipment of 3.4~4.5GH or so, have more than 11GHz
Relatively broad application prospect.
The induction structure that the present invention makes, can effectively inhibit substrate loss, stray parasitic capacitance it is small, have high q-factor, simultaneously
It is compatible with packaging technology, have manufacturability, encapsulation compatibility, mechanical stability, cost is controllable.
Detailed description of the invention
Present invention will be further explained below with reference to the attached drawings and examples.
Fig. 1 is structure principle chart of the invention.
Fig. 2 is top view of the invention.
Figure label: 1 is silicon substrate, and 2 be substrate insulation layer, and 3 be spiral winding, 4 between coil supporter, 5 be column
Metal.
Specific embodiment
It is eight layers of helical structure integrated inductance structure of a high q-factor based on MEMS technology in Fig. 1, Fig. 2 is that the inductance is bowed
View, wherein inductance input, output end are convenient for later period inductance measurement and encapsulation in same plane.
Before carrying out photoetching process, designing mask version, this is the higher part of accounting in process costs.In view of due to multilayer
The vertical solenoidal inductor of coil has certain geometry repeatability, by taking 8 layers of design vertical solenoidal inductor as an example, 5
Pattern to the technique corresponding with 1 to 4 layer of reticle pattern needed for 8 layer line circles is nearly identical, need to only cover 1 to 4 layer
Film version rotates clockwise 90 degree, can be used to 5 to 8 layers of coil process.Therefore, in designed mask version, each structure is corresponding
Reticle pattern carry out the arrangement of centrosymmetric " time " font, and carry out rotary alignment label, greatly reduce whole set process institute
Mask plate number is needed, manufacturing cost is reduced.
Concrete technology flow process is as follows:
1) pass through the long 6um thickness of plasma-reinforced chemical vapor deposition (PECVD) method symbiosis twice on two cun of Silicon Wafers
SiO2Layer is used as substrate insulation layer, wherein the SiO of single PECVD deposit growth 3um thickness2；
2) AZ5214 photoresist, front baking 90 seconds, exposure, development, post bake, wet etching under 95 degree, quarter are applied on substrate insulation layer
Wet etching is carried out to coil pattern using HF: NH4F=1: 7 BOE solution when erosion, etch rate is about 300-
400nm/min, by the control time to SiO2The etching for realizing different-thickness, thus in substrate insulation layer SiO2The is formed on layer
One layer of coil recess sputters adhesion layer and plating seed layer by magnetron sputtering on the silicon wafer for form coil pattern, will
The silicon wafer for having sputtered seed layer is put into plating metal copper in electroplate liquid, forms coil；Recycle acetone remove photoresist, and with from
Beamlet lithographic method removes seed layer and adhesion layer.So far, first layer spiral winding is formed；
3) photosensitive insulating material of 3um thickness is coated on first layer spiral winding as supporter between coil, and is carried out photoetching, shown
Shadow cleaning, forms through-hole, fills up copper in through-hole after magnetron sputtering seed layer and electroplating technology, forms copper microtrabeculae to connect down
One layer line circle；
4) photoetching, development, the cleaning of next layer line circle are carried out on supporter between the coil for forming copper vias.Development and cleaning
When, the silicon wafer that exposure is completed is immersed in 2.38% TMAH developer solution and developed, the time 45 seconds, starts development 10 seconds or so
Suitably rock silicon wafer；After the completion of development, fixing 30 seconds is impregnated in deionized water；Silicon wafer is rinsed with deionized water again and is dried up,
To form notched spiral winding pattern, and adhesion layer and seed layer are sputtered, carry out copper plating, forms coil.So far, shape
At the second layer spiral winding being connected with first layer spiral winding by copper microtrabeculae；
3 and 4 two-step processs are repeated, until forming the 8th layer of spiral winding.So far, eight layers of spiral of the high q-factor based on MEMS technology
Structure integrated inductor technique finishes.
Illustrate embodiments of the present invention above by specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Claims (7)
1. a kind of high q-factor three-dimensional spiral structure integrated inductor based on MEMS technology characterized by comprising silicon substrate (1),
Supporter (4) between substrate insulation layer (2), spiral winding (3), spiral winding；The substrate insulation layer (2) is for being isolated inductance spiral shell
Spin line circle (3) and silicon substrate (1), the spiral winding (3) are electrically connected by cylindrical metal (5) formation in intercoil insulation layer
It connects；Wherein:
Single-layer spiral coil is octagonal, the figure of eight, round rectangle or other similar shape with unfilled corner in spiral winding (3)
Shape, 10~15 um of line width；
Each layer of helical coil structure is identical, and only unfilled corner position is different.
2. high q-factor three-dimensional spiral structure integrated inductor according to claim 1, which is characterized in that the metal of spiral winding
Layer is formed using electroplating technology, and coated metal is copper, with a thickness of 3~5 um.
3. high q-factor three-dimensional spiral structure integrated inductor according to claim 1, which is characterized in that between the spiral winding
Supporter (4) be it is multiple, buttress material is photosensitive insulating material；Supporting layer is with a thickness of 3~5 um.
4. high q-factor three-dimensional spiral structure integrated inductor according to claim 1, which is characterized in that the spiral winding (3)
The number of plies be one layer to eight layers.
5. high q-factor three-dimensional spiral structure integrated inductor according to claim 1, it is characterised in that the substrate insulation layer
(2) with a thickness of 6~10 um.
6. a kind of production method of high q-factor three-dimensional spiral structure integrated inductor, is based on MEMS technology, which is characterized in that tool
Steps are as follows for body:
Step 1: by plasma-reinforced chemical vapor deposition method in the SiO that grown above silicon a layer thickness is 6~10 um2It is situated between
Matter layer, as substrate insulation layer, for inductance coil and silicon substrate to be isolated；
Step 2: photoetching is carried out to substrate insulation layer, forms notched spiral winding pattern, and etched, sputtering adhesion layer and
Seed layer, copper electroplating technology form coil；Wherein:
The etching technics carries out wet etching to coil pattern using BOE solution, and etch rate is about 300-400nm/
Min, by the control time to SiO2It realizes the etching of different-thickness, forms first layer coil recess；
The sputtering technology is respectively formed adhesion layer and plating seed layer using the method sputtering TiW and Cu of magnetron sputtering；
The electroplating technology, using copper-bath as electrolyte, plating forms the notched spiral winding of 3-5um thickness；
Step 3: the photosensitive insulating material of required thickness is coated on molded spiral winding, as supporter between coil, and
Photoetching, development cleaning are carried out, through-hole is formed, after sputtering adhesion layer, seed layer and copper plating process, copper, shape are filled up in through-hole
At copper microtrabeculae to connect next layer line circle；
Step 4: carrying out photoetching, development, the cleaning of next layer line circle on supporter between the coil for forming copper vias, form band and lack
The spiral winding pattern of mouth, and coil is formed through sputtering adhesion layer and seed layer, copper electroplating technology；
Step 3 and step 4 are repeated, lattice coil structure is formed, ultimately forms multi-layer three-dimension vertical spin structure integrated inductor.
7. production method according to claim 6, which is characterized in that development described in step 3 and step 4 is cleaned, and is
The silicon wafer that exposure is completed is immersed in developer solution and is developed；After the completion of development, fixing is impregnated in deionized water；Spend again from
Sub- water rinses silicon wafer and dries up；
The sputtering and electroplating technology are the same as step 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811186644.9A CN109599489A (en) | 2018-10-12 | 2018-10-12 | High q-factor three-dimensional spiral structure inductance based on MEMS technology and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811186644.9A CN109599489A (en) | 2018-10-12 | 2018-10-12 | High q-factor three-dimensional spiral structure inductance based on MEMS technology and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109599489A true CN109599489A (en) | 2019-04-09 |
Family
ID=65957886
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811186644.9A Pending CN109599489A (en) | 2018-10-12 | 2018-10-12 | High q-factor three-dimensional spiral structure inductance based on MEMS technology and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109599489A (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5631476A (en) * | 1994-08-02 | 1997-05-20 | Sgs-Thomson Microelectronics S.R.L. | MOS-technology power device chip and package assembly |
| CN101523526A (en) * | 2006-08-01 | 2009-09-02 | 日本电气株式会社 | Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon |
| CN102569032A (en) * | 2012-01-16 | 2012-07-11 | 中国科学院上海微系统与信息技术研究所 | Method for manufacturing inductance element by overlapping multiple layers of metalized thin films |
| CN102779807A (en) * | 2012-01-16 | 2012-11-14 | 中国科学院上海微系统与信息技术研究所 | RDL (radiological defense laboratory) technology-compatible inductive component and manufacture method |
| CN102110673B (en) * | 2010-10-27 | 2014-01-29 | 中国科学院上海微系统与信息技术研究所 | Wafer level MMCM (microwave multichip module) packaging structure using photosensitive BCB (benzocyclobutene) as dielectric layer and method |
| CN106129047A (en) * | 2016-06-29 | 2016-11-16 | 北京时代民芯科技有限公司 | A kind of new producing method of planar spiral inductor |
-
2018
- 2018-10-12 CN CN201811186644.9A patent/CN109599489A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5631476A (en) * | 1994-08-02 | 1997-05-20 | Sgs-Thomson Microelectronics S.R.L. | MOS-technology power device chip and package assembly |
| CN101523526A (en) * | 2006-08-01 | 2009-09-02 | 日本电气株式会社 | Inductor element, inductor element manufacturing method, and semiconductor device with inductor element mounted thereon |
| CN102110673B (en) * | 2010-10-27 | 2014-01-29 | 中国科学院上海微系统与信息技术研究所 | Wafer level MMCM (microwave multichip module) packaging structure using photosensitive BCB (benzocyclobutene) as dielectric layer and method |
| CN102569032A (en) * | 2012-01-16 | 2012-07-11 | 中国科学院上海微系统与信息技术研究所 | Method for manufacturing inductance element by overlapping multiple layers of metalized thin films |
| CN102779807A (en) * | 2012-01-16 | 2012-11-14 | 中国科学院上海微系统与信息技术研究所 | RDL (radiological defense laboratory) technology-compatible inductive component and manufacture method |
| CN106129047A (en) * | 2016-06-29 | 2016-11-16 | 北京时代民芯科技有限公司 | A kind of new producing method of planar spiral inductor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100368930B1 (en) | Three-Dimensional Metal Devices Highly Suspended above Semiconductor Substrate, Their Circuit Model, and Method for Manufacturing the Same | |
| US6008102A (en) | Method of forming a three-dimensional integrated inductor | |
| KR100629063B1 (en) | Integrated toroidal coil inductors for ic devices | |
| EP1114428A1 (en) | Integrated inductive components and method of fabricating such components | |
| Yoon et al. | Embedded conductor technology for micromachined RF elements | |
| JP2004526311A (en) | High Q inductor | |
| Gu et al. | High-$ Q $ solenoid inductors with a CMOS-compatible concave-suspending MEMS process | |
| US20150340422A1 (en) | Method of manufacturing a micro-fabricated wafer level integrated inductor or transformer for high frequency switch mode power supplies | |
| TWI279009B (en) | A thin film multi-layer high Q transformer formed in a semiconductor substrate | |
| US20100068864A1 (en) | Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits | |
| WO2007115255A2 (en) | Integrated power passives | |
| Bellaredj et al. | Magnetic core solenoid power inductors on organic substrate for system-in-package integrated high-frequency voltage regulators | |
| US7176550B2 (en) | Method and device for forming a winding on a non-planar substrate | |
| US6292084B1 (en) | Fine inductor having 3-dimensional coil structure and method for producing the same | |
| US7612428B2 (en) | Inductor fabricated with dry film resist and cavity and method of fabricating the inductor | |
| CN109599489A (en) | High q-factor three-dimensional spiral structure inductance based on MEMS technology and preparation method thereof | |
| CN101170002B (en) | RF micro-inductance with suspending structure and its making method | |
| Chomnawang et al. | On-chip 3D air core microinductor for high-frequency applications using deformation of sacrificial polymer | |
| CN112397289B (en) | Novel MEMS high-Q-value non-solenoid integrated inductor and preparation method thereof | |
| JP2005044952A (en) | Common mode choke coil and manufacturing method thereof, and common mode choke coil array | |
| Wang et al. | Fabrication and performance of novel RF spiral inductors on silicon | |
| CN1207737C (en) | Floating structure radio-frequency microinductor and its production process | |
| KR100394875B1 (en) | Integrated three-dimensional solenoid inductor and fabrication method thereof | |
| KR20000019683A (en) | Method for manufacturing monolithic solenoid inductor | |
| Chua et al. | Microfabrication of a planar helix with straight-edge connections slow-wave structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190409 |
|
| RJ01 | Rejection of invention patent application after publication |