CN109426162B - Method and device for interlocking gear signals of electric automobile - Google Patents
Method and device for interlocking gear signals of electric automobile Download PDFInfo
- Publication number
- CN109426162B CN109426162B CN201710743483.8A CN201710743483A CN109426162B CN 109426162 B CN109426162 B CN 109426162B CN 201710743483 A CN201710743483 A CN 201710743483A CN 109426162 B CN109426162 B CN 109426162B
- Authority
- CN
- China
- Prior art keywords
- voltage signal
- backward
- digital voltage
- digital
- stable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/72—Electric energy management in electromobility
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Control Of Transmission Device (AREA)
- Electric Propulsion And Braking For Vehicles (AREA)
Abstract
The invention discloses a method and a device for interlocking gear signals of an electric automobile, which relate to the technical field of signal processing of the electric automobile, and the method comprises the following steps: respectively processing the input forward voltage signal and backward voltage signal into a forward digital voltage signal and a backward digital voltage signal; interlocking the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time; and outputting the valid forward digital voltage signal or the valid backward digital voltage signal at the same time.
Description
Technical Field
The invention relates to the technical field of electric automobile signal processing, in particular to a method and a device for interlocking gear signals of an electric automobile.
Background
With the rapid development of the electric automobile industry, the controller of the electric automobile becomes more and more important, and the reliability requirement is continuously improved. The driver operates the gear to generate forward and backward signals, the two signals are used as input signals of the controller, and the controller sends out a control instruction to determine forward or backward according to the two input signals, so that the controller plays an extremely critical role in the stable operation of the electric automobile for the processing of the two signals.
In the running process of the automobile, due to the shaking of a mechanical gear or the action of electromagnetic interference, the electric automobile is likely to generate forward and backward signals at the same time, and at the moment, a gear instruction cannot be identified by an execution system, so that accidents are easy to occur, and therefore, the controller needs to carry out interlocking processing on the gear signal so as to cope with the abnormal conditions. The current interlocking processing mode for the gear signals is as follows: the forward signal and the backward signal are directly sent to the processor after being subjected to level conversion by hardware, and the processor realizes interlocking of the two paths of signals by software.
Disclosure of Invention
According to the technical problem solved by the scheme provided by the embodiment of the invention, in the running process of the automobile, the electric automobile is likely to generate forward and backward signals simultaneously due to the shaking of a mechanical gear or the action of electromagnetic interference, and accidents are easy to occur.
The method for interlocking the gear signals of the electric automobile provided by the embodiment of the invention comprises the following steps:
respectively processing the input forward voltage signal and backward voltage signal into a forward digital voltage signal and a backward digital voltage signal;
interlocking the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time;
the active forward digital voltage signal or the active backward digital voltage signal is output at the same time.
Preferably, the processing the input forward voltage signal and the input backward voltage signal into a forward digital voltage signal and a backward digital voltage signal includes:
respectively dividing the input forward voltage signal and the input backward voltage signal to output a forward stable voltage signal and a backward stable voltage signal within a voltage fluctuation range;
and respectively performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal to output a forward digital voltage signal and a backward digital voltage signal.
Preferably, the outputting the forward digital voltage signal and the backward digital voltage signal by performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal, respectively, includes:
respectively comparing the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value;
outputting a high-level forward digital voltage signal if the forward stable voltage signal is larger than a preset voltage comparison threshold value, otherwise, outputting a low-level forward digital voltage signal;
and if the backward stable voltage signal is larger than the preset voltage comparison threshold value, outputting a high-level backward digital voltage signal, otherwise, outputting a low-level backward digital voltage signal.
Preferably, the outputting the forward digital voltage signal and the backward digital voltage signal by performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal, respectively, includes:
respectively comparing the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value;
outputting a high-level forward digital voltage signal if the forward stable voltage signal is smaller than a preset voltage comparison threshold value, otherwise, outputting a low-level forward digital voltage signal;
and if the backward stable voltage signal is smaller than the preset voltage comparison threshold value, outputting a high-level backward digital voltage signal, otherwise, outputting a low-level backward digital voltage signal.
Preferably, the interlocking processing of the resulting forward digital voltage signal and the backward digital voltage signal to validate the forward digital voltage signal or validate the backward digital voltage signal at the same time includes:
interlocking the obtained high-level forward digital voltage signal and the low-level backward digital voltage signal to form a forward digital voltage signal which is effective at the same time;
and interlocking the obtained low-level forward digital voltage signal and the high-level backward digital voltage signal to obtain the backward digital voltage signal which is effective at the same time.
Preferably, the interlocking processing of the resulting forward digital voltage signal and the backward digital voltage signal to validate the forward digital voltage signal or validate the backward digital voltage signal at the same time includes:
interlocking the obtained high-level forward digital voltage signal and the low-level backward digital voltage signal to obtain a backward digital voltage signal which is effective at the same time;
and interlocking the obtained low-level forward digital voltage signal and the high-level backward digital voltage signal to form the forward digital voltage signal which is effective at the same time.
According to the embodiment of the invention, the device for interlocking the gear signals of the electric automobile comprises:
the digital processing module is used for respectively processing the input forward voltage signal and the input backward voltage signal into a forward digital voltage signal and a backward digital voltage signal;
the interlocking processing module is used for carrying out interlocking processing on the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time; and
and the output module is used for outputting an effective forward digital voltage signal or a backward digital voltage signal at the same time.
Preferably, the digital processing module includes:
the voltage division unit is used for respectively dividing the input forward voltage signal and the input backward voltage signal to output a forward stable voltage signal and a backward stable voltage signal within a voltage fluctuation range;
and the voltage comparison unit is used for respectively performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal and outputting a forward digital voltage signal and a backward digital voltage signal.
Preferably, the voltage comparison unit is specifically configured to perform voltage comparison on the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value, and output a high-level forward digital voltage signal if the forward stable voltage signal is greater than the preset voltage comparison threshold value, and output a low-level backward digital voltage signal if the backward stable voltage signal is greater than the preset voltage comparison threshold value, and output a high-level backward digital voltage signal if the backward stable voltage signal is greater than the preset voltage comparison threshold value, and otherwise output a low-level backward digital voltage signal.
Preferably, the voltage comparison unit is specifically configured to perform voltage comparison on the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value, output a high-level forward digital voltage signal if the forward stable voltage signal is smaller than the preset voltage comparison threshold value, output a low-level forward digital voltage signal if the forward stable voltage signal is smaller than the preset voltage comparison threshold value, and output a high-level backward digital voltage signal if the backward stable voltage signal is smaller than the preset voltage comparison threshold value, otherwise output a low-level backward digital voltage signal.
According to the scheme provided by the embodiment of the invention, compared with the prior art, certain progress is achieved, the effect of interlocking gear signals by hardware is achieved, the complexity of software is reduced, and the reliability of processing the gear signals is improved.
Drawings
FIG. 1 is a flowchart of a method for interlocking gear signals of an electric automobile according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an apparatus for interlocking gear signals of an electric automobile according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a signal interlock circuit according to an embodiment of the present invention;
FIG. 4 is a waveform diagram after processing when the forward signal is high and the backward signal is low according to the embodiment of the present invention;
FIG. 5 is a waveform diagram after processing when the backward signal is high and the forward signal is low according to the embodiment of the present invention;
FIG. 6 is a waveform diagram after processing when both the forward and backward signals are high, according to an embodiment of the present invention;
FIG. 7 is a waveform diagram after processing when both the forward and backward signals are low, according to an embodiment of the present invention;
fig. 8 is a circuit diagram of the interlocking of gear signals of an electric automobile according to an embodiment of the present invention.
Detailed Description
The following detailed description of the preferred embodiments of the present invention is provided in conjunction with the accompanying drawings, and it is to be understood that the preferred embodiments described below are merely illustrative and explanatory of the invention, and are not restrictive of the invention.
Fig. 1 is a flowchart of a method for interlocking gear signals of an electric automobile according to an embodiment of the present invention, as shown in fig. 1, including:
step S101: respectively processing the input forward voltage signal and backward voltage signal into a forward digital voltage signal and a backward digital voltage signal;
step S102: interlocking the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time;
step S103: the active forward digital voltage signal or the active backward digital voltage signal is output at the same time.
Wherein, through respectively processing the forward voltage signal and the backward voltage signal into a forward digital voltage signal and a backward digital voltage signal, the method comprises the following steps: respectively dividing the input forward voltage signal and the input backward voltage signal to output a forward stable voltage signal and a backward stable voltage signal within a voltage fluctuation range; and respectively performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal to output a forward digital voltage signal and a backward digital voltage signal.
Specifically, the outputting the forward digital voltage signal and the backward digital voltage signal by performing voltage comparison processing on the obtained forward stable voltage signal and backward stable voltage signal, respectively, includes: respectively comparing the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value; outputting a high-level forward digital voltage signal if the forward stable voltage signal is larger than a preset voltage comparison threshold value, otherwise, outputting a low-level forward digital voltage signal; and if the backward stable voltage signal is larger than the preset voltage comparison threshold value, outputting a high-level backward digital voltage signal, otherwise, outputting a low-level backward digital voltage signal.
Specifically, the outputting the forward digital voltage signal and the backward digital voltage signal by performing voltage comparison processing on the obtained forward stable voltage signal and backward stable voltage signal, respectively, includes: respectively comparing the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value; outputting a high-level forward digital voltage signal if the forward stable voltage signal is smaller than a preset voltage comparison threshold value, otherwise, outputting a low-level forward digital voltage signal; and if the backward stable voltage signal is smaller than the preset voltage comparison threshold value, outputting a high-level backward digital voltage signal, otherwise, outputting a low-level backward digital voltage signal.
The interlocking processing of the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time comprises the following steps: interlocking the obtained high-level forward digital voltage signal and the low-level backward digital voltage signal to form a forward digital voltage signal which is effective at the same time; and interlocking the obtained low-level forward digital voltage signal and the high-level backward digital voltage signal to obtain the backward digital voltage signal which is effective at the same time.
The interlocking processing of the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time comprises the following steps: interlocking the obtained high-level forward digital voltage signal and the low-level backward digital voltage signal to obtain a backward digital voltage signal which is effective at the same time; and interlocking the obtained low-level forward digital voltage signal and the high-level backward digital voltage signal to form the forward digital voltage signal which is effective at the same time.
Fig. 2 is a schematic diagram of an apparatus for interlocking gear signals of an electric automobile according to an embodiment of the present invention, as shown in fig. 2, including: a digital processing module 201 for processing the input forward voltage signal and backward voltage signal into a forward digital voltage signal and a backward digital voltage signal, respectively; an interlock processing module 202, configured to perform interlock processing on the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal or enable the backward digital voltage signal at the same time; and an output module 203 for outputting an effective forward digital voltage signal or a backward digital voltage signal at the same time.
Wherein the digital processing module 201 comprises: the voltage division unit is used for respectively dividing the input forward voltage signal and the input backward voltage signal to output a forward stable voltage signal and a backward stable voltage signal within a voltage fluctuation range; and the voltage comparison unit is used for respectively performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal and outputting a forward digital voltage signal and a backward digital voltage signal.
Specifically, the voltage comparison unit is specifically configured to perform voltage comparison on the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value, output a high-level forward digital voltage signal if the forward stable voltage signal is greater than the preset voltage comparison threshold value, output a low-level forward digital voltage signal if the forward stable voltage signal is greater than the preset voltage comparison threshold value, and output a high-level backward digital voltage signal if the backward stable voltage signal is greater than the preset voltage comparison threshold value, otherwise output a low-level backward digital voltage signal.
Specifically, the voltage comparison unit is specifically configured to perform voltage comparison on the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value, output a high-level forward digital voltage signal if the forward stable voltage signal is smaller than the preset voltage comparison threshold value, output a low-level forward digital voltage signal if the forward stable voltage signal is smaller than the preset voltage comparison threshold value, and output a high-level backward digital voltage signal if the backward stable voltage signal is smaller than the preset voltage comparison threshold value, otherwise output a low-level backward digital voltage signal.
Fig. 3 is a schematic diagram of a signal interlocking circuit according to an embodiment of the present invention, as shown in fig. 3, including:
the first step, resistance voltage division is carried out on an input voltage signal, the input voltage is reduced to the input voltage range of the controller, meanwhile, a voltage follower is arranged at the voltage output end, and a RC filter circuit is used for realizing stable voltage signal output.
And step two, comparing and judging the voltage output in the step one with the set threshold voltage to obtain a digital signal.
And thirdly, carrying out logic signal processing on the digital signal output in the second step to realize interlocking output of the signal.
The forward signal and the backward signal generated by the gear are all voltage input signals, and the voltage fluctuation range of the high level is as follows: the voltage fluctuation range of the low level is 24V-32V: 0V-10V. For an electric automobile, only one forward signal and one backward signal can be effective at any time, as shown in fig. 4 and 5, but in actual use, the simultaneous action of the forward signal and the backward signal may occur, as shown in fig. 6 and 7, so that the forward signal and the backward signal need to be interlocked, so that only one signal can be effective at any time, and the electric automobile should remain inactive to prevent accidents.
Fig. 8 is a circuit diagram of interlocking gear signals of an electric automobile, as shown in fig. 8, two paths of forward and backward signals generated by a gear are respectively connected to corresponding positions shown in a schematic diagram 8 of a specific embodiment, a front stage uses resistor networks R1, R2, R4 and R5 to divide the input voltage signals so that the input voltage reaches a range of 0V to 3.3V, then a voltage follower (two paths of followers are formed by operational amplifiers U6A and U6B) and an RC filter circuit (two paths of RC filter networks are formed by R3, C1, R6 and C2) are arranged on the voltage signals so that the output voltage is kept stable; the high level signal voltage of the stage circuit reaches the range of 2.4V-3.2V, and the low level signal voltage reaches the range of 0V-1V. Setting the comparison voltage threshold of the second stage to 1.5V, and performing threshold voltage on the voltage signal output by the previous stageThe comparison (the comparison circuit is realized by a U7A, U7B comparator) outputs a high level if the comparison voltage is greater than the threshold voltage, and outputs a low level if the comparison voltage is less than the threshold voltage. The rear stage is a logic processing circuit, wherein U1 and U2 are inverters, U3 and U4 are AND gate chips, U5 is a two-way four-way one-out-of-one data selector chip, the two signals after the previous two-stage processing are subjected to logic preprocessing by U1, U2, U3 and U4 and then output as address input signals of the selector, and the output of the selector is output as an interlocking forward signal and an interlocking backward signal. The working process was analyzed as follows: let forward signal be A, backward signal be B, U 3 The output signal is
U 4 The output signal is +.>
When A is 1 ＝1，B 1 When=0, output Y 1 (Forward Signal) 1C 1 ，Y 2 (back signal) 2C 1 When A is the value of 1 ＝0，B 1 When=1, output Y 1 (Forward Signal) 1C 2 ，Y 2 (back signal) 2C 2 When A is the value of 1 ＝0，B 1 When=0, output Y 1 (Forward Signal) 1C 0 ，Y 2 (back signal) 2C 0 Is a value of (2).
1C 0 ，1C 3 ，2C 0 ，2C 3 The value is set to 0, and when the forward signal and the backward signal are not validated and validated, the output signal is at a low level, and the electric automobile is kept still. 1C 1 ＝1，1C 2 ＝0，2C 1 ＝0，2C 2 =1, satisfying the normal forward and backward running of the car when the forward signal and the backward signal are asserted separately, and in the embodiment, each node logic may refer to fig. 6, table 1 and table 2.
Testing the circuit for output Y 1 ，Y 2 The two paths of signals are connected with an oscilloscope for observing the waveform of the output signal. Changing the voltage amplitude of two paths of input signals, observing the waveform of the output signals for multiple times, and verifying the result to be the same as the analysis resultAnd (3) conforming to the requirement, and enabling the device to work normally.
Table 1: two-way four-choice data selector logic table
Table 2 logical table of signal points
Note that: in the above figures "×" indicates either a digital high level or a digital low level; "1" means a digital high level; "0" means a digital low level; "H" indicates that the input raw voltage is high; "L" indicates that the input raw voltage is low.
According to the scheme provided by the embodiment of the invention, the function of signal interlocking is realized by using the gate circuit and the data selector, so that the signal interlocking circuit has stronger anti-interference performance on fluctuation of input signals, and the output signal voltage is low and the current is small.
Although the present invention has been described in detail hereinabove, the present invention is not limited thereto and various modifications may be made by those skilled in the art in accordance with the principles of the present invention. Therefore, all modifications made in accordance with the principles of the present invention should be understood as falling within the scope of the present invention.
Claims (8)
1. A method of interlocking gear signals of an electric vehicle, comprising:
respectively processing the input forward voltage signal and backward voltage signal into a forward digital voltage signal and a backward digital voltage signal;
interlocking the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time;
the active forward digital voltage signal or the backward digital voltage signal is output at the same time,
the processing of the input forward voltage signal and the input backward voltage signal into a forward digital voltage signal and a backward digital voltage signal respectively comprises:
respectively dividing the input forward voltage signal and the input backward voltage signal to output a forward stable voltage signal and a backward stable voltage signal within a voltage fluctuation range;
and respectively performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal to output a forward digital voltage signal and a backward digital voltage signal.
2. The method of claim 1, wherein the outputting the forward digital voltage signal and the backward digital voltage signal by performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal, respectively, comprises:
respectively comparing the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value;
outputting a high-level forward digital voltage signal if the forward stable voltage signal is larger than a preset voltage comparison threshold value, otherwise, outputting a low-level forward digital voltage signal;
and if the backward stable voltage signal is larger than the preset voltage comparison threshold value, outputting a high-level backward digital voltage signal, otherwise, outputting a low-level backward digital voltage signal.
3. The method of claim 1, wherein the outputting the forward digital voltage signal and the backward digital voltage signal by performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal, respectively, comprises:
respectively comparing the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value;
outputting a high-level forward digital voltage signal if the forward stable voltage signal is smaller than a preset voltage comparison threshold value, otherwise, outputting a low-level forward digital voltage signal;
and if the backward stable voltage signal is smaller than the preset voltage comparison threshold value, outputting a high-level backward digital voltage signal, otherwise, outputting a low-level backward digital voltage signal.
4. A method according to claim 2 or 3, the interlocking of the resulting forward and reverse digital voltage signals to validate the forward digital voltage signal or validate the reverse digital voltage signal at the same time comprising:
interlocking the obtained high-level forward digital voltage signal and the low-level backward digital voltage signal to form a forward digital voltage signal which is effective at the same time;
and interlocking the obtained low-level forward digital voltage signal and the high-level backward digital voltage signal to obtain the backward digital voltage signal which is effective at the same time.
5. The method of claim 2, the interlocking the resulting forward and reverse digital voltage signals to validate the forward digital voltage signal or validate the reverse digital voltage signal at the same time comprising:
interlocking the obtained high-level forward digital voltage signal and the low-level backward digital voltage signal to obtain a backward digital voltage signal which is effective at the same time;
and interlocking the obtained low-level forward digital voltage signal and the high-level backward digital voltage signal to form the forward digital voltage signal which is effective at the same time.
6. An electric vehicle gear signal interlock device comprising:
the digital processing module is used for respectively processing the input forward voltage signal and the input backward voltage signal into a forward digital voltage signal and a backward digital voltage signal;
the interlocking processing module is used for carrying out interlocking processing on the obtained forward digital voltage signal and the backward digital voltage signal to enable the forward digital voltage signal to be effective or enable the backward digital voltage signal to be effective at the same time; and
an output module for outputting an effective forward digital voltage signal or backward digital voltage signal at the same time,
the digital processing module comprises:
the voltage division unit is used for respectively dividing the input forward voltage signal and the input backward voltage signal to output a forward stable voltage signal and a backward stable voltage signal within a voltage fluctuation range;
and the voltage comparison unit is used for respectively performing voltage comparison processing on the obtained forward stable voltage signal and the backward stable voltage signal and outputting a forward digital voltage signal and a backward digital voltage signal.
7. The apparatus of claim 6, wherein the voltage comparing unit is specifically configured to compare the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value, and output a high-level forward digital voltage signal if the forward stable voltage signal is greater than the preset voltage comparison threshold value, and output a low-level backward digital voltage signal if the backward stable voltage signal is greater than the preset voltage comparison threshold value.
8. The apparatus of claim 6, wherein the voltage comparing unit is specifically configured to compare the obtained forward stable voltage signal and the backward stable voltage signal with a preset voltage comparison threshold value, and output a high-level forward digital voltage signal if the forward stable voltage signal is smaller than the preset voltage comparison threshold value, and output a low-level backward digital voltage signal if the backward stable voltage signal is smaller than the preset voltage comparison threshold value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710743483.8A CN109426162B (en) | 2017-08-25 | 2017-08-25 | Method and device for interlocking gear signals of electric automobile |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710743483.8A CN109426162B (en) | 2017-08-25 | 2017-08-25 | Method and device for interlocking gear signals of electric automobile |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109426162A CN109426162A (en) | 2019-03-05 |
| CN109426162B true CN109426162B (en) | 2023-05-09 |
Family
ID=65500731
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710743483.8A Active CN109426162B (en) | 2017-08-25 | 2017-08-25 | Method and device for interlocking gear signals of electric automobile |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109426162B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103064313A (en) * | 2012-12-16 | 2013-04-24 | 陈子杨 | Self-locking and interlocking switch with multiple grades |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5979665U (en) * | 1982-11-19 | 1984-05-29 | トヨタ自動車株式会社 | Reverse gear noise prevention device in manual transmission |
| JP2010255740A (en) * | 2009-04-24 | 2010-11-11 | Toyota Motor Corp | Manual transmission |
| CN101886699B (en) * | 2010-06-28 | 2013-05-08 | 重庆长安汽车股份有限公司 | Gear and fault judgment method for electric vehicle shifting mechanism |
| CN102189930B (en) * | 2011-02-15 | 2015-03-25 | 上海汽车集团股份有限公司 | Rocker type switch gearshift of new energy city passenger vehicle |
| EP2781798B1 (en) * | 2011-11-17 | 2017-12-13 | JATCO Ltd | Automatic transmission and method for determining selection operation of automatic transmission |
| DE102012204960A1 (en) * | 2012-03-28 | 2013-10-02 | Robert Bosch Gmbh | Interlock detector with self-diagnostic function for an interlock circuit and a method for self-diagnosis of the interlock detector |
| CN104139826B (en) * | 2014-08-20 | 2016-04-13 | 成都宽和科技有限责任公司 | The voltage difference that shift signal adds comparator divides control boosted vehicle system |
-
2017
- 2017-08-25 CN CN201710743483.8A patent/CN109426162B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103064313A (en) * | 2012-12-16 | 2013-04-24 | 陈子杨 | Self-locking and interlocking switch with multiple grades |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109426162A (en) | 2019-03-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7579873B1 (en) | Slew rate control circuit for small computer system interface (SCSI) differential driver | |
| CN108255231B (en) | Data sampling method and chip | |
| CN109426162B (en) | Method and device for interlocking gear signals of electric automobile | |
| US20130003882A1 (en) | Pre-emphasis circuit | |
| DE112019000111T5 (en) | DRIVER CIRCUIT, DRIVER METHOD AND SEMICONDUCTOR SYSTEM | |
| CN107707248A (en) | Same OR circuit, adjusting method and NOR gate circuit | |
| DE102014101141A1 (en) | receiver architecture | |
| EP1399831B1 (en) | Device and method for converting a diagnostic interface to spi standard | |
| US20190121328A1 (en) | Servo movement control method, device, and terminal device | |
| US6054877A (en) | Low power multiplexer circuit | |
| CN205160502U (en) | Metal vibration top differential signal high resolution detection circuitry | |
| CN102377398A (en) | Gain zero-crossing control system and gain control method | |
| JP5235141B2 (en) | Driver circuit and test device | |
| US7317348B2 (en) | Noise reduction in digital systems | |
| JP2016053747A (en) | Communication device between master and slave, and communication control method of the same | |
| CN103618524A (en) | Circuit and method for processing general discrete magnitudes | |
| US7047345B2 (en) | Logic configured for complimenting data on a bus when threshold exceeded | |
| KR102466086B1 (en) | Signal Integrity Diagnostic Routines for Communication Channels | |
| CN112799376A (en) | Driving assistance system or automatic driving system and real-time data bypass generation device thereof | |
| CN117112402A (en) | Efficient test case generation method, system, equipment and medium | |
| CN117110857A (en) | Detection circuit, detection system, control method, control device and vehicle | |
| WO2020012928A1 (en) | In-vehicle electronic control device | |
| CN107210064B (en) | Signal processing circuit | |
| KR20220166108A (en) | Electronic control unit with fault diagnosis function | |
| RU2609743C1 (en) | Logic module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |