CN106324483A - Reset circuit detection system and method - Google Patents
Reset circuit detection system and method Download PDFInfo
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- CN106324483A CN106324483A CN201610761161.1A CN201610761161A CN106324483A CN 106324483 A CN106324483 A CN 106324483A CN 201610761161 A CN201610761161 A CN 201610761161A CN 106324483 A CN106324483 A CN 106324483A
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- reset
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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- General Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
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Abstract
The invention discloses a reset circuit detection system, and the system comprises a receiving unit which is used for receiving a testing instruction; at least one reset signal input unit which is used for inputting a reset signal; a storage unit which is used for storing at least one detection set value and storing a test value after the resetting of the reset circuit; and a comparison unit which is used for comparing the test value in the storage unit with at least one detection set value after the resetting of the reset circuit, and outputting a resetting success signal when the test value in the storage unit is matched with the detection set values. The invention also provides a reset circuit detection method at the same time. For different chips and subsystems, the circuit and method can adjust the reset signal conveniently through a computer, and detect the set value and a preset value, thereby guaranteeing that the method can be used in different detection environments and is not limited by the hardware of a highly-integrated reset circuit. The circuit and method are high in intelligentization degree, and are accurate in detection result.
Description
Technical field
The present invention relates to technical field of electronic communication, particularly relate to a kind of reset circuit detecting system and detection method.
Background technology
The effect of the reset circuit in hardware chip refers under conditions of power on, by the internal memory in chip, deposits
Device or overall work recovering state are to a kind of that determine, controlled pattern, thus carry out next step operation.Most
In hardware chip, reset circuit is all a requisite part.For a complicated electronic system, each of which
Individual chip or each subsystem, also should be both provided with reset circuit, it is ensured that can pass through one or more additional answering
Position signal so that whole system, or wherein some subsystem or chip can be with normal initialization.
Owing to, in prior art, the mode of manual testing is also continued to use in the detection of the reset circuit of hardware chip, it is common that
Chip exterior increases additional circuit, output signal to detect reset circuit the most normal.This mode there is problems in that a side
Face must increase a detection station and at least one testing staff, the on the other hand loss of manual detection on streamline
Height, it is difficult to ensure that accuracy of detection.It practice, it has been the technology of a comparative maturity that reset circuit is integrated in chip, for
Cost-effective consideration, in prior art, a lot of producers all have ignored test of dispatching from the factory reset circuit.But, reset circuit
Reliability determines product and is in restoring one's working ability, if without dispatching from the factory in extreme external environment in the case of instability
Detection, once goes wrong, and being difficult to during Measuring error is discovered in time, is easily caused electronic system overall failure, has a strong impact on
Consumer's Experience.
Therefore, in sum, prior art lacks a kind of can effectively, quickly detect reset circuit in hardware chip
System and a kind of detection method.
Summary of the invention
The present invention provides a kind of intelligence system, can effectively, integrated in fast automatic detecting hardware chip or electronic system
The detecting system of reset circuit.
A kind of reset circuit detecting system, including:
Receive unit, be used for receiving test instruction；
At least one reset signal input block, is used for inputting reset signal；
Memory element, is used for storing at least one detection setting value and storing test value after reset circuit resets；
Comparing unit, after resetting at reset circuit, enters the test value in memory element with at least one detection setting value
Row compares；
When the test value in described memory element mates with detection setting value, output resets to function signal.
Further, also including setup unit, described setup unit is for after receiving test instruction, by memory element
Default settings for detection setting value.
In order to accurately screen chip reset fault, after reset circuit resets, if the test value in memory element
Not mating with detection setting value, then compared with preset value by test value, when described test value does not mates with preset value, output is multiple
Position failure signal.
For accurate recording testing result, automatically export statistical report form, also include that at least one records unit, described record
Unit resets to function signal and/or reset failure signal for record.
Use reset circuit detecting system disclosed in this invention, by automatic reception test instruction, the answering of Software Create
Position signal, and by memory element and comparing unit, the default operating condition of the actual working state of reset circuit is carried out right
Ratio so that the hardware reset circuit of chip or electronic equipment is capable of whole automatic test and automatically outputs test result,
While improve product quality and stability, it is to avoid increase human cost, it it is the efficient test that a kind of intelligence degree is high
System.
The present invention discloses a kind of reset circuit detection method, comprise the following steps:
Receive test instruction；
Set detection setting value and store；
Generate reset signal；
After reset circuit resets, generate test value；
Being compared with detection setting value by test value, when test value mates with detection setting value, output resets to function signal.
Further, before being additionally included in reset circuit homing action, it is detection setting value by the default settings of storage.
Further, after reset circuit resets, if test value does not mates with preset value, then by test value and preset value ratio
Relatively, when test value does not mates with preset value, export reset failure signal.
Further, recording reset pass signal and reset failure signal.
Further, after output resets to function signal or reset failure signal, erasure detection setting value.
Further, reset signal is by Software Create.
Reset circuit detection method proposed by the invention, for different chips and subsystem, for chip itself not
Same reset circuit, the difference in functionality of reset circuit, and different trigger conditions, can be adjusted multiple easily by computer
Position signal, detection setting value and preset value, thus ensure that reset circuit detection method can apply to different chips, not homology
System, and the detection of the reset circuit of multiple subsystems that setting is within the same electronic device, be not only restricted to highly integrated
The hardware limitation of reset circuit, intelligence degree is high, and testing result is accurate.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is this
Some bright embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to
Other accompanying drawing is obtained according to these accompanying drawings.
Fig. 1 is the structural schematic block diagram of a kind of embodiment of reset circuit detecting system disclosed in this invention；
Fig. 2 is the structural schematic block diagram of reset circuit detecting system another kind embodiment disclosed in this invention；
Fig. 3 is the flow chart of a kind of embodiment of reset circuit detection method disclosed in this invention.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
The a part of embodiment of the present invention rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under not making creative work premise, broadly falls into the scope of protection of the invention.
The purpose of the present invention is to propose to a kind of reset circuit detecting system, before chip or electronic equipment dispatch from the factory, to it
Reset circuit or reseting module that body is highly integrated are tested, it is ensured that reset circuit or reseting module reliable operation.Whole
Reset circuit detecting system mainly coordinates, by software and digital circuit, multiple merits such as realizing detection, result statistics, sorting automatically
Can, it is not necessary to additional circuit operates without hand fit, and intelligence degree is obviously improved compared to prior art.Such as Fig. 1
It show the structural schematic block diagram of reset circuit the first embodiment of detecting system disclosed in this invention.The reset of the present embodiment
Checking system for PCB is at least made up of following unit, i.e. receives unit 1, reset signal input block 3, memory element 2 and
Comparing unit 4.Below the technical scheme of above-mentioned core cell is described in detail one by one.
Specifically, receive unit 1 to be used for receiving test instruction.Here test instruction refers to the finger sent by computer
Order or signal so that whole reset circuit detecting system enters test mode.Therefore, corresponding, can be with a certain interface
Communication mode realizes receiving the function of unit 1.As a rule, preferably by string between computer and test board or test chip
The mode of row communication carries out data transmission, say, that receive unit 1 i.e. step-by-step reception computer by the way of serial communication
The test instruction of output.After receiving unit 1 and receiving test instruction, chip to be measured or be integrated in be measured in particular
Reset circuit on chip i.e. enters test mode.
The triggering of reset circuit may have electrification reset, manual reset, under-voltage reset, watchdog reset etc. multiple, but also
Trigger under conditions of multiple trigger sources that the reset circuit being not necessarily each chip all can be above-mentioned and reset.So, corresponding
The reset circuit of chip to be measured, is provided with at least one reset signal input block mated with reset circuit in the detection system
3.In the present embodiment, the form simulation simulated with software by one or more reset signal input block 3 is a kind of or many
Plant trigger source, thus form reset signal.As a example by manual reset, owing to manual reset usually occurs in chip owing to doing in the external world
Disturb or in the case of abnormal conditions cause confusion or crash, realize being scheduled on chip lock by artificial touching reset switch multiple
In the state of position so that it is carry out next step operation.Therefore, at the present embodiment, the manual reset of chip reset circuit to be measured is carried out
During detection, can be by the jump signal of reset signal input block one analog reset switch motion of input, it is also possible to can simulate
Reset switch forms certain time delay, and by the input of the reset signal input of simulation to reset circuit, reset circuit receives
After reset signal, if successfully resetted, would operate in a controlled stable state.
Whether reset successful result to obtain reset circuit, chip to be measured is provided with memory element 2 and compares
Unit 4.The major function of memory element 2 is the duty of storage reset circuit, can be by one group of depositor, namely one group
Flag register realizes the function of memory element 2.Before reset circuit receives reset signal and carries out homing action, storage
Unit 2 stores at least one detection setting value, the reset circuit representing anticipated can present after resetting normal, controlled,
Stable duty.And after reset circuit resets, storage is test value in memory element 2, represent that reset circuit is multiple
Actual working state after Wei.
And further, the effect of comparing unit 4 is exactly after the homing action of the reset circuit set completes, by correspondence
Represent that test value and at least one detection setting value of the actual working state after reset circuit reset compare.Work as test value
When mating with detection setting value, the duty after reset circuit reset is i.e. described and presets the steady operation after it resets before
State is identical, and the homing action success of this explanation reset circuit, output resets to function signal.
Use the reset circuit detecting system disclosed in above-described embodiment, simulated by automatic reception test instruction, software
The reset signal generated, and pass through memory element 2 and comparing unit 4 by the actual working state of reset circuit and default stablizing
Duty contrasts so that the hardware reset circuit of chip or electronic equipment is capable of whole automatic test the most automatically
Output test result, while improve product quality and stability, it is to avoid increase human cost, be therefore a kind of intelligence
The system of efficiently testing that change degree is high.
Structural representation frame for reset circuit detecting system the second embodiment disclosed in this invention shown in Figure 2
Figure.For a chip, as a rule reset circuit is the most highly integrated, if it is decided that reset circuit lost efficacy or existed
Abnormal conditions, may determine that whole chip goes wrong substantially, and result can directly influence the yield rate of chip.Therefore, it is judged that
The most problematic needs of reset circuit of chip are the most prudent.In the present embodiment, except in first embodiment disclosed four
Outside individual nucleus module and its concrete function, also include setting module 5.It practice, before chip enters test mode, deposit
The flag register of storage unit stores one group of preset value.If preset value is for record normal boot-strap or is in properly functioning
State under time, the duty that reset circuit is shown.The effect of setting module 5 is receiving test instruction the most just,
After chip enters test mode, it is reset to the preset value in memory element 2 detect setting value, say, that by single for storage
Unit 2 represents the flag states that reset circuit normally works and changes into the flag states after resetting successfully.
After reset circuit resets, if the test value in memory element 2 does not mates with detection setting value, it is understood that there may be two kinds
Situation.A kind of is the problem of reset circuit itself, and alternatively possible is to trigger fault.Trigger what fault caused if cannot get rid of
Do not mate, then may cause erroneous judgement, the fraction defective of chip is significantly increased.Examine at the reset circuit disclosed in the present embodiment
In examining system, after reset circuit resets, if the test value in memory element 2 does not mates with detection setting value, then will test
Value compares with preset value.If test value mates with preset value, then explanation chip operation is at normal condition, it is understood that there may be reset letter
Number triggering fault rather than the fault of the reset function of reset circuit own.If test value does not mates with preset value, then may be used
It is reset circuit hardware existing problems itself to be accurately obtained further, detecting system output reset failure signal.Reset and lose
Lose signal can also be directly output on the mechanical hand on production line or other similar execution device, after failure judgement and
Time realize automatic sorting, by in-problem chip sorting out.
For realizing the timely automated statistics of testing result, the detecting system disclosed in the present embodiment also sets up a note
Record unit, record unit will reset to function signal and reset failure signal record respectively, it is achieved the programming count of testing result.
Reset circuit detecting system disclosed in second embodiment of the invention, can improve the detection knot of detecting system further
Really accuracy rate, realizes programming count and the automatic report generation of testing result simultaneously.
As it is shown on figure 3, the invention also discloses a kind of reset circuit detection method, as it can be seen, comprise the following steps:
Computer sends test instruction to chip to be measured by the way of serial communication, and reset circuit enters test mode,
In a group mark depositor in chip to be measured, the amendment of one or more preset values is set as representing the successfully detection that resets
Setting value also stores；
Software simulation generates the reset signal identical with trigger source；
Chip to be measured receives reset signal, is reset to the stable original operating state set, by the test in flag register
Value and detection setting value are mated；
If test value and detection setting value coupling, then the detection setting value in erasing flag register；
Output resets to function signal；
If test value and detection setting value are not mated, then the test value in flag register and preset value are mated；
If test value and preset value do not mate, then the detection setting value in erasing flag register；
Output reset failure signal；
Statistics resets to function signal and reset failure signal and reset circuit testing time respectively, automatically generates the bad of chip
Rate and the accurate form of testing result；
Mechanical hand reset failure signal can also being directly transferred on production line or other similar execution equipment, it is achieved right
The automatic sorting of chip.
In reset circuit detection method disclosed in the present embodiment, preferably preset value and detection setting value are arranged to 0x and add
The form of flag bit, so can avoid shape between value of statistical indicant and test value or the detection setting value that depositor self character formed
Become the dependency relation of mistake.For example, if preset value and detection setting value being set to " 1 " or complete " 0 " entirely, at some
In the case of, just cannot get rid of hardware fault and cause multiple flag bits of depositor it is possible that complete " 0 " or the feelings of complete " 1 "
Condition, if at this moment the fault flag accidentally occurred and detection setting value are mated, then the detection knot of possible output error
Really.One is preferred embodiment that to arrange preset value be 0xFF, and arranging detection setting value is 0x CC.
Reset circuit detection method disclosed in the present embodiment, for different chips and subsystem, for chip itself
Different reset circuits, the difference in functionality of reset circuit, and different trigger conditions, can be adjusted easily by computer
Reset signal, detection setting value and preset value, thus ensure that reset circuit detection method can apply to different chips, different
System, and the detection of the reset circuit of multiple subsystems that setting is within the same electronic device, be not only restricted to highly integrated
The hardware limitation of reset circuit, intelligence degree is high, and testing result is accurate.
Last it is noted that above example is only in order to illustrate technical scheme, it is not intended to limit；Although
With reference to previous embodiment, the present invention is described in detail, it will be understood by those within the art that: it still may be used
So that the technical scheme described in foregoing embodiments to be modified, or wherein portion of techniques feature is carried out equivalent；
And these amendment or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit and
Scope.
Claims (10)
1. a reset circuit detecting system, it is characterised in that including:
Receive unit, be used for receiving test instruction；
At least one reset signal input block, is used for inputting reset signal；
Memory element, is used for storing at least one detection setting value and storing test value after reset circuit resets；
Comparing unit, after resetting at reset circuit, enters the test value in memory element with at least one detection setting value
Row compares；
When the test value in described memory element mates with detection setting value, output resets to function signal.
Reset circuit detecting system the most according to claim 1, it is characterised in that also include setup unit, described setting
Default settings in memory element, after instructing in reception test, is detection setting value by unit.
Reset circuit detecting system the most according to claim 2, it is characterised in that described comparing unit is additionally operable to, multiple
After the circuit reset of position, if the test value in memory element does not mates with detection setting value, then test value is compared with preset value,
When described test value does not mates with preset value, export reset failure signal.
Reset circuit detecting system the most according to claim 3, it is characterised in that also include that at least one records unit,
Described record unit resets to function signal and/or reset failure signal for record.
5. a reset circuit detection method, it is characterised in that comprise the following steps:
Receive test instruction；
Set detection setting value and store；
Generate reset signal；
After reset circuit resets, generate test value；
Being compared with detection setting value by test value, when test value mates with detection setting value, output resets to function signal.
Reset circuit detection method the most according to claim 5, it is characterised in that further comprising the steps of, at the electricity that resets
Before the homing action of road, it is detection setting value by the default settings of storage.
Reset circuit detection method the most according to claim 6, it is characterised in that further comprising the steps of, at the electricity that resets
After road resets, if test value does not mates with preset value, then test value is compared with preset value, when test value and preset value not
Timing, exports reset failure signal.
Reset circuit detection method the most according to claim 7, it is characterised in that further comprising the steps of, recording reset
Pass signal and reset failure signal.
Reset circuit detection method the most according to claim 8, it is characterised in that reset to function signal or reset in output
After failure signal, erasure detection setting value.
Reset circuit detection method the most according to claim 9, it is characterised in that reset signal is by Software Create.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610761161.1A CN106324483B (en) | 2016-08-30 | 2016-08-30 | A kind of reset circuit detection system and detection method |
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| CN201610761161.1A CN106324483B (en) | 2016-08-30 | 2016-08-30 | A kind of reset circuit detection system and detection method |
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| CN109540268A (en) * | 2018-12-18 | 2019-03-29 | 成都前锋电子仪器有限责任公司 | A kind of detection method of intelligent gas meter mainboard that capableing of auto-initiation |
| CN110749812A (en) * | 2018-07-24 | 2020-02-04 | 上海斐讯数据通信技术有限公司 | Automatic testing method, system and device for hardware circuit |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN106324483B (en) | 2019-07-30 |
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