CN106019679A - Array substrate, manufacturing method, display panel and display device - Google Patents
Array substrate, manufacturing method, display panel and display device Download PDFInfo
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- CN106019679A CN106019679A CN201610663715.4A CN201610663715A CN106019679A CN 106019679 A CN106019679 A CN 106019679A CN 201610663715 A CN201610663715 A CN 201610663715A CN 106019679 A CN106019679 A CN 106019679A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
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- Crystallography & Structural Chemistry (AREA)
- Engineering & Computer Science (AREA)
- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
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Abstract
The invention provides an array substrate, a manufacturing method, a display panel and a display device. The array substrate comprises a first insulation layer, a first transparent conductive layer, a second insulation layer, a second transparent conductive layer, a third insulation layer and a third transparent conductive layer which are sequentially overlapped on a transistor device layer. The first transparent conductive layer and the second transparent conductive layer are in a vertical position relation; the first transparent conductive layer comprises a graph of a touch electrode; the second transparent conductive layer comprises a graph of an induction electrode; the third transparent conductive layer comprises a graph of a pixel electrode. In any pixel region in a display region, the pixel electrode is connected with the pixel electrode connecting end of the transistor device layer through via holes formed in the first insulation layer, the second insulation layer and the third insulation layer. According to the array substrate, two perpendicularly distributed conductive layers are arranged to serve as two electrodes for touch control, and a touch control function is achieved. Due to the fact that no additional touch pattern metal is needed, the aperture opening ratio of a product can be increased.
Description
Technical field
The present invention relates to Display Technique field, be specifically related to a kind of array base palte and manufacture method,
Display floater and display device.
Background technology
Touch screen can be divided into external hanging type with embedded, and external hanging type touch screen is will to have touch controllable function
Panel be positioned at display device front, touch-surface covers the viewing area of viewing area.In
Embedded touch screen is to be integrated on the panel of display device by touch controllable function, outside can stick or
Person does not paste protection glass, and user touches screen by finger, can realize touch control operation.And it is interior
Embedded touch screen is divided into again (on cell) two types on box interior (in cell) and box.(on box
Cell) touch sensible element (touch control electrode) is produced on the outside of display screen by the touch screen of type,
Then polaroid, protection glass etc. are attached.In box, the touch screen of (in cell) type usually will
Touch sensible element is produced on the glass substrate side of array base palte, then makes complete display surface
Plate, it is achieved touch controllable function.
The design of a kind of traditional touch sensible element is to be designed to include a plurality of horizontal direction
On touch control electrode and touch control electrode on a plurality of vertical direction, form cross one another electrode
Pattern.But, for the touch screen of (in cell) type in box, if using such design,
Touch control unavoidably can disturbing by the data wire in the pixel of display floater or gate line, from
And it is likely to occur the situation of the wrong report point of touch.
The design of another traditional touch sensible element is by common electrical by time-multiplexed mode
Pole multiplexing is as touch sensible element.Fig. 1 schematically illustrates one of the prior art and is answered
Pattern as the public electrode of touch sensible element.As it is shown in figure 1, public electrode is divided into
Multiple the most discontinuous electrode blocks with on vertical direction in the horizontal direction, with each electrode block phase
Corresponding position, a plurality of touching signals line is arranged with each electrode block different layer ground of public electrode,
Touching signals line can be electrically connected with corresponding electrode block by via.Touching signals line is additionally coupled to
Touch detection chip (not shown in figure 1), to provide touching signals (to drive to each electrode block
Signal).These touching signals lines are generally formed by metal material, therefore, and in this article can be by
These touching signals lines are referred to as touch pattern metal (TPM).But, these touching signals lines
The aperture opening ratio that brought a defect is the pixel that may affect display device is set, thus
Affect picture quality and the visual effect of final display product.Meanwhile, in actual making
Cheng Zhong, the formation of touch pattern metal (TPM) brings additional material for display device
Material and technique, cause the increase of the cost of display device.
Summary of the invention
For defect of the prior art, the present invention provide a kind of array base palte and manufacture method,
Display floater and display device.The array base palte that the present invention provides devises two-layer vertical arrangement
Conductive layer is as two electrodes of touch-control, it is achieved touch controllable function, owing to the present invention need not additionally
Touch pattern metal, therefore can improve the aperture opening ratio of product.
For solving above-mentioned technical problem, the present invention provides techniques below scheme:
First aspect, the invention provides a kind of array base palte, including: the crystalline substance being positioned on substrate
Body tube device layer, also includes:
The first insulating barrier of stacking gradually on described transistor device layer, the first transparency conducting layer,
Second insulating barrier, the second transparency conducting layer, the 3rd insulating barrier and the 3rd transparency conducting layer；
Wherein, the first transparency conducting layer and the second transparency conducting layer are orthogonal position relationship；
Described first transparency conducting layer includes the figure of touch control electrode；
Described second transparency conducting layer includes the figure of induction electrode；
Described 3rd transparency conducting layer includes the figure of pixel electrode；
In any pixel region in viewing area, described pixel electrode is described by being arranged on
Via in first insulating barrier, described second insulating barrier and described 3rd insulating barrier connects described crystalline substance
The pixel electrode of body tube device layer connects end；Described first transparency conducting layer sets at described via
There is open area.
Further, described second transparency conducting layer is common electrode layer.
Further, described transistor device layer includes: the active layer that sequentially forms, gate insulation
Layer, grid metal level, interlayer dielectric layer, source and drain metal level and passivation layer；
In any pixel region in viewing area, described passivation layer was formed with sectional hole patterns,
For source and drain metal level described in expose portion, to form described pixel electrode connection end.
Further, described first insulating barrier and described passivation layer are same layer structure.
Further, described first transparency conducting layer, the second transparency conducting layer and the 3rd are transparent leads
The material of electric layer is tin indium oxide or indium zinc oxide.
Second aspect, present invention also offers the manufacture method of a kind of array base palte, is included in lining
Form the step of transistor device layer at the end, also include:
Described transistor device layer stacks gradually formation the first insulating barrier；Described first exhausted
Form the pixel electrode connection end for exposing described transistor device layer in edge layer crosses hole pattern
Case；
Described first insulating barrier is formed the first electrically conducting transparent of the figure including touch control electrode
Layer, is formed and the mistake sectional hole patterns phase in described first insulating barrier in described first transparency conducting layer
Corresponding open area；
Form the second insulating barrier covering described first transparency conducting layer；
Being formed on described second insulating barrier with described first transparency conducting layer is orthogonal position
Put the second transparency conducting layer of relation；Wherein the second transparency conducting layer includes induction electrode
Figure；
Formed and cover described second transparency conducting layer and the 3rd insulating barrier of described second insulating barrier；
Described second insulating barrier and described 3rd insulating barrier are formed and the hole pattern excessively in the first insulating barrier
The mistake sectional hole patterns that case is corresponding；
3rd insulating barrier is formed the 3rd transparency conducting layer of the figure including pixel electrode；
In any pixel region in viewing area, described pixel electrode is described by being arranged on
Mistake sectional hole patterns in first insulating barrier, described second insulating barrier and described 3rd insulating barrier connects institute
The pixel electrode stating transistor device layer connects end.
Further, the described step forming transistor device layer on substrate, specifically include: depend on
Secondary it is formed with active layer, gate insulation layer, grid metal level, interlayer dielectric layer, source and drain metal level and blunt
Change layer；Wherein, in any pixel region in viewing area, described passivation layer is formed
Cross sectional hole patterns, for source and drain metal level described in expose portion, to form the connection of described pixel electrode
End.
Further, described first insulating barrier and described passivation layer are same layer structure.
The third aspect, present invention also offers a kind of display floater, including battle array as described above
Row substrate.
Fourth aspect, present invention also offers a kind of display device, including the most aobvious
Show panel.
As shown from the above technical solution, the array base palte that the present invention provides, set in array base palte
Count the conductive layer two electrodes as touch-control of two-layer vertical arrangement, it is achieved touch controllable function, by
Need not extra touch pattern metal TPM Pattern in the present invention, therefore can improve product
Aperture opening ratio.Further, since need not form touch pattern metal TPM Pattern, therefore produce
The yield of product also can improve.
Accompanying drawing explanation
In order to be illustrated more clearly that the present embodiment or technical scheme of the prior art, below by right
In embodiment or description of the prior art, the required accompanying drawing used is briefly described, it is clear that
Ground, the accompanying drawing in describing below is some embodiments of the present invention, for ordinary skill
From the point of view of personnel, on the premise of not paying creative work, it is also possible to obtain according to these accompanying drawings
Other accompanying drawing.
Fig. 1 is the figure of a kind of public electrode making touch sensible element that is re-used of the prior art
Case.
Fig. 2 is the cross-sectional view of the array base palte that the embodiment of the present invention one provides；
Fig. 3 is the planar structure schematic diagram of the array base palte that the embodiment of the present invention one provides；
Fig. 4 is the flow chart of the array substrate manufacturing method that the embodiment of the present invention two provides.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below will knot
Close the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear,
Complete description, it is clear that described embodiment be a part of embodiment of the present invention rather than
Whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not having
Make the every other embodiment obtained under creative work premise, broadly fall into present invention protection
Scope.
Existing touch screen includes two kinds of products, and one is HIC (hibrid in cell) product,
One is FIC (full in cell) product.The wherein touch control electrode of FIC product and induction electrode
All being made in array base palte side, the touch control electrode of HIC product and induction electrode are made in color film base respectively
Plate and array base palte side.
In existing touch display screen technology, common electrode layer serves as of touch screen often
Battery lead plate (mutual tolerance product) or function simultaneously as two battery lead plates (certainly holding product) of touch screen.And
In this application, it is proposed that a kind of new design and design, in array base palte, two-layer is i.e. made
Electrode layer is respectively as touch control electrode plate and faradism pole plate, and both are arranged vertically and are distributed in not
Same layer.Visible, the present invention is by making at the electrode layer of array base palte design two-layer vertical arrangement
For two battery lead plates of touch screen, thus realize touch function.The present invention is compared to existing
HIC product, simplify process complexity (because be not required to thinning after do at the color membrane substrates back side and to feel
Answer electrode), Yield lmproved is also had to the biggest contribution；It is compared to FIC (full in cell)
Product, the aperture opening ratio of meeting improving product is (because need not extra touch pattern metal TPM
Pattern).The array base palte provided the present invention below by specific embodiment is explained in detail.
Embodiment one
Fig. 2 shows the structural representation of the array base palte that the embodiment of the present invention one provides.See
Fig. 2, the embodiment of the present invention one provides a kind of array base palte, and this array base palte includes: be positioned at lining
Transistor device layer 100 at the end, also includes:
The first insulating barrier 10a of stacking gradually on described transistor device layer 100, first transparent
Conductive layer 10b, the second insulating barrier 20a, the second transparency conducting layer 20b, the 3rd insulating barrier 30a
With the 3rd transparency conducting layer 30b；Preferably, described first transparency conducting layer 10b, second transparent
The material of conductive layer 20b and the 3rd transparency conducting layer 30b is tin indium oxide or indium zinc oxide；
Wherein, the first transparency conducting layer 10b and the second transparency conducting layer 20b is orthogonal
Position relationship；
Described first transparency conducting layer 10b includes the figure of touch control electrode；
Described second transparency conducting layer 20b includes the figure of induction electrode；
Described 3rd transparency conducting layer 30b includes the figure of pixel electrode；
In any pixel region in viewing area, in described 3rd transparency conducting layer 30b
Pixel electrode is by being arranged on described first insulating barrier 10a, described second insulating barrier 20a and described
Via in 3rd insulating barrier 30a connects the pixel electrode of described transistor device layer 100 and connects
End；Described first transparency conducting layer 10b is provided with open area at described via.
Preferably, described transistor device layer 100 includes: the active layer 01 that sequentially forms, grid
Insulating barrier 02, grid metal level (not shown in Fig. 2), interlayer dielectric layer 04, source and drain metal level
05 and passivation layer 06；
In any pixel region in viewing area, described passivation layer 06 was formed with hole pattern
Case, for source and drain metal level 05 described in expose portion, to form described pixel electrode connection end.
Additionally, described array base palte also includes substrate 80 and cushion 90, described transistor device
Layer 100 is formed on described cushion 90.
In order to save one procedure, it is preferable that see Fig. 2, described first insulating barrier 10a with brilliant
Passivation layer 06 in body tube device layer 100 is same layer structure, will transistor device layer 100
In passivation layer 06 as the first insulating barrier.
Additionally, due to described second transparency conducting layer 20b includes the figure of induction electrode, therefore,
Described second transparency conducting layer 20b is touch control electrode layer.Additionally, due to described second transparent leads
Electric layer 20b is also used as the common electrode layer of array base palte, with described 3rd transparency conducting layer
30b (pixel electrode layer) forms the running voltage of array base palte together.Therefore described second transparent leads
Electric layer 20b achieves same layer multiplexing, is touch control electrode layer again for common electrode layer.
Wherein, the cross-sectional view of the array base palte that Fig. 2 provides for the embodiment of the present invention one,
The planar structure schematic diagram of the array base palte that Fig. 3 provides for the embodiment of the present invention one.In Fig. 3
ITO-1 is the first transparency conducting layer 10b, and ITO-2 is the second transparency conducting layer 20b, ITO-1 and
ITO-2 is orthogonal position relationship.Additionally, SD represents source and drain metal level, Gate represents
Grid line.
Understanding from the description above, the array base palte that the embodiment of the present invention provides, in array base palte
Devise the conductive layer two electrodes as touch-control of two-layer vertical arrangement, it is achieved touch controllable function,
Owing to the present invention need not extra touch pattern metal TPM Pattern, product therefore can be improved
The aperture opening ratio of product.Further, since need not be formed touch pattern metal TPM Pattern, therefore
The yield of product also can improve.
The array base palte that the embodiment of the present invention one is provided, relative to existing array base palte,
Difference is: increase a layer insulating (on the source and drain metal level 05 of transistor device layer 100
One insulating barrier 10a) and one layer of electrode layer (the first transparent electrode layer 10b).This is because it is existing
Array base palte in natively include the second transparent electrode layer 20b (common electrode layer) and the 3rd saturating
Prescribed electrode layer 30b (pixel electrode layer).The first transparent electrode layer 10b that the embodiment of the present invention is formed
It is orthogonal position relationship with the second transparent electrode layer 20b.
The embodiment of the present invention is by the two of touch screen battery lead plates (touch control electrode plate and faradism pole plate)
Being made in array base palte, compared to existing touch screen design, product is opened by the present invention simultaneously
Mouth rate and yield have certain contribution.
The embodiment of the present invention two additionally provides the manufacture method of a kind of array base palte, sees Fig. 4, should
Manufacture method also comprises the steps:
Step 101: form the step of transistor device layer on substrate.
Step 102: stack gradually formation the first insulating barrier on described transistor device layer；Institute
State the pixel electrode formed in the first insulating barrier for exposing described transistor device layer and connect end
Cross sectional hole patterns.
Step 103: form figure first saturating including touch control electrode on described first insulating barrier
Bright conductive layer, is formed and the via in described first insulating barrier in described first transparency conducting layer
The open area that pattern is corresponding.
Step 104: form the second insulating barrier covering described first transparency conducting layer.
Step 105: formed with described first transparency conducting layer in mutually on described second insulating barrier
Second transparency conducting layer of vertical position relationship；Wherein the second transparency conducting layer includes thoughts
Answer the figure of electrode.
Step 106: formed and cover described second transparency conducting layer and the 3rd of described second insulating barrier the
Insulating barrier；Described second insulating barrier and described 3rd insulating barrier are formed and in the first insulating barrier
The corresponding mistake sectional hole patterns of mistake sectional hole patterns.
Step 107: form the 3rd of the figure including pixel electrode on the 3rd insulating barrier and transparent lead
Electric layer.
Step 108: in any pixel region in viewing area, described pixel electrode is by setting
Put the hole pattern excessively in described first insulating barrier, described second insulating barrier and described 3rd insulating barrier
Case connects the pixel electrode of described transistor device layer and connects end.
Further, above-mentioned steps 101 specifically includes: sequentially form active layer, gate insulation layer,
Grid metal level, interlayer dielectric layer, source and drain metal level and passivation layer；Wherein, in viewing area
Any pixel region in, described passivation layer was formed with sectional hole patterns, for expose portion institute
State source and drain metal level, to form described pixel electrode connection end.
In order to save one procedure, it is preferable that see Fig. 2, described first insulating barrier 10a with brilliant
Passivation layer 06 in body tube device layer 100 is same layer structure, will transistor device layer 100
In passivation layer 06 as the first insulating barrier.
The array base palte made for the embodiment of the present invention, relative to existing array base palte, district
It is not: the present invention increases by one layer of insulation on the source and drain metal level 05 of transistor device layer 100
Layer (the first insulating barrier 10a) and one layer of electrode layer (the first transparent electrode layer 10b).In source and drain
Metal level 05 increases by one layer of first insulating barrier 10a after completing, it is therefore an objective to prevent first below saturating
Prescribed electrode layer 10b and source and drain metal level 05 short circuit.First insulating barrier 10a forms laggard line mask
And etching technics, at source and drain metal level 05 and the 3rd transparent electrode layer 30b (pixel electrode layer)
The position of contact burrows and bridges.
Wherein, the first insulating barrier 10a carries out being formed the work of the first transparent electrode layer 10b after being formed
Skill, its effect is the battery lead plate (touch control electrode plate) forming touch screen, follow-up through mask
And etching technics, at the position that the first transparent electrode layer 10b directly contacts with source and drain metal level 05
First transparent electrode layer 10b is removed, prevents the first transparent electrode layer 10b and source and drain metal level
05 short circuit.First transparent electrode layer 10b carry out after completing follow-up the second insulating barrier 10a,
Two transparent electrode layer 20b (faradism pole plate), the 3rd insulating barrier 30a and the 3rd transparent electrode layer
30b, finally, the touch control electrode plate of touch screen and faradism pole plate vertical distribution are different at two
In Ceng.
The embodiment of the present invention is used to make the array described in array base palte and above-described embodiment obtained
Substrate has similar beneficial effect, the most no longer describes in detail.
Based on identical inventive concept, the embodiment of the present invention three provides a kind of display floater, should
Display floater includes array base palte as described above.
The display floater provided due to the present embodiment includes the array base palte described in above-described embodiment,
Therefore the display floater that the present embodiment provides has the beneficial effect similar with described array base palte,
The most no longer describe in detail.
Wherein, the display floater described in the present embodiment can be organic light emission electroluminescent diode OLED
Display floater or liquid crystal LCD display panel.
Based on identical inventive concept, the embodiment of the present invention four provides a kind of display device, should
Display device includes display floater as described above.
The display device provided due to the present embodiment includes the display floater described in above-described embodiment,
Therefore the display device that the present embodiment provides has the beneficial effect similar with described display floater,
The most no longer describe in detail.
Wherein, the display device described in the present embodiment can be applied at mobile phone, panel computer, take the photograph
Camera, photographing unit, television set and printer etc. have in the product of display function.
In describing the invention, it should be noted that term " on ", the instruction such as D score
Orientation or position relationship are based on orientation shown in the drawings or position relationship, are for only for ease of and retouch
State the present invention and simplify description rather than instruction or imply that the device of indication or element must have
Specific orientation, with specific azimuth configuration and operation, therefore it is not intended that to the present invention's
Limit.Unless otherwise clearly defined and limited, term " install ", " being connected ", " connection "
Should be interpreted broadly, connect for example, it may be fixing, it is also possible to be to removably connect, or one
Body ground connects；Can be to be mechanically connected, it is also possible to be electrical connection；Can be to be joined directly together, also
Can be indirectly connected to by intermediary, can be the connection of two element internals.For ability
For the those of ordinary skill in territory, above-mentioned term can be understood as the case may be in the present invention
Concrete meaning.
Also, it should be noted in this article, the relational terms of such as first and second or the like
It is used merely to separate an entity or operation with another entity or operating space, and differs
Provisioning request or imply and there is the relation of any this reality or suitable between these entities or operation
Sequence.And, term " includes ", " comprising " or its any other variant are intended to non-exclusive
Comprising, so that include the process of a series of key element, method, article or equipment not of property
Only include those key elements, but also include other key elements being not expressly set out, or also wrap
Include the key element intrinsic for this process, method, article or equipment.There is no more restriction
In the case of, statement " including ... " key element limited, it is not excluded that described in including
The process of key element, method, article or equipment there is also other identical element.
Above example is merely to illustrate technical scheme, is not intended to limit；Although
With reference to previous embodiment, the present invention is described in detail, those of ordinary skill in the art
It is understood that the technical scheme described in foregoing embodiments still can be modified by it,
Or wherein portion of techniques feature is carried out equivalent；And these amendments or replacement, do not make
The essence of appropriate technical solution departs from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (10)
1. an array base palte, including: the transistor device layer being positioned on substrate, its feature exists
In, also include:
The first insulating barrier of stacking gradually on described transistor device layer, the first transparency conducting layer,
Second insulating barrier, the second transparency conducting layer, the 3rd insulating barrier and the 3rd transparency conducting layer；
Wherein, the first transparency conducting layer and the second transparency conducting layer are orthogonal position relationship；
Described first transparency conducting layer includes the figure of touch control electrode；
Described second transparency conducting layer includes the figure of induction electrode；
Described 3rd transparency conducting layer includes the figure of pixel electrode；
In any pixel region in viewing area, described pixel electrode is described by being arranged on
Via in first insulating barrier, described second insulating barrier and described 3rd insulating barrier connects described crystalline substance
The pixel electrode of body tube device layer connects end；Described first transparency conducting layer sets at described via
There is open area.
Array base palte the most according to claim 1, it is characterised in that described second transparent
Conductive layer is common electrode layer.
Array base palte the most according to claim 1, it is characterised in that described transistors
Part layer includes: the active layer that sequentially forms, gate insulation layer, grid metal level, interlayer dielectric layer,
Source and drain metal level and passivation layer；
In any pixel region in viewing area, described passivation layer was formed with sectional hole patterns,
For source and drain metal level described in expose portion, to form described pixel electrode connection end.
Array base palte the most according to claim 3, it is characterised in that described first insulation
Layer and described passivation layer are same layer structure.
Array base palte the most according to claim 1, it is characterised in that described first transparent
The material of conductive layer, the second transparency conducting layer and the 3rd transparency conducting layer is tin indium oxide or oxidation
Indium zinc.
6. a manufacture method for array base palte, is included on substrate and forms transistor device layer
Step, it is characterised in that also include:
Described transistor device layer stacks gradually formation the first insulating barrier；Described first exhausted
Form the pixel electrode connection end for exposing described transistor device layer in edge layer crosses hole pattern
Case；
Described first insulating barrier is formed the first electrically conducting transparent of the figure including touch control electrode
Layer, is formed and the mistake sectional hole patterns phase in described first insulating barrier in described first transparency conducting layer
Corresponding open area；
Form the second insulating barrier covering described first transparency conducting layer；
Being formed on described second insulating barrier with described first transparency conducting layer is orthogonal position
Put the second transparency conducting layer of relation；Wherein the second transparency conducting layer includes induction electrode
Figure；
Formed and cover described second transparency conducting layer and the 3rd insulating barrier of described second insulating barrier；
Described second insulating barrier and described 3rd insulating barrier are formed and the hole pattern excessively in the first insulating barrier
The mistake sectional hole patterns that case is corresponding；
3rd insulating barrier is formed the 3rd transparency conducting layer of the figure including pixel electrode；
In any pixel region in viewing area, described pixel electrode is described by being arranged on
Mistake sectional hole patterns in first insulating barrier, described second insulating barrier and described 3rd insulating barrier connects institute
The pixel electrode stating transistor device layer connects end.
Method the most according to claim 6, it is characterised in that described formation on substrate
The step of transistor device layer, specifically includes: sequentially form active layer, gate insulation layer, grid gold
Belong to layer, interlayer dielectric layer, source and drain metal level and passivation layer；Wherein, appointing in viewing area
In one pixel region, described passivation layer was formed with sectional hole patterns, for source described in expose portion
Leakage metal level, to form described pixel electrode connection end.
Method the most according to claim 7, it is characterised in that described first insulating barrier and
Described passivation layer is same layer structure.
9. a display floater, including the array base palte as according to any one of Claims 1 to 5.
10. a display device, including display floater as claimed in claim 9.
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| CN201610663715.4A CN106019679A (en) | 2016-08-12 | 2016-08-12 | Array substrate, manufacturing method, display panel and display device |
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| CN201610663715.4A CN106019679A (en) | 2016-08-12 | 2016-08-12 | Array substrate, manufacturing method, display panel and display device |
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| WO2023108671A1 (en) * | 2021-12-14 | 2023-06-22 | 武汉华星光电半导体显示技术有限公司 | Display panel and mobile terminal |
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