CN105244057B - Method for writing state register of nonvolatile memory - Google Patents

Method for writing state register of nonvolatile memory Download PDF

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CN105244057B
CN105244057B CN201510633909.5A CN201510633909A CN105244057B CN 105244057 B CN105244057 B CN 105244057B CN 201510633909 A CN201510633909 A CN 201510633909A CN 105244057 B CN105244057 B CN 105244057B
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data
programming
status register
writing
register
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CN105244057A (en
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舒清明
薛子恒
潘荣华
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Zhaoyi Innovation Technology Group Co ltd
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GigaDevice Semiconductor Beijing Inc
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Abstract

The invention discloses a method for writing a status register of a nonvolatile memory. The method comprises the steps of 1, reading original data of a status register; step 2, comparing the data sent by the user with the original data; step 3, judging whether bit data needing to be erased exists in the user data, if so, sequentially performing pre-programming operation, erasing operation, programming operation and finishing the writing operation process on the original data, and otherwise, executing step 4; and 4, judging whether the user data is the same as the original data or not, if so, ending the process of writing the status register, otherwise, programming the original data and ending the process of writing the status register. The technical scheme provided by the embodiment of the invention reduces repeated programming and erasing operations of the storage unit of the status register, prolongs the service life of the status register and improves the product quality.

Description

Method for writing state register of nonvolatile memory
Technical Field
the invention relates to the technical field of nonvolatile memories, in particular to a method for writing a status register of a nonvolatile memory.
background
the semiconductor memory includes a volatile memory and a nonvolatile memory. Volatile memory loses its stored contents when power is removed. Non-volatile memory can retain stored contents even when power is removed. The nonvolatile Memory includes Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Electrically Erasable Read-Only Memory (EEPROM), and Flash Memory (Flash Memory). The Flash memory includes NOR (NOR) Flash and NAND (NAND) Flash.
non-volatile memories consist of memory arrays, each of which includes a large number of memory cells, each of which is capable of storing 1-bit binary data ("0" or "1"). A portion of the memory cells in the memory are used as status registers, and the user updates the data values of the status registers by sending a write status register instruction. Taking NOR Flash in Flash as an example, the status register in NOR Flash is written by 06H command +01 command + data.
Fig. 1 is a schematic flow chart illustrating a write operation performed on a status register of a non-volatile memory in the prior art. Referring to fig. 1, the write operation specifically includes the following steps:
step S101: and performing a pre-programming operation on the state register, and adjusting the threshold voltage of all memory cells in the state register to be within the threshold range of the programming unit.
Step S102: and carrying out erasing operation on the programmed programming unit, carrying out erasing verification every time of carrying out the erasing operation, and carrying out the erasing operation again if the verification fails.
Step S103: and after the erasing is successful, programming operation is carried out on the storage unit in the state register by using data sent by a user, programming verification is carried out every time of the programming operation, and the programming operation is carried out again if the verification fails.
step S104: after programming is successful, data in the storage unit in the state register is read out and put into a latch for use when the chip works.
It can be seen from the above write operation flow of the state register of the non-volatile memory that, in the prior art, in software implementation, the memory cells in the register are repeatedly programmed and erased, so that the times of erasing and programming the memory cells in the state register are increased, the speed of the overall operation of writing the state register is reduced, the service life of the state register is shortened, and the product quality is reduced.
disclosure of Invention
The embodiment of the invention provides a method for writing a status register in a nonvolatile memory, which is used for saving the time for writing the status register and prolonging the service life of the status register.
the embodiment of the invention provides a method for writing a status register in a nonvolatile memory, which comprises the following steps:
Step 1, reading original data of a status register;
Step 2, comparing the data sent by the user with the original data of the state register;
Step 3, judging whether the data sent by the user has bit data needing to be erased, if so, sequentially performing pre-programming operation, erasing operation, programming operation and finishing writing operation on the original data of the state register, and otherwise, executing step 4;
And 4, judging whether the data sent by the user is the same as the original data of the state register, if so, ending the process of writing the state register, otherwise, performing programming operation on the original data of the state register and ending the process of writing the state register.
further, the pre-programming operations include: pre-programming verification; and judging whether the pre-programmed verification is successful, if so, executing an erasing operation, otherwise, pre-programming the data of the state register until the pre-programmed verification is successful.
Further, the erasing operation includes: erasing all data of the status register; erasing and checking; and judging whether the erasing verification is successful, if so, executing subsequent operation, and otherwise, erasing the data of the status register until the erasing verification is successful.
further, the erasing operation is to erase all the memory cell data of the status register.
Further, the programming operation includes: programming and checking; and judging whether the programming verification is successful, if so, executing subsequent operation, otherwise, programming the data of the state register until the programming is successful.
Further, the programming operation is to program bit data in the status register data, which is different from bit data in the user transmission data, to the same bit data as in the user transmission data.
Further, before reading the original data of the status register in step 1, the method further includes: and receiving data of writing the status register sent by a user.
further, after the process of writing the status register is finished, the method further includes: and reading the current data of the status register and storing the current data into a latch corresponding to the nonvolatile memory.
According to the technical scheme provided by the embodiment of the invention, the original data of the state register is read, the data sent by a user is compared with the original data of the state register, and the data of the state register is written according to the comparison result, so that the overall operation speed of writing the state register is increased, the repeated programming and erasing operations of the storage unit in the register are reduced, the service life of the state register is prolonged, and the product quality is improved.
drawings
FIG. 1 is a flow chart illustrating a prior art write operation to a status register of a non-volatile memory;
FIG. 2 is a flowchart illustrating a method for writing status registers to a non-volatile memory according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a pre-programming operation in a method for writing status registers in a non-volatile memory according to a second embodiment of the present invention;
FIG. 4 is a flowchart illustrating an erase operation in a method for writing status registers to a non-volatile memory according to a second embodiment of the present invention;
Fig. 5 is a flowchart illustrating a program operation in a method for writing a status register in a nonvolatile memory according to a second embodiment of the present invention.
Detailed Description
the present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the operations (or steps) as a sequential process, many of the operations can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.
Example one
Fig. 2 is a flowchart illustrating a method for writing a status register in a non-volatile memory according to an embodiment of the present invention. The method is suitable for writing to a status register of a non-volatile memory. The status register is comprised of a plurality of memory cells, each memory cell capable of storing a binary number ("0" or "1") of one bit. The method specifically comprises the following steps:
Step S210, reading the original data of the status register, and continuing to execute step S220;
step S220, comparing the data sent by the user with the original data of the status register, and continuing to execute step S230;
step S230, determining whether there is bit data to be erased in the data sent by the user, if yes, performing step S250, otherwise, performing step S240;
step S240, determining whether the data sent by the user is the same as the original data of the status register, if yes, executing step S280, otherwise, executing step S270;
Step S250, performing pre-programming operation on the original data of the state register, and continuing to execute step S260;
step S260, carrying out erasing operation on the original data of the state register, and continuing to execute step S270;
step S270, programming operation is carried out on the original data of the state register, and step S280 is continuously executed;
and step S280, ending the status register writing process.
The original data of the status register may be all erase data, all program data, or part erase data. The erase data refers to the state register having the threshold voltage of the memory cell within the threshold voltage range of the erase cell. The program data means that the threshold voltage of the memory cell to be programmed in the state register is within the threshold voltage range of the program cell.
When the data sent by the user and the raw data of the status register are equal, the raw data of the status register does not need to undergo any pre-programming operation, erasing operation and/or programming operation, and thus the process of writing the status register can be ended. Compared with the prior art in which all the status registers are subjected to the pre-programming operation, the erasing operation and the programming operation, the operation of the invention accelerates the speed of writing the status registers, reduces the repeated erasing operation and the programming operation of the status registers, and greatly prolongs the service life of the status registers.
the pre-programming operation is to adjust the threshold voltage of all the memory cells of the state register to be within the threshold voltage range of the programming unit; the erasing operation is to adjust the threshold voltage of all the memory cells of the state register to be within the threshold voltage range of the erasing unit; the programming operation is to adjust the threshold voltages of the memory cells to be programmed in the status register to be within the threshold voltage range of the program cell.
further, before step S210, the method further includes:
And step S200, receiving data of writing the status register sent by a user.
further, after step S280, the method further includes:
And step S290, reading the current data of the state register and storing the current data into a latch corresponding to the nonvolatile memory.
According to the technical scheme provided by the embodiment of the invention, the original data of the state register is read, the data sent by a user is compared with the original data of the state register, and the data of the state register is written according to the comparison result, so that the overall operation speed of writing the state register is increased, the repeated programming and erasing operations of the storage unit in the register are reduced, the service life of the state register is prolonged, and the product quality is improved.
example two
The embodiment of the invention is further explained on the basis of the first embodiment, namely, the pre-programming operation, the erasing operation and the programming operation. Fig. 3 is a flowchart illustrating a pre-programming operation in a method for writing a status register in a non-volatile memory according to a second embodiment of the present invention. Referring to fig. 3, the pre-programming operations include:
Step S311, pre-programming verification;
Step S312, judging whether the pre-programming check is successful, if so, executing step S260, otherwise, executing step S313;
Step 313, pre-programming the data of the status register, and executing step 311.
The purpose of the pre-programmed verify is to verify whether the threshold voltages of all memory cells in the status register have been adjusted to be within the threshold range of the programmed cell. The pre-program verify is successful, indicating that the threshold voltages of all memory cells in the status register have been adjusted to be within the threshold range of the programmed cells, and an erase operation can be performed.
in the embodiment, the pre-programming verification operation is performed firstly, and if the verification is successful, the data of the state register does not need to be pre-programmed, so that the time for writing the state register is saved, and the service life of the state register is prolonged.
Fig. 4 is a schematic flowchart illustrating an erase operation in a method for writing a status register in a non-volatile memory according to a second embodiment of the present invention. Referring to fig. 4, the erase operation includes:
Step S321, erasing all data of the status register;
step S322, erasing and checking;
step S323, determining whether the erase verification is successful, if so, performing step S270, otherwise, performing step S321.
the purpose of the erase verification is to verify whether the threshold voltages of all the memory cells in the status register have been adjusted to be within the threshold range of the erased cells. The erase verify is successful, indicating that the threshold voltages of all memory cells in the status register have been adjusted to be within the threshold range of the erased cells, and a program operation can be performed.
Further, the erasing operation is to erase all the memory cell data of the status register.
fig. 5 is a flowchart illustrating a program operation in a method for writing a status register in a nonvolatile memory according to a second embodiment of the present invention. Referring to fig. 5, the program operation includes:
Step S331, programming verification;
step S332, judging whether the programming verification is successful, if so, executing step S280, otherwise, executing step S333;
And S333, programming the data of the state register, and executing the step S331.
The purpose of program verify is to verify whether the threshold voltage of the memory cell to be programmed in the status register has been adjusted to be within the threshold range of the programmed cell. The program verification is successful, which indicates that the threshold voltage of the memory cell to be programmed in the status register is adjusted to be within the threshold range of the programmed cell, and the subsequent operation can be performed.
in the above embodiment, the program verification operation is performed first, and if the program verification is successful, the data of the status register does not need to be programmed, so that the time for writing the status register is saved, and the service life of the status register is prolonged.
further, the programming operation is to program bit data in the status register data, which is different from bit data in the user transmission data, to the same bit data as in the user transmission data.
According to the technical scheme provided by the embodiment of the invention, the accuracy of data in the data operation process of the state register is ensured through the pre-programming operation, the erasing operation and the programming operation, the time for writing the state register is saved, and the service life of the state register is prolonged.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications or variations that fall within the spirit and scope of the present invention will be suggested to those skilled in the art.

Claims (7)

1. A method of writing to a status register in a non-volatile memory, comprising:
Step 1, reading original data of a status register;
Step 2, comparing the data sent by the user with the original data of the state register;
step 3, judging whether the data sent by the user has bit data needing to be erased, if so, sequentially performing pre-programming operation, erasing operation, programming operation and finishing writing operation on the original data of the state register, and otherwise, executing step 4;
Step 4, judging whether the data sent by the user is the same as the original data of the state register, if so, ending the process of writing the state register, otherwise, programming the original data of the state register and ending the process of writing the state register;
the pre-programming operations, including:
Pre-programming verification;
Judging whether the preprogramming is successful, if so, executing an erasing operation, otherwise, preprogramming the data of the state register until the preprogramming verification is successful;
The pre-programming operation is to adjust the threshold voltages of all memory cells of the status register to be within the threshold voltage range of the program cell.
2. The method of claim 1, wherein the erase operation comprises:
Erasing all data of the status register;
Erasing and checking;
and judging whether the erasing verification is successful, if so, executing subsequent operation, and otherwise, erasing the data of the status register until the erasing verification is successful.
3. the method of claim 2, wherein the erase operation is erasing all cell data of the status register.
4. The method of claim 1, wherein the programming operation comprises:
programming and checking;
and judging whether the programming verification is successful, if so, executing subsequent operation, otherwise, programming the data of the state register until the programming verification is successful.
5. the method of claim 4, wherein the programming operation is programming bit data in the status register data other than the user transmit data to the same bit data as the user transmit data.
6. The method according to claim 1, wherein step 1, before reading the raw data of the status register, further comprises:
And receiving data of writing the status register sent by a user.
7. the method of claim 1, wherein after ending the process of writing to the status register, further comprising:
and reading the current data of the status register and storing the current data into a latch corresponding to the nonvolatile memory.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6256232B1 (en) * 2000-07-07 2001-07-03 Institute For Information Industry Data access method capable of reducing the number of erasing to flash memory and data patch and access device using the same
CN1643613A (en) * 2002-03-20 2005-07-20 索尼株式会社 Data storage circuit, data write method in the data storage circuit, and data storage device
CN101419838A (en) * 2008-09-12 2009-04-29 中兴通讯股份有限公司 Method for enhancing using life of flash
CN102831929A (en) * 2012-09-04 2012-12-19 中国科学院上海微系统与信息技术研究所 Reading-writing conversion system and reading-writing conversion method of phase change memory

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7738295B2 (en) * 2007-01-31 2010-06-15 Micron Technology, Inc. Programming a non-volatile memory device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6256232B1 (en) * 2000-07-07 2001-07-03 Institute For Information Industry Data access method capable of reducing the number of erasing to flash memory and data patch and access device using the same
CN1643613A (en) * 2002-03-20 2005-07-20 索尼株式会社 Data storage circuit, data write method in the data storage circuit, and data storage device
CN101419838A (en) * 2008-09-12 2009-04-29 中兴通讯股份有限公司 Method for enhancing using life of flash
CN102831929A (en) * 2012-09-04 2012-12-19 中国科学院上海微系统与信息技术研究所 Reading-writing conversion system and reading-writing conversion method of phase change memory

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