CN104569611B - A kind of PCB transmission line insertion loss method of testing and probe unit - Google Patents
A kind of PCB transmission line insertion loss method of testing and probe unit Download PDFInfo
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Abstract
It is proposed a kind of PCB transmission line insertion loss method of testing, by building fc-specific test FC pcb board, count length-specific transmission line under specific frequency go it is embedding after insertion loss as test empirical value, using the test empirical value as the comparison object value for judging actual PCB design quality；A kind of probe unit, including sound end and fixing end are also provided.The test probe apparatus of proposition easily operates, and measuring accuracy is high, and cost is low, easy care；The method correction of proposition is concise effective, and precision is high.
Description
Technical field
The present invention relates to printing board PCB design field, and in particular to a kind of full-automatic PCB transmission lines insertion damage
Consume method of testing and probe unit.
Background technology
For electronics industry under the driving of Moore's Law, product function is more and more stronger, integrated level more and more higher, the speed of signal
Increasingly faster, the corresponding R＆D cycle is also shorter and shorter.Due to the microminiaturization of electronic product, high speed, to designing and being engineered band
Carry out various challenges.PCB is the physics realization of electrical connection, connects a variety of electric devices by PCB, it is real to complete function
It is existing.PCB includes the metal transmission line for connecting each device, and in high speed serialization system, we also need to consider high quality
Transmission loss and transmission line where insulation environment dielectric loss performance.PCB losses can cause signal amplitude to reduce, and rise
Time slows down, and degrades so as to produce function.And metal transmission line geometric shape is included for the affecting parameters of PCB losses, metal
The many factors such as surface roughness, Kelvin effect, dielectric loss parameter, dielectric constant, humiture, for numerous affecting parameters and
The lifting of signal frequency, it is particularly important more accurate loss parameter can be measured in each frequency range.Increasing product is because of nothing
Source channels control it is undesirable, cause launch postpone or the reliable problem of product it is uncontrollable the problems such as.
The loss parameter of high speed signal turns into the important parameter for judging passive channel electric property, and transmission line etches, layer
The parameter of the various PCB processing such as pressure, brown, impedance control directly affects this parameter, and the small-lot testing for product is increasingly
It can not meet that we judge whether product reliably requires, different individual differences, different PCB factories, different processing batches,
The whether reliable risk of Related product be present.Thus, it would be desirable to it is the test for be lost parameter in the PCB process segments,
For differentiating PCB passive channel performances, reducing function reduces risk, reduces the R＆D cycle.Rather than have after the completion of product in SI
Source is tested with system testing environment to verify product reliability, is moved after the discovery time that can only so throw into question point, is influenceed product
Cycle.
It is to use VNA (vector network to the loss test of high speed signal, more ripe method
Analyzer) or TDR (Time-Domain Reflectometry) equipment is tested.VNA equipment is that Agilent Products are set
It is standby, it is a kind of electromagnetic wave energy equipment, for network analysis, network refers to the electronic component that is mutually related inside one group.Net
One of function of network analyzer is exactly to quantify the impedance mismatch between two RF components, to greatest extent improve power efficiency and
The integrality of signal.When radiofrequency signal enters another by an element, always some signal is reflected, and another
Part is transmitted, so thus proposing the concept of S parameter, the signal problem that we mention is treated from frequency.Itself is surveyed
Examination precision is in the field of business at present generally to be approved, but due to probe and automatics problem, detection calibration and testing efficiency be not high, therefore
Also fail to extend to high-volume test loss equipment.TDR equipment can also be used for loss test, but due to test probe limitation, essence
The factors such as degree control result in the need for manual calibration and taken long, it is impossible to as high-volume testing scheme.And TDR instruments itself
Noise measarement to compare VNA equipment poor, cause it bad in higher frequency section test result and actual match, only relatively low
Frequency range is generally approved.
For S parameter concept, the network of general two-port has four groups of S parameters, is respectively：S11/S21/S22/S12.
S11 represents gets a radiofrequency signal by Port1, then receives the signal reflected by Port1 again.
S21 represents gets a radiofrequency signal by Port1, then is received by Port2.
S22 is then to get a radiofrequency signal by Port2, then receives the signal reflected by Port2 again.
S12 represents gets a radiofrequency signal by Port2, then is received by Port1.
Generally we measure PCB passive channel, i.e. S21 or S12 parameters, wherein SDD21 with the concept of insertion loss
Parameter represents the insertion loss of differential ends mouth.Insertion loss and the concept source of reflection parameters are in the definition of S parameter, insertion loss
Unit be decibel DB, S parameter no longer repeats herein as the Common Parameters described for passive channel.
Referring to Fig. 1, when measuring insertion loss, it is necessary to using the FA21 for going embedding algorithm to quote test device, FB21's
Value is cut, and the two numerical value are unable to direct measurement, or the result directly tested is insincere, it is necessary to be peeled off by certain algorithm.Ginseng
Scold bright：The part that FA represents test fixture and instrument port 1 is connected, FB represents test fixture and instrument port 2 is connected
Part.
The test result that embedding algorithm is the length of transmission line based on multigroup rule is gone, and computing is carried out to various results, will
Influence of the test device for test result removes, so as to obtain accurate measurement result.It is simple below to introduce in the prior art
Traditional removes embedding algorithm, and S parameter is converted into Z matrixes.Equation below, Tmeasured are measurement, and Tde-embedded is embedding to go
Principle formula.
[TA]-1[TA][TDUT][TB][TB]-1
=[TDUT]
[TMeasured]=[TL][TDUT][TR]
[TDe-embedded]=[TL]-1[TMeasured][TR]-1
=[TL]-1[TL][TDUT][TR][TR]-1=[TDUT]
By it is above-mentioned introduce it is visible, it is existing to go embedding algorithm more complicated, be related to matrixing and calculating, calculating process is numerous
It is trivial, influence computational accuracy.In addition, the species of probe has GGB, SMA/SMP, probe station etc. at present, these are from cost, efficiency, easily
With etc. can not meet the requirement of batch testing.Wherein GGB probes are used for the method for testing for coordinating SET2DIL, easily damage,
Cost is high.SMA probes are commonly used to passive channel test, possess higher precision, but need the welding the corresponding interface such as PCB storehouse,
Convenience and easy design are poor.High-end Probe test station possesses high accuracy, high cost behavior, and the cycle of one piece of veneer of test exists
2 days or so, and test high with human cost, it is impossible to be used in large batch of test.
The content of the invention
Based on technical problem present in above-mentioned prior art, the present invention proposes a kind of PCB transmission line insertion loss test
Embedding algorithm complex is removed in method and probe unit, reduction, improves test result accuracy, realizes extensive automatic test, drops
Low human cost.
Methods described includes：
S1：PCB test boards are made, the length per transmission lines meets thereon：Fn+1=Fn+Fn-1, wherein FnPassed for nth bar
The length of defeated line, n>2, and n is positive integer；
S2：When transmitting the signal of a certain frequency on the transmission line, each transmission lines are measured using probe unit
Insertion loss, the insertion loss of note nth bar transmission line is Sn；
S3：Calculated using equation below per FnLength transmission line go it is embedding after insertion loss S/Fn：S/Fn=Sn-(Sn+1-
Sn-1), and record each S/FnValue；
S4：Change the frequency of the signal on transmission line, return to step S2, until traveling through all frequencies, preserve all frequencies
Whole S/F of the lower record of pointnValue as test empirical value, flow terminates.
Especially：
When detecting the PCB of actual design, using the test empirical value as comparison object value, described in detection
Whether the insertion loss of corresponding length transmission line meets the requirements in the PCB of actual design, and then determines described actually to set
The quality of the PCB of meter.
A kind of needle device, including：
Sound end and fixing end；
Wherein fixing end includes,
For the Part I being fixed to by screw or buckle on the automatic arm of robot,
For fixing the Part II of sound end,
And spring assembly, for connecting the Part I and Part II.
Especially：
The sound end has differential probe or Single probe, and the probe has GND ends pin.
Especially：
The probe is half firm radio frequency coaxial cables, and one end is SMA interfaces, and test equipment, one end are connected to by cable
For the stripping core of cable.
The beneficial effects of the invention are as follows：It is easy-to-use to test probe, precision is high, and cost is low, easy care；Algorithm correction is concise to be had
Effect, precision are high；Full-automatic loss test design method and post processing data analysis all combine specific test status, and nobody can be achieved
It is on duty, it is full-automatic, human cost is saved, improves product reliability.
Brief description of the drawings
Fig. 1 is embedding principle explanatory diagram
Fig. 2 is proposed by the present invention to remove measurement jig wiring diagram used in embedding method
Fig. 3 is full-automatic PCB transmission line insertion loss method of testing flows proposed by the present invention
Fig. 4 is test result normal distribution
Fig. 5 is detection device figure proposed by the present invention
Fig. 6 is detection device fixed part structure chart proposed by the present invention
Embodiment
The present invention is described in detail below in conjunction with the accompanying drawings.
Embodiment one：Go embedding method
The PCB layout test board involved by the present embodiment proposition technical scheme is made, measurement jig is called in the following text in the present invention.
In measurement jig (test board) design that the present embodiment proposes, in order to match probe unit, devise corresponding test and visit point.Ginseng
See accompanying drawing 2, carry out wires design with Fibonacci sequence (Fibonacci Sequence), separately design different length
PCB transmission lines.
Transmission line design is different except length, and remaining needs identical attribute (place layer, cross-sectional area etc.).For how to select
Two pairs of specific length of differential lines are selected, so as to ensure the precision of embedding algorithm, method is as follows:
By substantial amounts of test and validation data accumulation and contrast, expect accurate test data, long transmission line with it is short
The difference of the length of transmission line should meet Fibonacci sequence, also known as Fibonacci sequence, and it refers to such a ordered series of numbers：0、
1st, 1,2,3,5,8,13,21 ... mathematically, fibonacci series in recursive method to be defined as follows：F0=0, F1
=1, Fn=Fn-1+Fn-2 (n>=2, n ∈ N*), for word, be exactly Fibonacci sequence by 0 and 1, afterwards striking
Fibonacci ordered series of numbers coefficient is added by two numbers before.We set is equal to 3inchs compared with short transmission line length minimum length, and compared with
Long length of transmission line needs to be equal to 8inchs, that is, following formula be present：
Length B=Fn-1；LengthA=Fn+1；
Length A-length B=Fn wherein (n>=5)；
Meet that above formula can obtain High Accuracy Parameter, from Practical Project n=5 when, from cost and design
It is then optimal that angle, which considers,.The signal that the present embodiment provides is also based on n=5 ordered series of numbers arrangement.It is of course possible to according to reality
Engineering is different, adjusts above parameter, but can have precision problem, can particular problem concrete analysis.
SDD21 parameters are tested by test device, are designated as SDD21a, SDD21b, SDD21c respectively, (hereinafter simply referred to as Sa,
Sb, Sc).Wherein a is longer transmission line Insertion Loss, and b is the transmission line Insertion Loss to take second place, and c is most short transmission line Insertion Loss, such as Fig. 2.Its
Middle SDD21 parameter represents the S parameter insertion loss of a pair of ports of difference transmission lines 2 and 1, and unit is decibel DB, and it defines shape
Formula is taken at the basic definition to S parameter, repeats no more herein.Here for more simple and clear description algorithm structure, according to striking
We set Fibonacci ordered series of numbers, Length C=3inchs, then Length B=5inchs, Length A=8inchs,
Length D=13inchs.
The insertion loss parameter of same frequency is chosen respectively.By unit decibel DB definition we can obtain.
Wherein according to our actual engineering design p1=p3, that is, obtain：
Following several groups of data are then obtained according to above formula, Insertion Loss below is that difference is lost according to power transmission above
Correspond to what is obtained.
Db/2inchs=Sb-Sc；
Db/3inchs=Sa-Sb；
Db/5inchs=Sa-Sc；
Db (fixture)=Sb- (Sa-Sc)；
What wherein last Db (fixture) was obtained is a cancellation the 5 inchages transmission that foregoing FA21 and FB21 influence
The Insertion Loss value of line.
By data above, we can obtain the S Insertion Loss detail parameters of measurement jig and transmission line per Inch.It is follow-up other
Veneer can only survey a, to increase testing efficiency.
Above-mentioned method of testing is repeated in different frequencies, the S Insertion Loss detail parameters under each frequency can be obtained.
The present embodiment optimizes improvement on the basis of current De- embedding, and it is not required to establish connection DUT (Device Under
Test) the equivalent-circuit model of input and output feeder, does not require the symmetrical of incoming feeder and output feeder, it is not required that complete yet
Into S-Y-Z matrix conversions.The present embodiment is the demand for paying close attention to special frequency, avoids the influence that probe unit is coarse, only
To the insertion loss parameter of the corresponding frequency of transmission line.This method simply can use, and have good precision, and suitable for high-volume
Test request.
Referring to accompanying drawing 3, it illustrates the Target Board quality automated testing method flow that the present embodiment proposes.
In product design or process segment, the measurement jig (test board) of design is included in the design, and exported corresponding
Design coordinate file, according to this design coordinate file design automatic engineering programming file, this project file be mechanical arm from
The foundation of dynamic addressing.The method for designing automatic engineering programming file is more commonly used in current engineering design, and is not belonging to
Present invention, repeat no more.Flow is described as follows：
Cable calibrations are carried out before testing test board, survey is included in the corresponding VNA test equipments of this calibration method
Try calibrating device.
After completing calibration, it is addressed and tests according to engineering formula automatic mechanical arm, test script will records corresponding
The test loss of frequency.
Calculating analysis is carried out to test result, and is judged according to the reference value provided, this reference value is basis
Per inch differential loss under the foregoing each specific frequency for going embedding method to obtain.
Referring to accompanying drawing 4, generation normal distribution report supplies manual analysis, and the normal distribution is reported for decision-making, from just dividing very much
Cloth sees the uniformity of this lots processed, and sigma value is smaller to represent that uniformity is better.Automatic testing process terminates.
For DB/Inch test results, it is compared according to the reference value that we define, obtains PASS/FAIL conclusion.
Mathematical statistics is carried out to result, and carries out normal distribution analysis, desired value μ determines its position, and standard deviation sigma determines the width of distribution
Degree, confirm the overall performance of high-volume batch by analyzing the two data, and test FAIL boards are scrapped, FAIL
Criterion be by depending on the target Target values that provide；The entirety of PCB material and PCB factories can also be extracted with this data
Processing characteristics, this value can determine by the way that signal integrity is active with non-source test.So as to improve design processing yield, ensure
Electric function is realized.
Embodiment two：Probe unit
Fig. 5 shows the probe unit that the present embodiment proposes.The probe unit (cable stent pens) includes two portions
Point:Sound end and fixing end.Wherein sound end includes difference (differential probe tip) specification and single-ended
(single-ended probe tip) specification.The probe of both specifications includes GND ends pin, for connection PCB GND and
Test equipment GND.Signal probe is made up of half firm radio frequency coaxial cables, can also be replaced by similar material, and one end is SMA interfaces,
Test equipment is connected to by cable cables；One end is designed for the stripping core of cable, due to being that semi-rigid material stripping core designs, institute
To hold pin pin adjustable intervals, to tackle different test points.
Referring to Fig. 6, it illustrates the fixing end of probe unit to be divided into three parts, and part1 can pass through screw or buckle
Or other modes are fixed on automatic arm, part3 can utilize protruding canine teeth design and corresponding screw fit fixes probe portion, the
Two parts are spring assembly, for connecting Part I and Part III, to the stress between buffered probe and PCB, increase
Test point contact stabilization, so as to ensure the uniformity and reliability of test.
Fix Cable probes using the probe unit of this patent, by the coordinate file that is exported by patent test board and
Corresponding fixed jig, the variable factor in engineering test can be reduced.According to the coordinate file of test board automate soft
Part script design, automatic mechanical arm can carry out the loss test based on fc-specific test FC plate according to the information of offer, and lead to
Cross and design specific test board, to reduce the complexity for automatic mechanical arm, need motor number so as to reduce arm
Amount, optimal inspection cost.It is a medium for realizing patented method of the present invention to automate arm, can be determined by third party factory
System is completed, and is not belonging to the protection domain of this patent, and here is omitted.Test board can depend on motherboard design in design,
The design of impedance strip on similar engineering, operability is provided for systematization high-volume test loss, designs cost free scheme.
Claims (2)
- A kind of 1. PCB transmission line insertion loss method of testing, it is characterised in that including：S1：PCB test boards are made, the length per transmission lines meets thereon：Fn+1=Fn+Fn-1, wherein FnFor the length of nth bar transmission line, n>2, and n is positive integer；S2：When transmitting the signal of a certain frequency on the transmission line, the insertion of each transmission lines is measured using probe unit Loss, the insertion loss of note nth bar transmission line is Sn；S3：Calculated using equation below per FnLength transmission line go it is embedding after insertion loss S/Fn：S/Fn=Sn-(Sn+1-Sn-1), and record each S/FnValue；S4：Change the frequency of the signal on transmission line, return to step S2, until traveling through all frequencies, preserve under all frequencies Whole S/F of recordnValue as test empirical value, flow terminates.
- 2. the method as described in claim 1, it is characterised in that：When detecting the PCB of actual design, using the test empirical value as comparison object value, the reality is detected Whether the insertion loss of corresponding length transmission line meets the requirements in the PCB of design, and then determines the actual design The quality of PCB.
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| CN106680592A (en) * | 2017-02-25 | 2017-05-17 | 郑州云海信息技术有限公司 | Method and system for detecting loss of Cable with arbitrary lengths |
| CN108254625A (en) * | 2017-12-29 | 2018-07-06 | 生益电子股份有限公司 | A kind of insertion loss test-strips |
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| CN110531167A (en) * | 2019-09-16 | 2019-12-03 | 西安兆格电子信息技术有限公司 | A kind of cable pathways Insertion Loss measuring device and measurement method |
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| CN113900008A (en) * | 2021-09-15 | 2022-01-07 | 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） | Test structure and test method |
| CN114252703B (en) * | 2021-11-19 | 2024-01-12 | 苏州浪潮智能科技有限公司 | Method, device and system for removing far-end crosstalk influence of transmission line on jig board |
| CN115469641B (en) * | 2022-09-14 | 2024-05-24 | 上海千顾汽车科技有限公司 | Fault detection mechanism and method combining production mode and automobile controller state machine |
| CN116401859A (en) * | 2023-03-31 | 2023-07-07 | 安捷利（番禺）电子实业有限公司 | Insertion loss calculation model construction method, device, equipment and storage medium |
| CN117590123A (en) * | 2023-11-22 | 2024-02-23 | 中科可控信息产业有限公司 | Cable testing method, device, equipment and medium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103995185A (en) * | 2014-06-13 | 2014-08-20 | 浪潮电子信息产业股份有限公司 | Method for carrying out insertion loss test through simple probe |
| CN104020379A (en) * | 2014-06-17 | 2014-09-03 | 浪潮电子信息产业股份有限公司 | Simple low-cost test method |
| CN203949936U (en) * | 2014-06-27 | 2014-11-19 | 北大方正集团有限公司 | The fixture of SET2DIL test probe and SET2DIL test probe assembly |
| CN203949946U (en) * | 2014-06-27 | 2014-11-19 | 北大方正集团有限公司 | Probe for the test of PCB Insertion Loss |
-
2015
- 2015-01-05 CN CN201510002693.2A patent/CN104569611B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103995185A (en) * | 2014-06-13 | 2014-08-20 | 浪潮电子信息产业股份有限公司 | Method for carrying out insertion loss test through simple probe |
| CN104020379A (en) * | 2014-06-17 | 2014-09-03 | 浪潮电子信息产业股份有限公司 | Simple low-cost test method |
| CN203949936U (en) * | 2014-06-27 | 2014-11-19 | 北大方正集团有限公司 | The fixture of SET2DIL test probe and SET2DIL test probe assembly |
| CN203949946U (en) * | 2014-06-27 | 2014-11-19 | 北大方正集团有限公司 | Probe for the test of PCB Insertion Loss |
Non-Patent Citations (2)
| Title |
|---|
| PCB信号完整性测试技术研究;刘丰 等;《印制电路信息》;20140131(第1期);第30-34、37页 * |
| 浅谈印制电路板信号损耗测试技术;葛鹰 等;《印制电路信息》;20131130(第11期);第28-30,63页 * |
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