CN103617991A - Semiconductor encapsulation electromagnetic shielding structure and manufacturing method - Google Patents
Semiconductor encapsulation electromagnetic shielding structure and manufacturing method Download PDFInfo
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- CN103617991A CN103617991A CN201310587159.3A CN201310587159A CN103617991A CN 103617991 A CN103617991 A CN 103617991A CN 201310587159 A CN201310587159 A CN 201310587159A CN 103617991 A CN103617991 A CN 103617991A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
The invention provides a semiconductor encapsulation electromagnetic shielding structure which comprises an organic substrate. The organic substrate is provided with two opposite conductor faces, and the part, between the two conductor faces, of the organic substrate is internally provided with at least one metal shielding layer. A chip is attached to one conductor face of the organic substrate, and connecting protruding points of the chip are connected with the conductor face. An electromagnetic shielding cover is fixed on the conductor face to which the chip is attached and covers the chip completely inside the electromagnetic shielding cover. The bottom of the side wall of the electromagnetic shielding cover is electrically connected with the metal shielding layer and the other conductor face of the organic substrate through an electric flux hole penetrating through the organic substrate. The connecting protruding points, related to a signal and a power source, of the chip are electrically connected with the other conductor face of the organic substrate through a signal and a power source channel which penetrates through the organic substrate and is insulated from the metal shielding layer. According to the semiconductor encapsulation electromagnetic shielding structure, both faces of the chip can be provided with electromagnetic shielding structure bodies, a better electromagnetic shielding effect can be obtained, and the advantage in cost is obvious when the semiconductor encapsulation electromagnetic shielding structure is manufactured on a large scale.
Description
Technical field
The present invention relates to a kind of encapsulating structure, especially a kind of semiconductor packages electromagnetic armouring structure.
Background technology
Along with the trend of electronic product multifunction and miniaturization, high density microelectronic mounting technology becomes gradually main flow on electronic product of new generation, especially on handhold portable formula product, is widely applied at present.Suddenly the raising of micro-packaging density and integrated level, for having higher requirement to carrying out electromagnetic shielding compared with the device of strong electromagnetic radiation in the confined space, technology difficulty increases.
Fig. 1 is existing a kind of electromagnetic shielding solution, is mainly an electro-magnetic shielding cover is set on semiconductor package, for shielding the electromagnetic interference of chip chamber.But do not consider the problem that electromagnetic radiation is revealed from device bottom.Radome 101 has been considered interfering with each other between shielding chip 108 and 112, but does not consider that chip 112 is from the processing of bottom compromising emanation.
Summary of the invention
The object of the present invention is to provide a kind of semiconductor packages electromagnetic armouring structure and manufacture method, in the organic substrate of carries chips, be provided with screen, screen is electrically connected to electro-magnetic shielding cover, can all form electromagnetic armouring structure on the two sides of chip, obtains better effectiveness.The technical solution used in the present invention is:
A semiconductor packages electromagnetic armouring structure, comprises an organic substrate, and described organic substrate has two relative conductor surfaces, is provided with at least one deck metal screen layer in the organic substrate between two conductor surfaces; Chip attachment is on a conductor surface of organic substrate, and the connecting salient points of chip is connected with this conductor surface;
Electro-magnetic shielding cover is fixed on the conductor surface that is pasted with chip, and chip is covered within it completely; The sidewall bottom of electro-magnetic shielding cover is electrically connected to by connecting the electric through-hole of organic substrate and another conductor surface of metal screen layer and organic substrate;
The connecting salient points relevant to signal and power supply of chip is by connecting organic substrate and being electrically connected to another conductor surface of organic substrate with power channel with the signal of metal screen layer insulation;
On another conductor surface of organic substrate, be implanted with soldered ball, the ground connection soldered ball in soldered ball is electrically connected to electric through-hole, and signal is electrically connected to signal and power channel with power supply soldered ball.
Further, the bottom of described chip is filled out at the bottom of being filled with chip.
Further, described metal screen layer is for covering copper layer.
A manufacture method for semiconductor packages electromagnetic armouring structure, comprises the steps:
On organic substrate, open the electric through-hole that connects two conductor surfaces of organic substrate, make electric through-hole be electrically connected to two conductor surfaces and metal screen layer;
On organic substrate, open the signal and the power channel that connect two conductor surfaces of organic substrate, make signal be electrically connected to two conductor surfaces with power channel, and make signal and power channel and metal screen layer insulation;
Electric through-hole is located at the periphery of signal and power channel.
Further, in described step 2, chip can be mounted on organic substrate by flip chip bonding mode, and is positioned at signal and power channel top.
Further, in described step 2, after chip attachment, be also included in chip bottom and fill the step of filling out at the bottom of chip.
The present invention has following advantage:
1. by screen is set in organic substrate, can solve the problem that electromagnetic radiation is revealed or entered from encapsulating structure bottom.
2. in organic substrate, the cost compare of default metal screen layer is low, supplier place at organic substrate can relatively easily make, therefore overall cost compare of the present invention is low, particularly when the chip of same model carries out electromagnetic shielding encapsulation in enormous quantities, owing to only needing coupling to make a kind of electro-magnetic shielding cover of model, the cost advantage of this programme will be more obvious.
Accompanying drawing explanation
Fig. 1 is a kind of electromagnetic armouring structure of the prior art.
Fig. 2 is organic substrate schematic diagram of the present invention.
Fig. 3 is chip attachment schematic diagram of the present invention.
Fig. 4 is the electro-magnetic shielding cover schematic diagram that is adhesively fixed of the present invention.
Fig. 5 is for being the ball schematic diagram of planting of the present invention.
Embodiment
Below in conjunction with concrete drawings and Examples, the invention will be further described.
As shown in Figure 5:
A kind of semiconductor packages electromagnetic armouring structure proposed by the invention, comprises an organic substrate 1, and described organic substrate 1 has two relative conductor surfaces, is provided with at least one deck metal screen layer 2 in the organic substrate 1 between two conductor surfaces; Wherein conductor surface refers to that the surface of organic substrate 1 is provided with wiring layer, and the surface that does not refer to organic substrate 1 is one deck conductor layer completely.
Electro-magnetic shielding cover 5 is fixed on the conductor surface that is pasted with chip 3, and chip 3 is covered within it completely; Sidewall 51 bottoms of electro-magnetic shielding cover 5 are electrically connected to another conductor surface of metal screen layer 2 and organic substrate 1 by connecting the electric through-hole 6 of organic substrate 1;
The connecting salient points 31 relevant to signal and power supply of chip 3 is by connecting organic substrate 1 and being electrically connected to another conductor surface of organic substrate 1 with power channel 7 with the signal of metal screen layer 2 insulation;
On another conductor surface of organic substrate 1, be implanted with soldered ball 9, the ground connection soldered ball 91 in soldered ball 9 is electrically connected to electric through-hole 6, and signal is electrically connected to signal and power channel 7 with power supply soldered ball 92.
Semiconductor packages electromagnetic armouring structure proposed by the invention can adopt following method to make, and comprises step:
On organic substrate 1, open the electric through-hole 6 that connects 1 two conductor surfaces of organic substrate, in electric through-hole 6, be filled with conducting metal to be electrically connected to two conductor surfaces, make electric through-hole 6 connection metal screens 2;
On organic substrate 1, open the signal and the power channel 7 that connect 1 two conductor surfaces of organic substrate, signal with in power channel 7, be filled with conducting metal to be electrically connected to two conductor surfaces, and signal and power channel 7 and metal screen layer 2 are insulated;
Electric through-hole 6 is located at the periphery of signal and power channel 7;
At the bottom of filling chip, chip 3 bottoms fill out 4;
Electro-magnetic shielding cover 5 can adopt metal cap, also can adopt nonmetallic electro-magnetic shielding cover, and its shape and size designing becomes to match with the distributing position of chip 3 and electric through-hole 6.Owing to being provided with metal screen layer 2 in organic substrate 1, at electro-magnetic shielding cover 5, by electric through-hole 6, be electrically connected to after metal screen layer 2, just can all form electromagnetic armouring structure on the two sides of chip 3.And from the side of chip 3, after all seldom, so this kind of semiconductor packages electromagnetic armouring structure has good effectiveness to the electromagnetic interference signal of revealing or entering from the gap between electric through-hole 6.
Plant after ball step finishes, finally just formed signal circuit and electromagnetic shielding loop.
Claims (6)
1. a semiconductor packages electromagnetic armouring structure, it is characterized in that: comprise an organic substrate (1), described organic substrate (1) has two relative conductor surfaces, is provided with at least one deck metal screen layer (2) in the organic substrate (1) between two conductor surfaces;
Chip (3) is mounted on a conductor surface of organic substrate (1), and the connecting salient points (31) of chip (3) is connected with this conductor surface;
Electro-magnetic shielding cover (5) is fixed on the conductor surface that is pasted with chip (3), and chip (3) is covered within it completely; Sidewall (51) bottom of electro-magnetic shielding cover (5) is electrically connected to another conductor surface of metal screen layer (2) and organic substrate (1) by connecting the electric through-hole (6) of organic substrate (1);
The connecting salient points (31) relevant to signal and power supply of chip (3) is by connecting organic substrate (1) and being electrically connected to another conductor surface of organic substrate (1) with power channel (7) with the signal of metal screen layer (2) insulation;
On another conductor surface of organic substrate (1), be implanted with soldered ball (9), the ground connection soldered ball (91) in soldered ball (9) is electrically connected to electric through-hole (6), and signal is electrically connected to signal and power channel (7) with power supply soldered ball (92).
2. semiconductor packages electromagnetic armouring structure as claimed in claim 1, is characterized in that: at the bottom of the bottom of described chip (3) is filled with chip, fill out (4).
3. semiconductor packages electromagnetic armouring structure as claimed in claim 1 or 2, is characterized in that: described metal screen layer (2) is for covering copper layer.
4. a manufacture method for semiconductor packages electromagnetic armouring structure, is characterized in that, comprises the steps:
Step 1. organic substrate (1) is provided, and this organic substrate (1) has two relative conductor surfaces, presets layer of metal screen (2) in organic substrate (1);
On organic substrate (1), open the electric through-hole (6) that connects (1) two conductor surface of organic substrate, make electric through-hole (6) be electrically connected to two conductor surfaces and metal screen layer (2);
On organic substrate (1), open the signal and the power channel (7) that connect (1) two conductor surface of organic substrate, make signal be electrically connected to two conductor surfaces with power channel (7), and make signal and power channel (7) and metal screen layer (2) insulation;
Electric through-hole (6) is located at the periphery of signal and power channel (7);
Step 2. chip (3) is mounted on a conductor surface of organic substrate (1), the connecting salient points (31) of chip (3) is connected with this conductor surface, and the connecting salient points relevant with power supply to signal (31) is connected with one end of power channel (7) with signal;
Step 3. electro-magnetic shielding cover (5) is fixed on the conductor surface that is pasted with chip (3), electro-magnetic shielding cover (5) is covered chip (3) within it completely; And sidewall (51) bottom of electro-magnetic shielding cover (5) is connected with one end of electric through-hole (6);
Step 4. on another conductor surface of organic substrate (1), plant soldered ball (9), the other end that makes ground connection soldered ball (91) the connection electric through-hole (6) in soldered ball (9), signal is connected the other end of signal and power channel (7) with power supply soldered ball (92).
5. the manufacture method of semiconductor packages electromagnetic armouring structure as claimed in claim 4, it is characterized in that: in described step 2, it is upper that chip (3) is mounted on organic substrate (1) by flip chip bonding mode, and be positioned at signal and power channel (7) top.
6. the manufacture method of semiconductor packages electromagnetic armouring structure as claimed in claim 4, is characterized in that: in described step 2, after chip (3) mounts, be also included in chip (3) bottom and fill the step of filling out (4) at the bottom of chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310587159.3A CN103617991A (en) | 2013-11-20 | 2013-11-20 | Semiconductor encapsulation electromagnetic shielding structure and manufacturing method |
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| CN201310587159.3A CN103617991A (en) | 2013-11-20 | 2013-11-20 | Semiconductor encapsulation electromagnetic shielding structure and manufacturing method |
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| CN103617991A true CN103617991A (en) | 2014-03-05 |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105140138A (en) * | 2015-09-16 | 2015-12-09 | 江苏长电科技股份有限公司 | Electromagnetic shielding encapsulation method and encapsulation structure |
| CN106206527A (en) * | 2015-05-25 | 2016-12-07 | 华亚科技股份有限公司 | Semiconductor subassembly and manufacture method thereof |
| CN109100398A (en) * | 2018-07-23 | 2018-12-28 | 华进半导体封装先导技术研发中心有限公司 | A kind of Alcohol mental disorders system packaging structure and its manufacturing method |
| CN111128968A (en) * | 2020-01-08 | 2020-05-08 | 青岛歌尔智能传感器有限公司 | Chip packaging structure |
| CN111564436A (en) * | 2020-05-25 | 2020-08-21 | 甬矽电子(宁波)股份有限公司 | Fan-out type packaging structure and packaging method |
| CN111599799A (en) * | 2016-07-12 | 2020-08-28 | 联发科技股份有限公司 | Integrated circuit with a plurality of transistors |
| CN111755350A (en) * | 2020-05-26 | 2020-10-09 | 甬矽电子(宁波)股份有限公司 | Packaging structure manufacturing method and packaging structure |
| CN118335723A (en) * | 2024-06-13 | 2024-07-12 | 成都嘉纳海威科技有限责任公司 | Packaging structure with high electromagnetic isolation and manufacturing method |
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| CN102176438A (en) * | 2010-10-11 | 2011-09-07 | 日月光半导体制造股份有限公司 | Double-side packaging structure and wireless communication system applying the structure |
| CN102779811A (en) * | 2012-07-20 | 2012-11-14 | 华为技术有限公司 | Chip package and chip packaging method |
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| CN1539167A (en) * | 2001-08-01 | 2004-10-20 | �Ҵ���˾ | EMI shielding for electronic packages |
| CN102054821A (en) * | 2009-10-30 | 2011-05-11 | 日月光半导体制造股份有限公司 | Packaging structure with internal shield and manufacturing method thereof |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206527A (en) * | 2015-05-25 | 2016-12-07 | 华亚科技股份有限公司 | Semiconductor subassembly and manufacture method thereof |
| CN106206527B (en) * | 2015-05-25 | 2019-08-13 | 美光科技公司 | Semiconductor subassembly and its manufacturing method |
| CN105140138A (en) * | 2015-09-16 | 2015-12-09 | 江苏长电科技股份有限公司 | Electromagnetic shielding encapsulation method and encapsulation structure |
| CN105140138B (en) * | 2015-09-16 | 2017-10-27 | 江苏长电科技股份有限公司 | One kind electromagnetic shielding method for packing and its encapsulating structure |
| CN111599799A (en) * | 2016-07-12 | 2020-08-28 | 联发科技股份有限公司 | Integrated circuit with a plurality of transistors |
| CN111599799B (en) * | 2016-07-12 | 2023-05-30 | 联发科技股份有限公司 | Integrated circuit |
| CN109100398A (en) * | 2018-07-23 | 2018-12-28 | 华进半导体封装先导技术研发中心有限公司 | A kind of Alcohol mental disorders system packaging structure and its manufacturing method |
| CN111128968A (en) * | 2020-01-08 | 2020-05-08 | 青岛歌尔智能传感器有限公司 | Chip packaging structure |
| CN111564436A (en) * | 2020-05-25 | 2020-08-21 | 甬矽电子(宁波)股份有限公司 | Fan-out type packaging structure and packaging method |
| CN111755350A (en) * | 2020-05-26 | 2020-10-09 | 甬矽电子(宁波)股份有限公司 | Packaging structure manufacturing method and packaging structure |
| CN118335723A (en) * | 2024-06-13 | 2024-07-12 | 成都嘉纳海威科技有限责任公司 | Packaging structure with high electromagnetic isolation and manufacturing method |
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Application publication date: 20140305 |