CN102624267B - Inverter and application circuit in three-phase system - Google Patents
Inverter and application circuit in three-phase system Download PDFInfo
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- CN102624267B CN102624267B CN201210083617.5A CN201210083617A CN102624267B CN 102624267 B CN102624267 B CN 102624267B CN 201210083617 A CN201210083617 A CN 201210083617A CN 102624267 B CN102624267 B CN 102624267B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/5388—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with asymmetrical configuration of switches
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
- H02M1/007—Plural converter units in cascade
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
- H02M1/123—Suppression of common mode voltage or current
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- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The embodiment of the invention discloses an inverter. The collector of a power switching tube T1 is connected to the positive output terminal of a DC power supply; the emitter of the T1 and the collector of a power switching tube T2 are connected to one input terminal of an H bridge circuit, the other input terminal of the H bridge circuit is connected with the negative output terminal of the DC power supply, and the two output terminals of the H bridge circuit are respectively connected to a power grid; each power switching tube is inversely connected in parallel with a diode; a DC/DC converter is connected with two ends of the DC power supply; a capacitor C2 is connected between the positive and the negative output terminals of the DC power supply; a capacitor C1 is connected between the positive output terminal of the DC/DC converter and the negative output terminal of the DC power supply; the T2 is connected with the emitter of a power switching tube T7; and the collector of the T7 is connected with the positive output terminal of the DC/DC converter. The embodiment of the invention also discloses a dual topology of the inverter and other two inverters developed from the dual topology, and provides an application circuit of the four inverters, which is in the three-phase system. The embodiment of the invention has the advantages that high efficiency of the inverters are ensured, current leakage is reduced, and the problem of midpoint balance control to multiple levels is avoided.
Description
Technical field
The embodiment of the present invention relates to inverter and application circuit thereof, specifically transless type photovoltaic combining inverter and the application circuit in three-phase system thereof.
Background technology
Can be divided into from net type inverter and grid type inverter according to the difference of inverter applications occasion and control mode, in grid type inverter, whether basis can be divided into again transformer isolation type inverter and inverter without transformer with transformer.The plurality of advantages such as inverter without transformer is because system configuration is simple, and efficiency is high, and volume is little, and cost is low, have obtained development fast.Become the main flow of photovoltaic middle low power.
Existing conventional inverter without transformer is H4 topology, the H bridge circuit namely being formed by 4 switching devices, as shown in Figure 1, this photovoltaic DC-to-AC converter uses switching device 46, 48, 50, 52 composition H bridge circuits 24, the DC voltage of the variation of PV array 12 is converted into the fixed frequency AC voltage that electrical network 14 needs, and with DC link 16 the stored energy level in the middle of realizing, concrete, first inverter is transformed to the DC voltage of unsettled PV array 12 18 the stable DC voltage 20 that is greater than line voltage via booster converter, subsequently by stable DC voltage 20 via H bridge circuit 24 be transformed to can by grid-connected enter electric current 22 in electrical network 14, switching device 46, 48, 50, 52 carry out switch motion under high frequency.Booster converter is made up of inductance, diode and a switching device 44.
But inverter without transformer is due to the electrical isolation that can not realize between direct current input source and AC load, and leakage problem is one of key index of its reliability.Leakage current is to be caused by the common mode disturbances being present on grid side zero line and live wire simultaneously, in theory, in the time that common-mode voltage is a constant, can eliminate common mode current.
When traditional H4 topology adopts bipolarity modulation, common-mode voltage can be always a constant, can well suppress leakage current, still, while adopting bipolarity modulation, when each change of current, all can have two groups of switching devices to participate in the change of current, switching loss increases, in addition, in the time of zero crossing, there is larger ripple in power network current, if ensure higher output current quality, must add large filter inductance, this makes the Efficiency Decreasing of inverter.For obtaining higher efficiency, often adopt unipolarity modulation strategy, although and unipolarity has overcome the shortcoming that switching loss is large and output waveform is poor, be in operation, can there is the common-mode voltage changing with switching frequency, cause leakage current.Therefore, traditional H4 topology can not have been taken into account two problems of leakage current and high efficiency simultaneously.
For eliminating the high frequency common mode voltage of Unipolar SPWM modulation generation, must make the clamped half at DC power supply voltage of continuous current circuit in afterflow stage, reach the object of eliminating common-mode voltage.
Many level are having larger advantage also to obtain larger concern with respect to two level aspect efficiency, in non-isolation type inverter, apply three Level Technology, leakage problem is a urgent problem, existing patent EP2053732A2 has realized the output of five level, as shown in Figure 2, for the disclosed a kind of topological structure of patent EP2053732A2, but such topology is not owing to there is no the intermediate level idle circulation path in when work, and current over-zero place produces larger common-mode voltage.And being that Limited Current is single-phase flows, multiplex two diode component D11, D12.
Chinese patent application CN101814856A discloses a kind of non-isolated grid-connected inverter and switch control time sequence thereof, as shown in Figure 3, comprises dividing potential drop capacitive branch 1, reed position branch road 2 and full-bridge elementary cell 3; Dividing potential drop capacitive branch 1 comprises capacitor C dc1, capacitor C dc2; Reed position branch road 2 comprises switching tube S1, switching tube S2; Full-bridge elementary cell 3 comprises switching tube S3, switching tube S4, switching tube S5, switching tube S6, it adds two controlled tr tube S1, S2 and dividing potential drop capacitor C dc1, Cdc2 to form two-way reed position branch road on the basis of full-bridge circuit, and while coordinating switching sequence can realize the afterflow stage continuous current circuit current potential in 1/2nd cell voltage, thereby eliminate the leakage current of non-isolated grid-connected inverter; And ensured power delivery stage output current 3 switching tubes of only flowing through, effectively reduce conduction loss.This inverter reality is still operated in three level, and if ensure to reach the continuous current circuit current potential described in patent in 1/2nd cell voltage, midpoint potential between two electric capacity must ensure to be 1/2nd cell voltage, it is difficult that this neutral balance is controlled in practical operation, need to be by complicated control method.
To sum up, for ensureing that high efficiency adopts five level outputs, ensureing high efficiency simultaneously and reducing leakage current is a urgent problem.
Summary of the invention
The technical problem that the embodiment of the present invention will solve is to provide four kinds of new single-phase five level topology inverters, reduce leakage current and ensure the high efficiency object of inverter simultaneously to reach, the embodiment of the present invention also provides the application circuit of inverter in three-phase system simultaneously.
The embodiment of the present invention one of solves the problems of the technologies described above by the following technical solutions: a kind of inverter, comprises capacitor C 1, C2, the power switch pipe T1 of three series windings, T2, T7, H bridge circuit, DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, this tie point is connected to the first input end of H bridge circuit, and described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, be connected to the negative output terminal of DC power supply, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, the upper diode D1 of inverse parallel respectively of T7, D2, D3, D4, D5, D6, D7, the input of described DC/DC converter and earth terminal are connected to the two ends of DC power supply, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, be connected described capacitor C 1, the emitter of power switch pipe T2 is connected to the positive output end of DC/DC converter.
The embodiment of the present invention is further specially:
Described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6, T7 conducting, all the other cut-offs;
Mode H2: switch transistor T 2, T3, T6, T7 conducting, all the other cut-offs, current direction is contrary with mode H1;
Mode H3: switch transistor T 2, T4, T5, T7 conducting, all the other cut-offs;
Mode H4: switch transistor T 2, T4, T5, T7 conducting, all the other cut-offs, current direction is contrary with mode H3;
Mode H5: switch transistor T 1, T3, T6 conducting, all the other cut-offs;
Mode H6: switch transistor T 1, T3, T6 conducting, all the other cut-offs, current direction is contrary with mode H5;
Mode H7: switch transistor T 1, T4, T5 conducting, all the other cut-offs;
Mode H8: switch transistor T 1, T4, T5 conducting, all the other cut-offs, current direction is contrary with mode H7;
Mode H9: switch transistor T 3, T5 conducting, all the other cut-offs;
Mode H10: switch transistor T 3, T5 conducting, all the other cut-offs, current direction is contrary with mode H9.
When DC power output voltage V2 is during higher than the minimum operating voltage Vm of inverter, the normal work of guarantee inverter, can be divided into two kinds of situation work according to DC power supply voltage: first, DC power output voltage is slightly higher than the minimum operating voltage of inverter, while making its work, obtain voltage V1 < Vm by the work of DC/DC converter, second: DC power output voltage is more more than the minimum operating voltage height of inverter, obtain voltage V1 by the work of DC/DC converter and meet V2 > V1 > Vm.
Further, wherein power switch pipe T1, T2, T3, T4, T5, T6, T7 and described seven diode D1, D2, D3, D4, D5, D6, D7 are encapsulated as a packaging, and wherein the collector electrode of power switch pipe T1 respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, the first output of H bridge circuit with the second output as the first level end of packaging, the second input of H bridge circuit as the second electrical level end of packaging, the collector electrode of power switch pipe T7.
Further, described power switch pipe T1, T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the collector electrode of second electrical level end, power switch pipe T1 as the emitter of the first level end, power switch pipe T2 as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the positive output end of DC/DC converter.
The course of work of described second and third power switch pipe unit is identical with the course of work of the first power switch pipe unit.
Described second and third power switch pipe unit all can make as the packaging of the first power switch pipe unit.
The embodiment of the present invention solve the problems of the technologies described above by the following technical solutions two: the inverter of a kind of and above-mentioned inverter dual topology be provided, comprised capacitor C 1, C2, the power switch pipe T1 of three series windings, T2, T7, H bridge circuit, DC/DC converter, described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, is connected to the positive output end of DC power supply, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, the upper diode D1 of inverse parallel respectively of T7, D2, D3, D4, D5, D6, D7, the input of described DC/DC converter and earth terminal are connected to the positive output end of DC power supply, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, be connected described capacitor C 1, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter, the emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply, the collector electrode of power switch pipe T7 is connected with the collector electrode of power switch pipe T1, the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the second input of H bridge circuit.
Further improvement as such scheme:
Described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6 conducting, all the other cut-offs;
Mode H2: switch transistor T 2, T3, T6 conducting, all the other cut-offs, current direction is contrary with mode H1;
Mode H3: switch transistor T 2, T4, T5 conducting, all the other cut-offs;
Mode H4: switch transistor T 2, T4, T5 conducting, all the other cut-offs, current direction is contrary with mode H3;
Mode H5: switch transistor T 1, T3, T6, T7 conducting, all the other cut-offs;
Mode H6: switch transistor T 1, T3, T6, T7 conducting, all the other cut-offs, current direction is contrary with mode H5;
Mode H7: switch transistor T 1, T4, T5, T7 conducting, all the other cut-offs;
Mode H8: switch transistor T 1, T4, T5, T7 conducting, all the other cut-offs, current direction is contrary with mode H7;
Mode H9: switch transistor T 4, T6 conducting, all the other cut-offs;
Mode H10: switch transistor T 4, T6 conducting, all the other cut-offs, current direction is contrary with mode H9.
DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, to meet the basic demand of inverter work, by the work of controlled hypotension type DC/DC converter, obtain the output voltage V 1 of DC/DC converter, specifically have two kinds of situations: (1) V2 > V1 > Vm, (2) V1 < Vm.
Further, wherein power switch pipe T1, T2, T3, T4, T5, T6, T7 and described seven diode D1, D2, D3, D4, D5, D6, D7 are encapsulated as a packaging, and wherein the first input end of H bridge circuit respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, the first output of H bridge circuit with the second output as the first level end of packaging, the emitter of power switch pipe T2 as the second electrical level end of packaging, the collector electrode of power switch pipe T1.
Further, described power switch pipe T1, T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the collector electrode of second electrical level end, power switch pipe T1 as the emitter of the first level end, power switch pipe T2 as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
First, second and third power switch pipe unit is connected in parallel between the positive-negative output end of DC power supply, wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the negative output terminal of DC/DC converter.
Described second and third power switch pipe unit all can make as the packaging of the first power switch pipe unit.
The embodiment of the present invention solve the problems of the technologies described above by the following technical solutions three: a kind of inverter, comprise capacitor C 1, C2, the power switch pipe T1 of two series windings, T7, diode D2, H bridge circuit, DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the negative electrode of diode D2, this tie point is connected to the first input end of H bridge circuit, and described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, be connected to the negative output terminal of DC power supply, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T3, T4, T5, T6, the upper diode D1 of inverse parallel respectively of T7, D3, D4, D5, D6, D7, the input of described DC/DC converter and earth terminal are connected to the two ends of DC power supply, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, be connected described capacitor C 1, the anode of diode D2 is connected with the emitter of power switch pipe T7, and the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter.
This embodiment is further specially:
Described inverter is operated in following mode:
Mode H1: switch transistor T 3, T6, T7 conducting, all the other cut-offs, electric current warp: DC+ → T7 → D2 → T3 → Vgrid → T6 → PV-;
Mode H3: switch transistor T 4, T5, T7 conducting, all the other cut-offs, electric current warp: DC+ → T7 → D2 → T5 → Vgrid → T4 → PV-;
Mode H5: switch transistor T 1, T3, T6 conducting, all the other cut-offs, electric current warp: PV+ → T1 → T3 → Vgrid → T6 → PV-;
Mode H6: switch transistor T 1, T3, T6 conducting, all the other cut-offs, electric current warp: PV-→ D6 → Vgrid → D3 → D1 → PV+;
Mode H7: switch transistor T 1, T4, T5 conducting, all the other cut-offs, electric current warp: PV+ → T1 → T5 → Vgrid → T4 → PV-;
Mode H8: switch transistor T 1, T4, T5 conducting, all the other cut-offs, electric current warp: PV-→ D4 → Vgrid → D5 → D1 → PV+;
Mode H9: switch transistor T 3, T5 conducting, all the other cut-offs, electric current warp: D5 → T3 → Vgrid → D5;
Mode H10: switch transistor T 3, T5 conducting, all the other cut-offs, electric current warp: D3 → T5 → Vgrid → D3;
In above-mentioned each mode, DC+ represents the positive output end of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
The inverter of this kind of structure has following two kinds of control strategies:
When DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter while making its work and meets V1 < Vm;
When DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter while making its work and meets V2 > V1 > Vm.
Described power switch pipe T1, T3, T4, T5, T6, T7 and six diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the collector electrode of power switch pipe T1 as the collector electrode of second electrical level end, power switch pipe T7 as the second input of the first level end, H bridge circuit as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the positive output end of DC/DC converter.
The embodiment of the present invention solve the problems of the technologies described above by the following technical solutions four: a kind of inverter, comprise capacitor C 1, C2, the power switch pipe T2 of two series windings, T7, diode D1, H bridge circuit, DC/DC converter, described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, is connected to the positive output end of DC power supply, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T2, T3, T4, T5, T6, the upper diode D2 of inverse parallel respectively of T7, D3, D4, D5, D6, D7, the input of described DC/DC converter is connected the positive output end of DC power supply with earth terminal, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, be connected described capacitor C 1, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter, the emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply, the collector electrode of power switch pipe T7 is connected with the negative electrode of diode D1, the anode of diode D1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the second input of H bridge circuit.
This embodiment is further specially:
Described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6 conducting, all the other cut-offs, electric current warp: PV+ → T3 → Vgrid → T6 → T2 → PV-;
Mode H2: switch transistor T 2, T3, T6 conducting, all the other cut-offs, electric current warp: PV-→ D2 → D6 → Vgrid → D3 → PV+;
Mode H3: switch transistor T 2, T4, T5 conducting, all the other cut-offs, electric current warp: PV+ → T5 → Vgrid → T4 → T2 → PV-;
Mode H4: switch transistor T 2, T4, T5 conducting, all the other cut-offs, electric current warp: PV-→ D2 → D4 → Vgrid → D5 → PV+;
Mode H5: switch transistor T 3, T6, T7 conducting, all the other cut-offs, electric current warp: PV+ → T3 → Vgrid → T6 → D1 → T7 → DC-;
Mode H7: switch transistor T 4, T5, T7 conducting, all the other cut-offs, electric current warp: PV+ → T5 → Vgrid → T4 → D1 → T7 → DC-;
Mode H9: switch transistor T 4, T6 conducting, all the other cut-offs, electric current warp: T6 → D4 → Vgrid → T6;
Mode H10: switch transistor T 4, T6 conducting, all the other cut-offs, electric current warp: T4 → D6 → Vgrid → T4;
In above-mentioned each mode, DC-represents the negative output terminal of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
The inverter of this kind of structure has following two kinds of control strategies:
When DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, when its work, obtaining voltage by the work of DC/DC converter is V1, V1 meets the following conditions: V1 < Vm;
When DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter when its work, and V1 meets the following conditions: V2 > V1 > Vm.
Described six power switch pipe T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the emitter of second electrical level end, power switch pipe T7 as the emitter of the first level end, power switch pipe T2 as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the negative output terminal of DC/DC converter.
The embodiment of the present invention solve the problems of the technologies described above by the following technical solutions five: the application circuit of a kind of above-mentioned inverter with three power switch pipe units in three-phase system, wherein the ac output end of each power switch pipe unit is connected respectively to the two ends of three former limit windings in three-phase system.
The advantage of the embodiment of the present invention is: four kinds of new single-phase five level topology inverters are provided, have obtained high efficiency inverter, and adopt specific modulation strategy to make common-mode voltage be approximately constant, to reach the object that reduces leakage current; Simultaneously for considering the wide region of direct voltage, prime adopts and goes out three level with the unit structure of step-down, utilize commutation circuit can construct five-electrical level inverter, because three level of DC side are not to be obtained by two capacitance partial pressures, so evaded the problem of the neutral balance control of many level capacitance voltage.
Brief description of the drawings
Fig. 1 is the structure chart of existing conventional H4 topological type structure inverter.
Fig. 2 is the disclosed a kind of inverter topology figure of patent EP2053732A2.
Fig. 3 is the disclosed a kind of inverter topology figure of Chinese patent application CN101814856A.
Fig. 4 is the constituted mode of first embodiment of the invention main circuit, and wherein T1, T2, T7 are positioned at the first input end of H bridge circuit.
Fig. 5 a to Figure 51 is 12 kinds of operation mode figure of main circuit in Fig. 4.
In Fig. 6 (a) and (b) be respectively bridge arm voltage and the common-mode voltage of wherein a kind of modulation strategy of the first embodiment.
In Fig. 7 (a) and (b) be respectively bridge arm voltage and the common-mode voltage of the another kind of modulation strategy of the first embodiment.
Fig. 8 is the main circuit diagram of a kind of concrete structure of the DC/DC converter using in the first embodiment.
Fig. 9 is the rear schematic diagram of power switch pipe encapsulation of first embodiment of the invention.
Figure 10 and Figure 11 are the two kind application circuit structures of first embodiment of the invention in three-phase system.
Figure 12 is the constituted mode of second embodiment of the invention main circuit, and wherein T1, T2, T7 are positioned at the second input of H bridge circuit.
In Figure 13 (a) and (b) be respectively bridge arm voltage and the common-mode voltage of wherein a kind of modulation strategy of the second embodiment.
In Figure 14 (a) and (b) be respectively bridge arm voltage and the common-mode voltage of the another kind of modulation strategy of the second embodiment.
Figure 15 is the main circuit diagram of a kind of concrete structure of DC/DC converter using in the inverter structure of the second embodiment.
Figure 16 is the rear schematic diagram of power switch pipe encapsulation of second embodiment of the invention.
Figure 17 and Figure 18 are the two kind application circuit structures of second embodiment of the invention in three-phase system.
Figure 19 is the constituted mode of third embodiment of the invention main circuit, is also the simplification circuit of the first embodiment.
Figure 20 a to Figure 20 h is 8 kinds of operation mode figure of main circuit in Figure 19.
Figure 21 is the constituted mode of fourth embodiment of the invention main circuit, is also the simplification circuit of the second embodiment.
Main designation in above-mentioned figure:
DC/DC:DC/DC converter C1, C2: electric capacity
T1, T2, T3, T4, T5, T6, T7: power switch pipe
D1, D2, D3, D4, D5, D6, D7: diode
L1, L2: inductance Vgrid: electrical network
PV+: the positive output end PV-of DC power supply: the negative output terminal of DC power supply
The negative output terminal of the positive output end DC-:DC/DC converter of DC+:DC/DC converter
V2: the voltage of the voltage V1:DC/DC converter output terminal at DC power supply two ends
Vab: brachium pontis output voltage, i.e. voltage between the first output a and the second output b of H bridge circuit
Embodiment
The first embodiment
Refer to Fig. 4, the embodiment of the present invention provides a kind of inverter, comprises DC/DC converter, capacitor C 1, C2, power switch pipe T1, the T2 of three series windings, T7, H bridge circuit.
The input of described DC/DC converter and earth terminal are connected to the two ends of DC power supply.
Between the positive-negative output end of DC power supply, connect described capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, be connected described capacitor C 1.
Power switch pipe T1, T2, T7 upper inverse parallel diode D1, D2, D7 respectively, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter, the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the first input end of H bridge circuit.
Described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, the collector electrode of power switch pipe T3, T5 is connected as the first input end of H bridge circuit, the emitter of power switch pipe T4, T6 is connected as the second input of H bridge circuit, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point a is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, and this tie point b is as the second output of H bridge circuit.The second input of H bridge circuit is connected to the negative output terminal of DC power supply.Power switch pipe T3, T4, T5, T6 upper inverse parallel diode D3, D4, D5, D6 respectively.
Further, this inverter also comprises the filter circuit between output and the electrical network that is connected to H bridge circuit, concrete, this filter circuit is L-type structure, comprise two inductance L 1, L2, described inductance L 1 one end is connected to the first output of H bridge circuit, and the other end is connected to electrical network, described inductance L 2 one end are connected to the second output of H bridge circuit, and the other end is connected to electrical network.
Refer to Fig. 5 a to Figure 51, the operational modal analysis of embodiment of the present invention inverter is as follows:
Mode H1: switch transistor T 2, T3, T6, T7 conducting, all the other cut-offs.Electric current warp: DC+ → T7 → D2 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V1.
Mode H2: switch transistor T 2, T3, T6, T7 conducting, all the other cut-offs.Electric current warp: PV-→ D6 → L2 → Vgrid → L1 → D3 → T2 → D7 → DC+, brachium pontis output voltage V ab=V1.
Mode H3: switch transistor T 2, T4, T5, T7 conducting, all the other cut-offs.Electric current warp: DC+ → T7 → D2 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V1.
Mode H4: switch transistor T 2, T4, T5, T7 conducting, all the other cut-offs.Electric current warp: PV-→ D4 → L1 → Vgrid → L2 → D5 → T2 → D7 → DC+, brachium pontis output voltage V ab=-V1.
Mode H5: switch transistor T 1, T3, T6 conducting, all the other cut-offs.Electric current warp: PV+ → T1 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V2.
Mode H6: switch transistor T 1, T3, T6 conducting, all the other cut-offs.Electric current warp: PV-→ D6 → L2 → Vgrid → L1 → D3 → D1 → PV+, brachium pontis output voltage V ab=V2.
Mode H7: switch transistor T 1, T4, T5 conducting, all the other cut-offs.Electric current warp: PV+ → T1 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V2.
Mode H8: switch transistor T 1, T4, T5 conducting, all the other cut-offs.Electric current warp: PV-→ D4 → L1 → Vgrid → L2 → D5 → D1 → PV+, brachium pontis output voltage V ab=-V2.
Mode H9: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Common-mode voltage VCM=(VaN+VbN)/2, calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage calculates gained as follows.
Mode H1, H2:VaN=V1, VbN=0, therefore, VCM=V1/2;
Mode H3, H4:VaN=0, VbN=V1, therefore, VCM=V1/2;
Mode H5, H6:VaN=V2, VbN=0, therefore, VCM=V2/2;
Mode H7, H8:VaN=0, VbN=V2, therefore, VCM=V2/2;
Mode H9, H10:VaN=V1/2, VbN=V1/2, therefore, VCM=V1/2;
Mode H11, H12:VaN=0, VbN=V0, therefore, VCM=0.
Common-mode voltage under various operation modes is as shown in following table one:
The common-mode voltage of the various operation modes of table one
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1,H2 | V1 | V1/2 | H1-forward current, H2-negative current |
H3,H4 | -V1 | V1/2 | H3-negative current, H4-forward current |
H5,H6 | V2 | V2/2 | H5-forward current, H6-negative current |
H7,H8 | -V2 | V2/2 | H7-negative current, H8-forward current |
H9,H10 | 0 | V1/2 | H9-forward current, H10-negative current |
H11,H12 | 0 | 0 | H11-forward current, H12-negative current |
All can obtain Vab=0 level by H9, the combination of H10 operation mode and H11, the combination of H12 operation mode, difference is common-mode voltage, and the common-mode voltage of other mode is V1/2 or V2/2.In order to ensure that as far as possible leakage current is less, to get one group that common-mode voltage approaches, thereby given up H11, H12 operation mode, by H9, H10 operation mode combination Vab=0 level.
It should be noted that, due to the existence of switching device parasitic capacitance, the voltage in parasitic capacitance can not instantaneous mutation, and therefore, H9, common-mode voltage corresponding to H10 mode can be considered as keeping the common-mode voltage V1/2 of a mode (H1/H2/H3/H4) on it.
From above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, therefore V1 not necessarily will equal V2/2, therefore, has evaded the problem of the neutral balance control of multilevel, realizes easily.
Adopt the job analysis of inverter of above mode as follows:
Suppose that meeting the minimum operating voltage of inverter is Vm (being generally amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2, higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V1 < Vm, bridge arm voltage and common-mode voltage are as shown in Fig. 6 (a), (b).
This kind of modulation strategy is applicable to the minimum operating voltage of PV voltage ratio inverter-bigger, thus can obtain V1 < Vm, now according to the value that relatively obtains Mode-switch point t0, t1, t2, t3, t4, t5, t6.
(2) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V1 > Vm, bridge arm voltage and common-mode voltage are as shown in Fig. 7 (a), (b).
This kind of applicable minimum operating voltage of PV voltage ratio inverter of modulation strategy is much larger, now, the V1 that step-down obtains is later less than V2, but it is too many that the value of V1 and V2 can not differ, otherwise common-mode voltage variation is larger, produce leakage current, the value of V1 and V2 can not be too approaching, thereby make output current distortion not reach requirement, optimum state is V2 > V1 > Vm.
As shown in Figure 8, be the main circuit diagram of a kind of concrete structure of the DC/DC converter using of this embodiment.Now, DC/DC converter comprises power switch pipe TB, diode DB, inductance L B.
Fig. 9 is the part-structure encapsulation schematic diagram of the inverter of this kind of structure, and wherein the collector electrode of power switch pipe T1 respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, the first output of H bridge circuit with the second output as the first level end of packaging, the second input of H bridge circuit as the second electrical level end of packaging, the collector electrode of power switch pipe T7.
Figure 10 and Figure 11 are the two kind application circuit structures of this embodiment mono-in three-phase system.Two kinds of application circuit modes are substantially similar, and its difference is, wherein Figure 10 is the structure chart being applied in the three-phase system of three-phase three-wire system, and Figure 11 is the structure chart being applied in the three-phase system of three-phase four-wire system.
The syndeton of this inverter applications in three-phase system is, three groups of packagings are as shown in Figure 9 connected in parallel between the positive-negative output end of DC power supply, wherein, the second electrical level end of each packaging is all connected to the positive output end of DC power supply, zero level end is all connected to the negative output terminal of DC power supply, the first level end is all connected to the positive output end of DC/DC converter, the input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply, between the positive-negative output end of DC power supply, connect capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, connect capacitor C 1, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in three-phase system.
The second embodiment
Figure 12 is second embodiment of the invention main circuit, and it has identical element with above-mentioned the first embodiment, and its difference is only, wherein power switch pipe T1, T2, T7 are positioned at the second input of H bridge circuit, are the dual topologies of above-mentioned the first embodiment.Its concrete structure is as described below.
The input of described DC/DC converter and earth terminal are all connected to the positive output end of DC power supply.
Between the positive-negative output end of DC power supply, connect described capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, be connected described capacitor C 1.
Power switch pipe T1, T2, T7 upper inverse parallel diode D1, D2, D7 respectively, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter, the emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply, the collector electrode of power switch pipe T7 is connected with the collector electrode of power switch pipe T1, the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the second input of H bridge circuit.
Described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, the collector electrode of power switch pipe T3, T5 is connected as the first input end of H bridge circuit, the emitter of power switch pipe T4, T6 is connected as the second input of H bridge circuit, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, and this tie point is as the second output of H bridge circuit.Power switch pipe T3, T4, T5, T6 upper inverse parallel diode D3, D4, D5, D6 respectively.
This inverter also comprises filter circuit, described filter circuit comprises two inductance L 1, L2, and described inductance L 1 one end is connected to the first output of H bridge circuit, and the other end is connected to electrical network, described inductance L 2 one end are connected to the second output of H bridge circuit, and the other end is connected to electrical network.
The operation mode of the inverter of this kind of structure and modulation strategy principle are identical with the inverter topology of above-mentioned the first structure, here simply introduce.
The operational modal analysis of this inverter is as follows:
Mode H1: switch transistor T 2, T3, T6 conducting, all the other cut-offs.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → T2 → PV-, brachium pontis output voltage V ab=V2.
Mode H2: switch transistor T 2, T3, T6 conducting, all the other cut-offs.Electric current warp: PV-→ D2 → D6 → L2 → Vgrid → L1 → D3 → PV+, brachium pontis output voltage V ab=V2.
Mode H3: switch transistor T 2, T4, T5 conducting, all the other cut-offs.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → T2 → PV-, brachium pontis output voltage V ab=-V2.
Mode H4: switch transistor T 2, T4, T5 conducting, all the other cut-offs.Electric current warp: PV-→ D2 → D4 → L1 → Vgrid → L2 → D5 → PV+, brachium pontis output voltage V ab=-V2.
Mode H5: switch transistor T 1, T3, T6, T7 conducting, all the other cut-offs.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → D1 → T7 → DC-, brachium pontis output voltage V ab=V1.
Mode H6: switch transistor T 1, T3, T6, T7 conducting, all the other cut-offs.Electric current warp: DC-→ D7 → T1 → D6 → L2 → Vgrid → L1 → D3 → PV+, brachium pontis output voltage V ab=V1.
Mode H7: switch transistor T 1, T4, T5, T7 conducting, all the other cut-offs.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → D1 → T7 → DC-, brachium pontis output voltage V ab=-V1.
Mode H8: switch transistor T 1, T4, T5, T7 conducting, all the other cut-offs.Electric current warp: DC-→ D7 → T1 → D4 → L1 → Vgrid → L2 → D5 → PV+, brachium pontis output voltage V ab=-V1.
Mode H9: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Common-mode voltage VCM=(VaN+VbN)/2, calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage is as shown in following table two.
The common-mode voltage of the various operation modes of table two
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1,H2 | V2 | V2/2 | HI-forward current, H2-negative current |
H3,H4 | -V2 | V2/2 | H3-negative current, H4-forward current |
H5,H6 | V1 | V2-V1/2 | H5-forward current, H6-negative current |
H7,H8 | -V1 | V2-V1/2 | H7-negative current, H8-forward current |
H9,H10 | 0 | V2-V1/2 | H9-forward current, H10-negative current |
H11,H12 | 0 | V2 | H11-forward current, H12-negative current |
With the analysis of above-mentioned the first structure, give up H11, H12 operation mode, by H9, H10 operation mode combination Vab=0 level.
From above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, therefore V2 not necessarily will equal twice V1, therefore, has evaded the problem of the neutral balance control of multilevel, realizes easily.
Adopt the job analysis of inverter of above mode as follows:
Suppose that meeting the minimum operating voltage of inverter is Vm (being generally amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2, higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V1 < Vm, bridge arm voltage and common-mode voltage are as shown in Figure 13 (a), (b).
(2) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V2 > V1 > Vm, bridge arm voltage and common-mode voltage are as shown in Figure 14 (a), (b).
Figure 15 is the main circuit diagram of a kind of concrete structure of the DC/DC converter using in structure shown in Figure 12.Figure 16 is the rear schematic diagram of power switch pipe encapsulation of the embodiment of the present invention the second embodiment.
The inverter topology of this kind of structure can be applied in three-phase three-wire system and three-phase system three-phase four-wire system, as shown in Figure 17 and Figure 18 equally.Now, power switch pipe T1, T2, T3, T4, T5, T6, T7 is as a packaging, wherein the first input end of H bridge circuit is as the second electrical level end of packaging, the emitter of power switch pipe T7 is as the first level end of packaging, the emitter of power switch pipe T2 is as the zero level end of packaging, the first output of H bridge circuit is exported AC1 and AC2 end as exchanging of packaging respectively with the second output, packaging described in three groups is connected in parallel between the positive-negative output end of DC power supply, wherein, the second electrical level end of each packaging is all connected to the positive output end of DC power supply, zero level end is all connected to the negative output terminal of DC power supply, the first level end is all connected to the negative output terminal of DC/DC converter, the input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply, between the positive-negative output end of DC power supply, connect capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, connect capacitor C 1, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in three-phase system.
The 3rd embodiment
Refer to Figure 19, the difference of this embodiment and embodiment mono-is to have lacked a power switch pipe T2, and the structure of other parts is all identical.
Refer to Figure 20 a to Figure 20 h, the operational modal analysis of this embodiment inverter is as follows:
Mode H1: switch transistor T 3, T6, T7 conducting, all the other cut-offs.Electric current warp: DC+ → T7 → D2 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V1.
Mode H3: switch transistor T 4, T5, T7 conducting, all the other cut-offs.Electric current warp: DC+ → T7 → D2 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V1.
Mode H5: switch transistor T 1, T3, T6 conducting, all the other cut-offs.Electric current warp: PV+ → T1 → T3 → L1 → Vgrid → L2 → T6 → PV-, brachium pontis output voltage V ab=V2.
Mode H6: switch transistor T 1, T3, T6 conducting, all the other cut-offs.Electric current warp: PV-→ D6 → L2 → Vgrid → L1 → D3 → D1 → PV+, brachium pontis output voltage V ab=V2.
Mode H7: switch transistor T 1, T4, T5 conducting, all the other cut-offs.Electric current warp: PV+ → T1 → T5 → L2 → Vgrid → L1 → T4 → PV-, brachium pontis output voltage V ab=-V2.
Mode H8: switch transistor T 1, T4, T5 conducting, all the other cut-offs.Electric current warp: PV-→ D4 → L1 → Vgrid → L2 → D5 → D1 → PV+, brachium pontis output voltage V ab=-V2.
Mode H9: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Front 8 mode: mode H1, mode H3, mode H5, mode H6, mode H7, mode H8, mode H9, mode H10 have been shown in Figure 20 a to Figure 20 h.
Common-mode voltage VCM=(VaN+VbN)/2, calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage calculates gained as follows.
Mode H1:VaN=V1, VbN=0, therefore, VCM=V1/2;
Mode H3:VaN=0, VbN=V1, therefore, VCM=V1/2;
Mode H5, H6:VaN=V2, VbN=0, therefore, VCM=V2/2;
Mode H7, H8:VaN=0, VbN=V2, therefore, VCM=V2/2;
Mode H9, H10:VaN=V1/2, VbN=V1/2, therefore, VCM=V1/2;
Mode H11, H12:VaN=0, VbN=V0, therefore, VCM=0.
Also than above-mentioned the second embodiment few two mode: H2, H4.
Common-mode voltage under various operation modes is as shown in following table three:
The common-mode voltage of the various operation modes of table three
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1 | V1 | V1/2 | H1-forward current, H2-negative current |
H3 | -V1 | V1/2 | H3-negative current, H4-forward current |
H5,H6 | V2 | V2/2 | H5-forward current, H6-negative current |
H7,H8 | -V2 | V2/2 | H7-negative current, H8-forward current |
H9,H10 | 0 | V1/2 | H9-forward current, H10-negative current |
H11,H12 | 0 | 0 | H11-forward current, H12-negative current |
The principle identical with embodiment mono-, has given up H11, and H12 operation mode, by H9, H10 operation mode combination Vab=0 level.
From above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, therefore V1 not necessarily will equal V2/2, therefore, has evaded the problem of the neutral balance control of multilevel, realizes easily.
Adopt the job analysis of inverter of above mode as follows:
Suppose that meeting the minimum operating voltage of inverter is Vm (being generally amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2, higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V1 < Vm, bridge arm voltage and common-mode voltage are as shown in Fig. 6 (a), (b).
This kind of modulation strategy is applicable to the minimum operating voltage of PV voltage ratio inverter-bigger, thus can obtain V1 < Vm, now according to the value that relatively obtains Mode-switch point t0, t1, t2, t3, t4, t5, t6.
(2) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V1 > Vm, bridge arm voltage and common-mode voltage are as shown in Fig. 7 (a), (b).
This kind of applicable minimum operating voltage of PV voltage ratio inverter of modulation strategy is much larger, now, the V1 that step-down obtains is later less than V2, but it is too many that the value of V1 and V2 can not differ, otherwise common-mode voltage variation is larger, produce leakage current, the value of V1 and V2 can not be too approaching, thereby make output current distortion not reach requirement, optimum state is V2 > V1 > Vm.
The inverter of this kind of structure can carry out the encapsulation of part-structure equally, and wherein the collector electrode of power switch pipe T1 respectively as the exchanging of packaging is exported AC1 and AC2 end as the zero level end of packaging, the first output of H bridge circuit with the second output as the first level end of packaging, the second input of H bridge circuit as the second electrical level end of packaging, the collector electrode of power switch pipe T7.
The inverter of this kind of structure can be applied in the three-phase system of three-phase three-wire system or three-phase four-wire system equally.When application, three groups of above-mentioned packagings are connected in parallel between the positive-negative output end of DC power supply, wherein, the second electrical level end of each packaging is all connected to the positive output end of DC power supply, zero level end is all connected to the negative output terminal of DC power supply, the first level end is all connected to the positive output end of DC/DC converter, the input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply, between the positive-negative output end of DC power supply, connect capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, connect capacitor C 1, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in three-phase system.
The 4th embodiment
Refer to Figure 21, Figure 21 is fourth embodiment of the invention main circuit, that is to say the simplification circuit of above-mentioned the second embodiment, and the difference of itself and above-mentioned the second embodiment is only, lacked a power switch pipe T1, other structures are identical.
The operational modal analysis of this inverter is as follows:
Mode H1: switch transistor T 2, T3, T6 conducting, all the other cut-offs.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → T2 → PV-, brachium pontis output voltage V ab=V2.
Mode H2: switch transistor T 2, T3, T6 conducting, all the other cut-offs.Electric current warp: PV-→ D2 → D6 → L2 → Vgrid → L1 → D3 → PV+, brachium pontis output voltage V ab=V2.
Mode H3: switch transistor T 2, T4, T5 conducting, all the other cut-offs.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → T2 → PV-, brachium pontis output voltage V ab=-V2.
Mode H4: switch transistor T 2, T4, T5 conducting, all the other cut-offs.Electric current warp: PV-→ D2 → D4 → L1 → Vgrid → L2 → D5 → PV+, brachium pontis output voltage V ab=-V2.
Mode H5: switch transistor T 3, T6, T7 conducting, all the other cut-offs.Electric current warp: PV+ → T3 → L1 → Vgrid → L2 → T6 → D1 → T7 → DC-, brachium pontis output voltage V ab=V1.
Mode H7: switch transistor T 4, T5, T7 conducting, all the other cut-offs.Electric current warp: PV+ → T5 → L2 → Vgrid → L1 → T4 → D1 → T7 → DC-, brachium pontis output voltage V ab=-V1.
Mode H9: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T6 → D4 → L1 → Vgrid → L2 → T6, brachium pontis output voltage V ab=0.
Mode H10: switch transistor T 4, T6 conducting, all the other cut-offs.Electric current warp: T4 → D6 → L2 → Vgrid → L1 → T4, brachium pontis output voltage V ab=0.
Mode H11: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D5 → T3 → L1 → Vgrid → L2 → D5, brachium pontis output voltage V ab=0.
Mode H12: switch transistor T 3, T5 conducting, all the other cut-offs.Electric current warp: D3 → T5 → L2 → Vgrid → L1 → D3, brachium pontis output voltage V ab=0.
Also than above-mentioned the second embodiment few two mode: H6, H8.
Common-mode voltage VCM=(VaN+VbN)/2, calculates the common-mode voltage of above-mentioned mode successively.Consider the effect of switching tube parasitic capacitance, can be similar to and think that common-mode voltage is as shown in following table four.
The common-mode voltage of the various operation modes of table four
Operation mode | Brachium pontis output voltage V ab | Common-mode voltage VCM | Current direction |
H1,H2 | V2 | V2/2 | H1-forward current, H2-negative current |
H3,H4 | -V2 | V2/2 | H3-negative current, H4-forward current |
H5 | V1 | V2-V1/2 | H5-forward current, H6-negative current |
H7 | -V1 | V2-V1/2 | H7-negative current, H8-forward current |
H9,H10 | 0 | V2-V1/2 | H9-forward current, H10-negative current |
H11,H12 | 0 | V2 | H11-forward current, H12-negative current |
With above-mentioned analysis, give up H11, H12 operation mode, by H9, H10 operation mode combination Vab=0 level.
From above-mentioned analysis, the inverter of this structure, intermediate level is not to be obtained by two capacitance partial pressures, therefore V2 not necessarily will equal twice V1, therefore, has evaded the problem of the neutral balance control of multilevel, realizes easily.
Adopt the job analysis of inverter of above mode as follows:
Suppose that meeting the minimum operating voltage of inverter is Vm (being generally amplitude or the peak value of line voltage), PV (DC power supply) output voltage V 2, higher than the minimum operating voltage Vm of inverter, adopts the modulation strategy of the following stated.
(1) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V1 < Vm, bridge arm voltage and common-mode voltage are as shown in Figure 13 (a), (b).
(2) obtain voltage V1 by the work of Buck reduction voltage circuit DC/DC converter, make V2 > V1 > Vm, bridge arm voltage and common-mode voltage are as shown in Figure 14 (a), (b).
The inverter topology of this kind of structure can be applied in three-phase three-wire system and three-phase system three-phase four-wire system equally, now, power switch pipe T2, T3, T4, T5, T6, T7 is as a packaging, wherein the first input end of H bridge circuit is as the second electrical level end of packaging, the emitter of power switch pipe T7 is as the first level end of packaging, the emitter of power switch pipe T2 is as the zero level end of packaging, the first output of H bridge circuit is exported AC1 and AC2 end as exchanging of packaging respectively with the second output, packaging described in three groups is connected in parallel between the positive-negative output end of DC power supply, wherein, the second electrical level end of each packaging is all connected to the positive output end of DC power supply, zero level end is all connected to the negative output terminal of DC power supply, the first level end is all connected to the negative output terminal of DC/DC converter, the input of DC/DC converter and earth terminal are connected respectively to the positive-negative output end of DC power supply, between the positive-negative output end of DC power supply, connect capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, connect capacitor C 1, the interchange output AC1 of each packaging and AC2 end are connected respectively to the two ends of three former limit windings in three-phase system.
The power switch pipe of mentioning in above-mentioned four embodiment can adopt thyristor, MOSFET (mos field effect transistor), JFET (technotron), IGBT (insulated gate bipolar) etc. switching tube.
It should be noted that, can be solar cell in the DC power supply practical application in above-mentioned four embodiment, can also be other DC power supply.Filter circuit in above-mentioned four embodiment can also be LC type or LCL type structure.
Although more than described the embodiment of the embodiment of the present invention; but being familiar with those skilled in the art is to be understood that; our described specific embodiment is illustrative; instead of for the restriction of the scope to the embodiment of the present invention; those of ordinary skill in the art are in equivalent modification and the variation done according to the spirit of the embodiment of the present invention, all should be encompassed in the scope that the claim of the embodiment of the present invention protects.
Claims (21)
1. an inverter, is characterized in that: comprise capacitor C 1, C2, power switch pipe T1, the T2 of three series windings, T7, H bridge circuit, DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the first input end of H bridge circuit, and described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, be connected to the negative output terminal of DC power supply, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, the upper diode D1 of inverse parallel respectively of T7, D2, D3, D4, D5, D6, D7, the input of described DC/DC converter and earth terminal are connected to the two ends of DC power supply, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, be connected described capacitor C 1, the emitter of power switch pipe T2 is connected with the emitter of power switch pipe T7, and the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter.
2. inverter as claimed in claim 1, is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6, T7 conducting, all the other cut-offs, electric current warp: DC+ → T7 → D2 → T3 → Vgrid → T6 → PV-;
Mode H2: switch transistor T 2, T3, T6, T7 conducting, all the other cut-offs, electric current warp: PV-→ D6 → Vgrid → D3 → T2 → D7 → DC+;
Mode H3: switch transistor T 2, T4, T5, T7 conducting, all the other cut-offs, electric current warp: DC+ → T7 → D2 → T5 → Vgrid → T4 → PV-;
Mode H4: switch transistor T 2, T4, T5, T7 conducting, all the other cut-offs, electric current warp: PV-→ D4 → Vgrid → D5 → T2 → D7 → DC+;
Mode H5: switch transistor T 1, T3, T6 conducting, all the other cut-offs, electric current warp: PV+ → T1 → T3 → Vgrid → T6 → PV-;
Mode H6: switch transistor T 1, T3, T6 conducting, all the other cut-offs, electric current warp: PV-→ D6 → Vgrid → D3 → D1 → PV+;
Mode H7: switch transistor T 1, T4, T5 conducting, all the other cut-offs, electric current warp: PV+ → T1 → T5 → Vgrid → T4 → PV-;
Mode H8: switch transistor T 1, T4, T5 conducting, all the other cut-offs, electric current warp: PV-→ D4 → Vgrid → D5 → D1 → PV+;
Mode H9: switch transistor T 3, T5 conducting, all the other cut-offs, electric current warp: D5 → T3 → Vgrid → D5;
Mode H10: switch transistor T 3, T5 conducting, all the other cut-offs, electric current warp: D3 → T5 → Vgrid → D3;
In above-mentioned each mode, DC+ represents the positive output end of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
3. inverter as claimed in claim 2, is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter while making its work and meet V1<Vm.
4. inverter as claimed in claim 2, it is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter while making its work and meets V2>V1>Vm.
5. the inverter as described in claim 1 to 4 any one, it is characterized in that: described power switch pipe T1, T2, T3, T4, T5, T6, T7 and six diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the collector electrode of power switch pipe T1 as the collector electrode of second electrical level end, power switch pipe T7 as the second input of the first level end, H bridge circuit as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the positive output end of DC/DC converter.
6. an inverter, is characterized in that: comprise capacitor C 1, C2, power switch pipe T1, the T2 of three series windings, T7, H bridge circuit, DC/DC converter, described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, is connected to the positive output end of DC power supply, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T2, T3, T4, T5, T6, the upper diode D1 of inverse parallel respectively of T7, D2, D3, D4, D5, D6, D7, the input of described DC/DC converter is connected the positive output end of DC power supply with earth terminal, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, be connected described capacitor C 1, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter, the emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply, the collector electrode of power switch pipe T7 is connected with the collector electrode of power switch pipe T1, the emitter of power switch pipe T1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the second input of H bridge circuit.
7. inverter as claimed in claim 6, is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6 conducting, all the other cut-offs, electric current warp: PV+ → T3 → Vgrid → T6 → T2 → PV-;
Mode H2: switch transistor T 2, T3, T6 conducting, all the other cut-offs, electric current warp: PV-→ D2 → D6 → Vgrid → D3 → PV+;
Mode H3: switch transistor T 2, T4, T5 conducting, all the other cut-offs, electric current warp: PV+ → T5 → Vgrid → T4 → T2 → PV-;
Mode H4: switch transistor T 2, T4, T5 conducting, all the other cut-offs, electric current warp: PV-→ D2 → D4 → Vgrid → D5 → PV+;
Mode H5: switch transistor T 1, T3, T6, T7 conducting, all the other cut-offs, electric current warp: PV+ → T3 → Vgrid → T6 → D1 → T7 → DC-;
Mode H6: switch transistor T 1, T3, T6, T7 conducting, all the other cut-offs, electric current warp: DC-→ D7 → T1 → D6 → Vgrid → D3 → PV+;
Mode H7: switch transistor T 1, T4, T5, T7 conducting, all the other cut-offs, electric current warp: PV+ → T5 → Vgrid → T4 → D1 → T7 → DC-;
Mode H8: switch transistor T 1, T4, T5, T7 conducting, all the other cut-offs, electric current warp: DC-→ D7 → T1 → D4 → Vgrid → D5 → PV+;
Mode H9: switch transistor T 4, T6 conducting, all the other cut-offs, electric current warp: T6 → D4 → Vgrid → T6;
Mode H10: switch transistor T 4, T6 conducting, all the other cut-offs, electric current warp: T4 → D6 → Vgrid → T4;
In above-mentioned each mode, DC-represents the negative output terminal of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
8. inverter as claimed in claim 7, it is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, when its work, obtaining voltage by the work of DC/DC converter is V1, V1 meets the following conditions: V1<Vm.
9. inverter as claimed in claim 7, it is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, when its work, obtain voltage V1 by the work of DC/DC converter, V1 meets the following conditions: V2>V1>Vm.
10. the inverter as described in claim 6 to 9 any one, it is characterized in that: described seven power switch pipe T1, T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the emitter of second electrical level end, power switch pipe T7 as the emitter of the first level end, power switch pipe T2 as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the negative output terminal of DC/DC converter.
11. 1 kinds of inverters, is characterized in that: comprise capacitor C 1, C2, power switch pipe T1, the T7 of two series windings, diode D2, H bridge circuit, DC/DC converter, the collector electrode of power switch pipe T1 is connected to the positive output end of DC power supply, and the emitter of power switch pipe T1 is connected with the negative electrode of diode D2, and this tie point is connected to the first input end of H bridge circuit, and described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, be connected to the negative output terminal of DC power supply, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, and two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T1, T3, T4, T5, T6, the upper diode D1 of inverse parallel respectively of T7, D3, D4, D5, D6, D7, the input of described DC/DC converter and earth terminal are connected to the two ends of DC power supply, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the positive output end of DC/DC converter and the negative output terminal of DC power supply, be connected described capacitor C 1, the anode of diode D2 is connected with the emitter of power switch pipe T7, and the collector electrode of power switch pipe T7 is connected to the positive output end of DC/DC converter.
12. inverters as claimed in claim 11, is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 3, T6, T7 conducting, all the other cut-offs, electric current warp: DC+ → T7 → D2 → T3 → Vgrid → T6 → PV-;
Mode H3: switch transistor T 4, T5, T7 conducting, all the other cut-offs, electric current warp: DC+ → T7 → D2 → T5 → Vgrid → T4 → PV-;
Mode H5: switch transistor T 1, T3, T6 conducting, all the other cut-offs, electric current warp: PV+ → T1 → T3 → Vgrid → T6 → PV-;
Mode H6: switch transistor T 1, T3, T6 conducting, all the other cut-offs, electric current warp: PV-→ D6 → Vgrid → D3 → D1 → PV+;
Mode H7: switch transistor T 1, T4, T5 conducting, all the other cut-offs, electric current warp: PV+ → T1 → T5 → Vgrid → T4 → PV-;
Mode H8: switch transistor T 1, T4, T5 conducting, all the other cut-offs, electric current warp: PV-→ D4 → Vgrid → D5 → D1 → PV+;
Mode H9: switch transistor T 3, T5 conducting, all the other cut-offs, electric current warp: D5 → T3 → Vgrid → D5;
Mode H10: switch transistor T 3, T5 conducting, all the other cut-offs, electric current warp: D3 → T5 → Vgrid → D3;
In above-mentioned each mode, DC+ represents the positive output end of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
13. inverters as claimed in claim 12, is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter while making its work and meet V1<Vm.
14. inverters as claimed in claim 12, it is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, obtains voltage V1 by the work of DC/DC converter while making its work and meets V2>V1>Vm.
15. inverters as described in claim 11 to 14 any one, it is characterized in that: described power switch pipe T1, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the collector electrode of power switch pipe T1 as the collector electrode of second electrical level end, power switch pipe T7 as the second input of the first level end, H bridge circuit as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the positive output end of DC/DC converter.
16. 1 kinds of inverters, is characterized in that: comprise capacitor C 1, C2, power switch pipe T2, the T7 of two series windings, diode D1, H bridge circuit, DC/DC converter, described H bridge circuit comprises 4 power switch pipe T3, T4, T5, T6, power switch pipe T3, the collector electrode of T5 is connected as the first input end of H bridge circuit, is connected to the positive output end of DC power supply, power switch pipe T4, the emitter of T6 is connected as the second input of H bridge circuit, the emitter of power switch pipe T3 is connected with the collector electrode of power switch pipe T4, this tie point is as the first output of H bridge circuit, the emitter of power switch pipe T5 is connected with the collector electrode of power switch pipe T6, this tie point is as the second output of H bridge circuit, two outputs of H bridge circuit are connected respectively to electrical network, power switch pipe T2, T3, T4, T5, T6, the upper diode D2 of inverse parallel respectively of T7, D3, D4, D5, D6, D7, the input of described DC/DC converter is connected the positive output end of DC power supply with earth terminal, between the positive-negative output end of DC power supply, connect described capacitor C 2, between the negative output terminal of DC/DC converter and the positive output end of DC power supply, be connected described capacitor C 1, the emitter of power switch pipe T7 is connected to the negative output terminal of DC/DC converter, the emitter of power switch pipe T2 is connected to the negative output terminal of DC power supply, the collector electrode of power switch pipe T7 is connected with the negative electrode of diode D1, the anode of diode D1 is connected with the collector electrode of power switch pipe T2, and this tie point is connected to the second input of H bridge circuit.
17. inverters as claimed in claim 16, is characterized in that: described inverter is operated in following mode:
Mode H1: switch transistor T 2, T3, T6 conducting, all the other cut-offs, electric current warp: PV+ → T3 → Vgrid → T6 → T2 → PV-;
Mode H2: switch transistor T 2, T3, T6 conducting, all the other cut-offs, electric current warp: PV-→ D2 → D6 → Vgrid → D3 → PV+;
Mode H3: switch transistor T 2, T4, T5 conducting, all the other cut-offs, electric current warp: PV+ → T5 → Vgrid → T4 → T2 → PV-;
Mode H4: switch transistor T 2, T4, T5 conducting, all the other cut-offs, electric current warp: PV-→ D2 → D4 → Vgrid → D5 → PV+;
Mode H5: switch transistor T 3, T6, T7 conducting, all the other cut-offs, electric current warp: PV+ → T3 → Vgrid → T6 → D1 → T7 → DC-;
Mode H7: switch transistor T 4, T5, T7 conducting, all the other cut-offs, electric current warp: PV+ → T5 → Vgrid → T4 → D1 → T7 → DC-;
Mode H9: switch transistor T 4, T6 conducting, all the other cut-offs, electric current warp: T6 → D4 → Vgrid → T6;
Mode H10: switch transistor T 4, T6 conducting, all the other cut-offs, electric current warp: T4 → D6 → Vgrid → T4;
In above-mentioned each mode, DC-represents the negative output terminal of DC/DC converter, and PV+ represents the positive output end of DC power supply, and PV-represents the negative output terminal of DC power supply, and Vgrid represents electrical network.
18. inverters as claimed in claim 17, it is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, when its work, obtaining voltage by the work of DC/DC converter is V1, V1 meets the following conditions: V1<Vm.
19. inverters as claimed in claim 17, it is characterized in that: when DC power output voltage V2 is higher than the minimum operating voltage Vm of inverter, control inverter, when its work, obtain voltage V1 by the work of DC/DC converter, V1 meets the following conditions: V2>V1>Vm.
20. inverters as described in claim 16 to 19 any one, it is characterized in that: described six power switch pipe T2, T3, T4, T5, T6, T7 and seven diode D1, D2, D3, D4, D5, D6, D7 are called to the first power switch pipe unit, and described inverter also comprises structure and identical second and third power switch pipe unit of the first power switch pipe unit;
With the first power switch pipe cell descriptions, wherein the first input end of H bridge circuit as the emitter of second electrical level end, power switch pipe T7 as the emitter of the first level end, power switch pipe T2 as the first output of zero level end, H bridge circuit and the second output respectively as ac output end;
Wherein, the second electrical level end of each power switch pipe unit is all connected to the positive output end of DC power supply, and zero level end is all connected to the negative output terminal of DC power supply, and the first level end is all connected to the negative output terminal of DC/DC converter.
21. 1 kinds of inverters as described in claim 5,10,15 or 20 any one application circuit in three-phase system, is characterized in that: the ac output end of each power switch pipe unit is connected respectively to the two ends of three former limit windings in three-phase system.
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