CN101651534B - Data frame synchronization method and equipment thereof - Google Patents

Data frame synchronization method and equipment thereof Download PDF

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Publication number
CN101651534B
CN101651534B CN2009100920667A CN200910092066A CN101651534B CN 101651534 B CN101651534 B CN 101651534B CN 2009100920667 A CN2009100920667 A CN 2009100920667A CN 200910092066 A CN200910092066 A CN 200910092066A CN 101651534 B CN101651534 B CN 101651534B
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signal
synchronization character
count value
lock
index signal
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CN101651534A (en
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邓周
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Beijing Haier IC Design Co Ltd
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Beijing Haier IC Design Co Ltd
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Abstract

The invention relates to a data frame synchronization method, which comprises the following steps: capturing a synchronous word in a data frame, and outputting a capture indication signal and a capture synchronous word sequence number; performing multi-path synchronous locking according to the capture indication signal, the capture synchronous word sequence number and a current count value, calculating and latching a frame head position, and outputting a locking signal and an empty-full indication signal, wherein the count value is obtained by performing cyclic counting on a received data frame by taking a frame length as a period, and the empty-full indication signal comprises an empty-full state and indicates that the data frame is not latched and is latched respectively; and outputting a locking indication signal according to the locking signal, outputting a frame header indication signal according to the latched frame header position and the current count value, and outputting a write enable signal according to the empty and full indication signal, wherein the write enable signal is used for coordinating the multi-path synchronous locking. The invention realizes a fast, accurate and stable data frame synchronization method.

Description

A kind of method for synchronizing data frames and equipment thereof
Technical field
The present invention relates to digital communicating field, relate in particular to a kind of method for synchronizing data frames and equipment thereof.
Background technology
In digital communicating field, data usually are packaged into the Frame with set form and transmit, and add specific synchronization character in the fixed position of every frame.As long as locked the position at synchronization character place, just can the judge rightly original position of Frame of receiver.
Fig. 1 is the data frame format of mpeg 2 transport stream.Data frame format as shown in Figure 1, that the mpeg 2 transport stream that extensively adopts in the digital television broadcasting system just has standard.In this form, data frame length is 188 bytes, and wherein first byte is a sync byte, and value is 0x47.Receiving terminal can be realized data-frame sync through the sync byte of catching and locking in the MPTS.
Fig. 2 is the frame structure of the PTM Packet Transfer Mode of MSC in the DAB standard.
The 5.3.5 joint of Europe ground digital audio broadcasting DAB standard has been stipulated a kind of pack mode transmission plan of MSC.As shown in Figure 2, introduced forward error correction coding (RS sign indicating number, Reed Solomon code) in this scheme, data through interweaving and encode after data formed the Frame of 2472 bytes.Wherein preceding 2256 bytes are a plurality of effective data packets, 9 forward error correction bags that back 216 bytes are formed for the check byte that is obtained by the RS coding.Long 24 bytes of each forward error correction bag, wherein preceding 2 bytes are packet header, the packet header of 9 forward error correction bags is value 0x03FE, 0x07FE, 0x0BFE, 0x0FFE, 0x13FE, 0x17FE, 0x1BFE, 0x1FFE and 0x23FE respectively.Because in each Frame, the packet header of 9 forward error correction bags all is positioned at fixing position and fixing value is arranged, so can they be regarded as synchronization character Frame is carried out synchronously.
Only after data-frame sync, receiver could correctly divide into groups to data, carries out next step work such as deinterleaving and decoding then.Therefore, realize that how fast, correctly and stably data-frame sync is an important problem.
One Chinese patent application " digital signaling system with generating and communicating advanced television ", publication number CN1210423A has proposed a kind of method that realizes data-frame sync according to synchronization character.This method detects synchronization character through a synchronizing indicator, and carries out the locking of synchronization character through confidence counter.This scheme has only adopted a synchronizing indicator and confidence counter, in every frame, can only latch a possible synchronization character position.Because the randomness of data wherein also the data segment the same with synchronization character possibly occur, so synchronizing indicator possibly detect wrong sync bit and cause synchronizing speed slow, even can't be synchronous.
Therefore, need a kind ofly fast, accurately and the stable data frame synchornization method and to detect each synchronization character can in every frame data, have a plurality of synchronization character the time and judge, accelerate synchronizing speed.
Summary of the invention
The present invention proposes a kind of method for synchronizing data frames that can address the above problem and equipment.
In first aspect, the invention provides a kind of method for synchronizing data frames, comprising: catch the synchronization character in the Frame, output is caught index signal and is caught the synchronization character sequence number; According to saidly catching index signal, saidly catching the synchronization character sequence number and current count value carries out multichannel genlocing; Calculate and latch the frame head position; Output locking signal and empty full index signal, wherein, said count value is that receiving data frames is carried out with the frame length is that the cycle count in cycle draws; The full index signal of said sky comprises empty full two states, and indication is not latched and latched respectively; According to said locking signal output lock indication signal, according to said frame head position of latching, said current count value output frame head index signal, enable signal is write in full index signal output according to said sky, writes enable signal and is used to coordinate said multichannel genlocing.
Preferably, the step of said genlocing comprises: according to said synchronization character sequence number and the said current count value calculating frame head position of catching; Latch and export said frame head position according to latch enable signal, wherein, said latch enable signal is write enable signal and is obtained with said by the said index signal of catching; According to each synchronization character position of the said frame head position calculation that latchs; Relatively draw first effective index signal according to current count value and said each synchronization character position; Relatively draw second effective index signal according to what catch that index signal and said catches synchronization character sequence number and said each synchronization character sequence number; Wherein, said each synchronization character sequence number is to draw according to said each synchronization character position and frame structure; Put letter according to first effective index signal and second effective index signal, draw said locking signal and losing lock signal; The state of said sky being expired index signal according to said losing lock signal is changed to sky, and the state of said sky being expired index signal according to said latch enable signal is changed to full.
In second aspect; A kind of data-frame sync equipment comprises synchronization character detecting unit, a plurality of sync-lock unit, cycle counter and control decision unit, wherein: the synchronization character detecting unit; Be used for catching the synchronization character of Frame, output is caught index signal and is caught the synchronization character sequence number; Sync-lock unit; Be used for calculating and latch the frame head position, output locking signal and empty full index signal according to saidly catching index signal, saidly catching the synchronization character sequence number and current count value carries out multichannel genlocing; Wherein, Said count value is that receiving data frames is carried out with the frame length is that the cycle count in cycle draws, and the full index signal of said sky comprises empty full two states, and indication is not latched and latched respectively; The control decision unit; Be used for according to said locking signal output lock indication signal; According to said frame head position of latching, said current count value output frame head index signal, enable signal is write in full index signal output according to said sky, writes enable signal and is used to coordinate said multichannel genlocing.
Preferably, said sync-lock unit comprises: the frame head position calculation unit is used for according to said synchronization character sequence number and the said current count value calculating frame head position of catching; Latch is used for latching and export said frame head position according to latch enable signal, and wherein, said latch enable signal is caught index signal and write enable signal and obtain by said; The synchronization character position calculation unit is used for according to each synchronization character position of the said frame head position calculation that latchs; The position comparing unit is used for relatively drawing first effective index signal according to current count value and said each synchronization character position; The synchronization character comparing unit is used for relatively drawing second effective index signal according to what catch that index signal and said catches synchronization character sequence number and said each synchronization character sequence number, and wherein, said each synchronization character sequence number is to draw according to said each synchronization character position and frame structure; Put letter counting unit, be used for putting letter, draw said locking signal and losing lock signal according to first effective index signal and second effective index signal; Empty full judging unit is used to export the full index signal of said sky, and its state of said sky being expired index signal according to said losing lock signal is changed to sky, and the state of said sky being expired index signal according to said latch enable signal is changed to full.
The present invention through with the Frame frame length be the cycle counter in cycle to receiving data counts, and the synchronization character testing result is carried out the judgement and the locking of multidiameter delay, realized a kind of fast, accurately and the stable data frame synchornization method.
Description of drawings
Below with reference to accompanying drawings specific embodiments of the present invention is explained in more detail, in the accompanying drawings:
Fig. 1 is the data frame format of mpeg 2 transport stream.
Fig. 2 is the frame structure of the PTM Packet Transfer Mode of MSC in the DAB standard.
Fig. 3 is the structured flowchart according to data-frame sync equipment of the present invention.
Fig. 4 is the structured flowchart of the sync-lock unit of Fig. 3.
Embodiment
Fig. 3 is the structured flowchart according to data-frame sync equipment of the present invention.
As shown in Figure 3; Data-frame sync equipment according to the present invention comprises a synchronization character detecting unit, modulo-N counter, a plurality of sync-lock unit and a control decision unit; Wherein, a plurality of sync-lock units are shown as sync-lock unit 1, sync-lock unit 2... sync-lock unit L respectively in the drawings.Should be appreciated that modulo-N counter is a cycle counter, it is that mould carries out cycle count with N.
Suppose the long N of being of input data frame, modulo-N counter is the cycle input data to be carried out cycle count with frame length N, and count value is outputed to a plurality of sync-lock units and control decision unit, output count value scope 0~N-1.
Suppose that every frame data comprise M synchronization character, be distributed in a plurality of positions of a Frame, the sequence number that makes this M synchronization character is 1~M.
Synchronization character detecting unit receiving data stream and with every group of data and all synchronization characters relatively, wherein, said every group of data are identical with the length of a synchronization character.If one group of data is identical with arbitrary synchronization character, then will effectively catch index signal and output to a plurality of sync-lock units with the corresponding synchronization character sequence number of catching, said synchronization character sequence number draws according to known frame structure.
According to catch index signal, catch the synchronization character sequence number, count value when detecting synchronization character; Sync-lock unit latchs the frame head position; Judge the state of genlocing and definite sync-lock unit, and accordingly to control decision unit output frame head position, locking signal and empty full index signal.
The control decision unit controls and adjudicates the work of two aspects according to above-mentioned input.
Aspect control, the control decision unit is coordinated a plurality of sync-lock unit concurrent workings.According to the full index signal of sky of each sync-lock unit, the control decision unit is write enable signal for the corresponding synchronous lock cell provides.When the full index signal of sky was sky, the sync-lock unit that expression produces this signal was in idle condition, can latch new suspicious frame head position, and the enable signal of writing that at this moment will output to this sync-lock unit is changed to effectively.Simultaneously, latch identical suspicious frame head position for fear of a plurality of sync-lock units, when the full index signal of the sky that is imported into by a plurality of sync-lock units was sky, the enable signal of writing that only will be transferred to one of them sync-lock unit was changed to effectively.For example; When detecting new suspicious frame head position; Can be changed to effectively by the enable signal of writing of certain rule (such as choosing the minimum sync-lock unit of sequence number) sync-lock unit that one of them is idle, and with other all sync-lock units write enable to be changed to invalid.
Aspect judgement, corresponding frame head position is adjudicated and selected to the control decision unit to each road locking signal.When any one road sync-lock unit gets into lock-out state, to control decision unit and just export lock indication signal, this lock indication signal is the exclusive disjunction result of the locking signal of each road sync-lock unit.If have only a locking signal effective, then select the frame head position of corresponding sync-lock unit output; If there are a plurality of locking signals effective, then can select the frame head position of one of them sync-lock unit output by certain rule (minimum) such as sequence number; When the count value of modulo-N counter equals selected frame head position, frame head index signal of control decision unit output.
Adopt the multichannel sync-lock unit can a plurality of suspicious frame head position Detection of Parallel Implementation and locking, accelerate synchronizing speed.
Fig. 4 is the structured flowchart of the sync-lock unit of Fig. 3.
As shown in Figure 4, sync-lock unit comprises frame head position calculation unit, latch, synchronization character position calculation unit, position comparing unit, synchronization character comparing unit, puts letter counting unit, logical AND gate, empty full judging unit.
The synchronization character lock cell will be caught the synchronization character sequence number and imported synchronization character comparing unit and frame head position calculation unit into, will catch index signal and import into and door; Modulo-N counter imports count value into frame head position calculation unit and position comparing unit.
The frame head position calculation unit calculates the frame head position according to the count value of catching synchronization character sequence number and modulo-N counter, that is the corresponding count value of frame head.Supposing to catch the synchronization character sequence number is i, can know that according to frame structure it originates in the P of Frame i(0≤P i≤N-1) individual data.For example, the count value of current modulo-N counter is C i, the count value that then frame head is corresponding should be:
C header=(C i-P i)mod?N
Special, sequence number is the synchronization character of i when being located in the frame head position, P i=0, then
C header=C i
Through with door, catch writing enable signal and obtaining latch enable signal afterwards of index signal and control and judgement comparing unit output, and with its input latch and empty completely judging unit.
The frame head position calculation unit is imported the frame head position that draws into latch.Latch latchs this frame head position and imports it into synchronization character position calculation unit and control decision unit according to latch enable signal.
The synchronization character position calculation unit goes out the position at each synchronization character place according to the frame head position calculation that latchs, i.e. the corresponding count value of each synchronization character, and import it into position comparing unit.For example, suppose that the frame head position of latching is C Header, sequence number is the P that the synchronization character of i originates in Frame i(0≤P i≤N-1) individual data, then its corresponding count value should be:
C i=(C header+P i)mod?N
Special, sequence number is the synchronization character of i when being located in the frame head position, P i=0, then
C i=C header
Can draw each synchronization character sequence number according to known frame structure and each the synchronization character position that calculates, promptly the synchronization character sequence number of expectation is imported it into synchronization character comparing unit.
The position comparing unit compares count value and all synchronization character positions of counter input.If count value equals any one synchronization character position, then effective index signal is outputed to and put letter counting unit, this synchronization character position is converted to the synchronization character sequence number of expectation and outputs to the synchronization character comparing unit.Effective index signal shows that the synchronization character position that equates with count value is the synchronization character catch position of expectation, and its effect is that notice is put letter counting unit and is correspondingly processed constantly at this.
The synchronization character comparing unit detects whether catch index signal effective, and the synchronization character sequence number that will catch synchronization character sequence number and each expectation compares.Have only when catching index signal effectively and catch the synchronization character sequence number of synchronization character sequence number and current expectation when identical, just explain current detection to synchronization character be the right value that meets expectation, export effective index signal to putting letter counting unit; Otherwise index signal is changed to invalid.
Put letter counting unit and comprise that mainly one is gone into to lock confidence counter and a losing lock confidence counter, it judges lock condition according to the index signal of position comparing unit and the index signal of synchronization character comparing unit.When the index signal of position comparing unit is effective, judge whether the index signal of synchronization character comparing unit is effective; If effectively then going into to lock confidence counter adds 1, the losing lock confidence counter subtracts 1; If the index signal of synchronization character comparing unit is invalid then goes into to lock confidence counter and subtract 1, the losing lock confidence counter adds 1.Put the letter count value when reaching lock threshold when going into lock, get into lock-out state, to control decision unit output locking signal; Put the letter count value when reaching the losing lock threshold value when losing lock, get into out-of-lock condition,, restart locking to the full judging unit output of sky losing lock signal.
Empty full judging unit is to the empty full index signal of control decision unit output, and this signal comprises empty full two states, respectively the full state of the sky of indicating lock storage.When latch enable signal is effective, latches has been described suspicious frame head position, expression latch state becomes full, and the full index signal of the sky of output is for full; When the confidence counter unit behind the full judging unit input of sky losing lock signal, remove the latch content, the latch state becomes sky, the full index signal of the sky of output be a sky.Empty full index signal is convenient to control decision unit the state of each sync-lock unit is monitored, and provides to the sync-lock unit of free time and effectively to write enable signal.
So far, the 26S Proteasome Structure and Function of sync-lock unit is described in detail.
Be to be understood that; The present invention is applicable to the situation that a synchronization character and a plurality of synchronization characters are arranged in every frame data; It locks through the judgement of the synchronization character testing result being carried out multidiameter delay and adjudicates through the control to multichannel genlocing; Improve the acquisition probability of synchronization character, strengthened the accuracy and the stability of synchronized result, accelerated the synchronizing speed of the Frame under especially a plurality of synchronization character situation.
For example, the present invention can in systems such as DVB, be used to realize mpeg 2 transport stream synchronously, can also in the FEC scheme of the PTM Packet Transfer Mode of DAB MSC, be used to realize Frame synchronously.
Obviously, under the prerequisite that does not depart from true spirit of the present invention and scope, the present invention described here can have many variations.Therefore, the change that all it will be apparent to those skilled in the art that all should be included within the scope that these claims contain.The present invention's scope required for protection is only limited described claims.

Claims (8)

1. method for synchronizing data frames comprises:
Catch the synchronization character in the Frame, output is caught index signal and is caught the synchronization character sequence number;
According to saidly catching index signal, saidly catching the synchronization character sequence number and current count value carries out multichannel genlocing; Calculate and latch multichannel frame head position; The empty completely index signal of output multichannel locking signal and multichannel, wherein, said count value is that receiving data frames is carried out with the frame length is that the cycle count in cycle draws; The full index signal of said sky comprises empty full two states, and indication is not latched and latched respectively;
Exclusive disjunction result according to said multichannel locking signal exports lock indication signal; The frame head position that one of the frame head choice of location that latchs according to said multichannel latchs; Output frame head index signal when said current count value equals selected frame head position of latching; Enable signal is write in empty full index signal output according to said multichannel, writes enable signal and is used to coordinate said multichannel genlocing.
2. according to the method for claim 1, it is characterized in that the step of said genlocing comprises:
According to said synchronization character sequence number and the said current count value calculating frame head position of catching;
Latch and export said frame head position according to latch enable signal, wherein, said latch enable signal is write enable signal and is obtained with said by the said index signal of catching;
According to each synchronization character position of the said frame head position calculation that latchs;
Relatively draw first effective index signal according to current count value and said each synchronization character position; Relatively draw second effective index signal according to what catch that index signal and said catches synchronization character sequence number and each synchronization character sequence number; Wherein, said each synchronization character sequence number is to draw according to said each synchronization character position and frame structure;
Put letter according to first effective index signal and second effective index signal, draw said locking signal and losing lock signal;
The state of said sky being expired index signal according to said losing lock signal is changed to sky, and the state of said sky being expired index signal according to said latch enable signal is changed to full.
3. according to the method for claim 2, wherein, the step of said calculating frame head position comprises:
Suppose that the said synchronization character sequence number of catching is i, Frame one total N data can know that according to frame structure said synchronization character originates in the P of Frame i(0≤P i≤N-1) individual data, the count value that frame head is corresponding should be:
C header=(C i-P i)mod?N
Wherein, C HeaderBe the count value of frame head, C iBe said current count value, mod is a modulo operation.
4. method according to claim 2; Wherein, The calculating of said each synchronization character position is specially the position that goes out each synchronization character place according to the frame head position calculation that latchs, and the position at said each synchronization character place is the corresponding count value of said each synchronization character, and its calculation procedure comprises:
The frame head position of latching is C Header, total N the data of Frame one can know that according to frame structure sequence number is the P that the synchronization character of i originates in Frame i(0≤P i≤N-1) individual data, then its corresponding count value should be:
C i=(C header+P i)mod?N
Wherein, C HeaderBe the count value of frame head, C iBe the count value of said correspondence, mod is a modulo operation.
5. method according to claim 2, wherein, said put to stroll comprise suddenly:
When said first index signal is effective, judge whether said second index signal is effective;
If said second index signal is effective, then be added to lock and put the letter count value, reduce losing lock and put the letter count value, put the letter count value otherwise reduce to go into to lock, increase losing lock and put the letter count value;
Go into lock and put the letter count value when reaching lock threshold when said, get into lock-out state, export said locking signal, put the letter count value when reaching the losing lock threshold value, get into out-of-lock condition, export said losing lock signal when losing lock.
6. a data-frame sync equipment comprises synchronization character detecting unit, a plurality of sync-lock unit, cycle counter and control decision unit, wherein:
The synchronization character detecting unit is used for catching the synchronization character of Frame, and output is caught index signal and caught the synchronization character sequence number;
Sync-lock unit; Be used for calculating and latch multichannel frame head position, output multichannel locking signal and the empty completely index signal of multichannel according to saidly catching index signal, saidly catching the synchronization character sequence number and current count value carries out multichannel genlocing; Wherein, Said count value is that receiving data frames is carried out with the frame length is that the cycle count in cycle draws, and the full index signal of said sky comprises empty full two states, and indication is not latched and latched respectively;
The control decision unit; Be used for exporting lock indication signal according to the exclusive disjunction result of said multichannel locking signal; The frame head position that one of the frame head choice of location that latchs according to said multichannel latchs; Output frame head index signal when said current count value equals selected frame head position of latching, enable signal is write in empty full index signal output according to said multichannel, writes enable signal and is used to coordinate said multichannel genlocing.
7. according to the equipment of claim 6, wherein, said sync-lock unit comprises:
The frame head position calculation unit is used for according to said synchronization character sequence number and the said current count value calculating frame head position of catching;
Latch is used for latching and export said frame head position according to latch enable signal, and wherein, said latch enable signal is caught index signal and write enable signal and obtain by said;
The synchronization character position calculation unit is used for according to each synchronization character position of the said frame head position calculation that latchs;
The position comparing unit is used for relatively drawing first effective index signal according to current count value and said each synchronization character position;
The synchronization character comparing unit is used for relatively drawing second effective index signal according to what catch that index signal and said catches synchronization character sequence number and each synchronization character sequence number, and wherein, said each synchronization character sequence number is to draw according to said each synchronization character position and frame structure;
Put letter counting unit, be used for putting letter, draw said locking signal and losing lock signal according to first effective index signal and second effective index signal;
Empty full judging unit is used to export the full index signal of said sky, and its state of said sky being expired index signal according to said losing lock signal is changed to sky, and the state of said sky being expired index signal according to said latch enable signal is changed to full.
8. according to the equipment of claim 7, wherein, the said letter counting unit of putting includes lock confidence counter and losing lock confidence counter:
When said first index signal is effective, judge whether said second index signal is effective;
If said second index signal is effective, then be added to the count value of lock confidence counter, reduce the count value of losing lock confidence counter, otherwise reduce the count value of going into to lock confidence counter, increase the count value of losing lock confidence counter;
Go into lock and put the letter count value when reaching lock threshold when said, get into lock-out state, export said locking signal, put the letter count value when reaching the losing lock threshold value, get into out-of-lock condition, export said losing lock signal when said losing lock.
CN2009100920667A 2009-09-17 2009-09-17 Data frame synchronization method and equipment thereof Expired - Fee Related CN101651534B (en)

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CN102130763B (en) * 2011-03-18 2014-08-13 中兴通讯股份有限公司 Device and method for adjusting line sequences in Ethernet transmission
CN102984549B (en) * 2012-11-26 2016-03-30 华为技术有限公司 Carry out processing method and the vertical sync circuit of frame synchronization
CN103607271A (en) * 2013-11-28 2014-02-26 西安烽火电子科技有限责任公司 Frame synchronization circuit suitable for Beidou satellite positioning system
CN105471788B (en) * 2015-12-30 2018-05-08 中国电子科技集团公司第五十四研究所 A kind of low time delay decomposition method and device to DVBS2 signals
US11930158B2 (en) 2018-07-25 2024-03-12 Hangzhou Hikvision Digital Technology Co., Ltd. Video signal identification method and apparatus, electronic device and readable storage medium
CN112911188B (en) * 2018-07-25 2022-09-30 杭州海康威视数字技术股份有限公司 Video signal system identification method and device, electronic equipment and readable storage medium

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1210423A (en) * 1997-04-04 1999-03-10 哈里公司 Circuits and systems for generating and communicating advanced television signals
CN101304403A (en) * 2008-06-30 2008-11-12 北京海尔集成电路设计有限公司 Method and system for frame synchronization

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1210423A (en) * 1997-04-04 1999-03-10 哈里公司 Circuits and systems for generating and communicating advanced television signals
CN101304403A (en) * 2008-06-30 2008-11-12 北京海尔集成电路设计有限公司 Method and system for frame synchronization

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