CN100488082C - Clock source frequency shift detecting method - Google Patents
Clock source frequency shift detecting method Download PDFInfo
- Publication number
- CN100488082C CN100488082C CN 03144068 CN03144068A CN100488082C CN 100488082 C CN100488082 C CN 100488082C CN 03144068 CN03144068 CN 03144068 CN 03144068 A CN03144068 A CN 03144068A CN 100488082 C CN100488082 C CN 100488082C
- Authority
- CN
- China
- Prior art keywords
- source
- clock
- crystal oscillator
- frequency
- independent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
The clock source frequency offset detecting method includes selecting the clock source signal from the several reference sources of the network equipment; counting the clock source signals to be tested with the clock signal in the main clock device in network equipment as counting clock to obtain multiple-way counting values; calculating the standard threshold value and relative threshold values of multiple-way calculated values, and constituting the combined threshold value with the standard threshold value and relative threshold values; inquiring the decision table with the combined threshold value to obtain at least one warning content of tracing source, main clock crystal oscillator and spare clock crystal oscillator; and reporting upward the warning content and the frequency offsets of different tested clock source signals.
Description
Technology neck threshold
The present invention relates to the optical communication network technology, relate in particular to equipment clock source frequency bias detecting method in the optical communication network.
Background technology
In optical communication network, clock plays very important effect in transmission equipment, and the signal of all transmission must be unified by clock synchronously.The whole network clock should be synchronous or deviation within the specific limits, make signal that good transmission quality be arranged, so proposed in many products the quality of crystal oscillator and External synchronous reference source, line source are carried out the requirement of immediately monitoring.
At present to the time clock source detection method mainly contain following two kinds of schemes:
Technical scheme one:
The clock source has or not detection: when lose in the clock source, go out the clock source by relevant logic detection and lose and report, board software is put this clock source, road bad.If putting bad clock source is current tracing source, then make entering and keep or free-running dependent instruction, phase-locked loop is entered keep or free-run mode, select other road clocks in the priority list to follow the tracks of by software again, thereby keep system synchronization.Though this scheme can detect the clock source of losing, and has following shortcoming:
1, have only the clock source to lose Shi Caineng fully and detect, do not have real-time testing mechanism for the current frequency deviation value in clock source and the quality in clock source, the timely detection to the clock source quality has significant limitation like this.For example,, do not have relevant detection to go up time signal clock source deterioration state, cause phase-locked loop to continue to follow the tracks of the deterioration clock when the clock source corrupts to can't follow the tracks of the time; Perhaps non-tracing time clock source has corrupted to can't be followed the tracks of and can not report, and still as the standby clock source, forms mistake easily and switches in switch in the clock source, destroys the system synchronization state.
2, can not detect the phase-locked loop crystal oscillator.Main in use can occur aging or damage, make the crystal oscillator reference frequency output be offset, the serious phase-locked loop losing lock that causes with crystal oscillator.And this detection method can't obtain the frequency shift (FS) situation of crystal oscillator, even crystal oscillator is aging or damage also reports with nowhere to turn to alert; Standby crystal oscillator occurs aging or when damaging, and mainly can't learn equally with veneer, forms mistake easily and switches, and causes switching back clock performance deterioration, destroys system synchronization.
Technical scheme two:
This scheme is a majority voting clock source detection method.Majority voting judges that clock source quality is based on most of correct clocks source.In frequency deviation detects since not definitely accurately clock as benchmark, have no idea directly to obtain the absolute frequency values in each clock source, so obtain that the frequency deviation data can only be with frequency difference relative between each clock source as basis for estimation comparatively accurately, selecting wherein clock source accurately by majority voting again, is the frequency deviation value that benchmark obtains other sources with it.According to the principle of majority voting in the frequency that detects great majority place and same frequency range be exactly to think accurate frequency values, the extraneous frequency deviation that then exists of remaining minority.Majority voting judges that by the preset threshold scope reference source and crystal oscillator are to belong to majority accurately exactly, or the minority mistake, judge the quality of clock source quality with this.Majority voting judges that by the simple two-dimensional table quality in clock source in the table, its main principle are to think that the clock source that majority is in the equal in quality level all is a high-quality, promptly is inferior and minority is in the clock source of other quality levels.
There is following shortcoming in technical scheme two:
1, can not detect the phase-locked loop crystal oscillator.The master in use occurs aging with crystal oscillator or damages, and makes the crystal oscillator reference frequency output be offset, and causes the phase-locked loop losing lock.This detection method can't obtain the good and bad situation of crystal oscillator, even crystal oscillator is aging or damage also reports with nowhere to turn to alert, destroys system synchronization.Standby crystal oscillator occurs aging or when damaging, and mainly can't learn with veneer, forms mistake easily and switches, and causes switching back clock performance deterioration, the destruction system synchronization.
2, the most of sources of acquiescence are normal clock source in judgement, and there are a lot of problems in this judgement standard.At first under the less situation in clock source, can't judge or judge inaccurate, for example have only the two-way reference source, how judge most for normal.Secondly when damaging appearred in most reference sources, judgement standard can be subjected to very big influence, phase-locked loop occurred and selected the reference source error.
3, can only go up the quality in time signal clock source, can't obtain the real-time frequency deviation value in clock source, can not understand the concrete data of clock source offset timely.
4, clock source quantity to be detected there is strict restriction, in case surpassing predetermined limits, clock source quantity can't detect unnecessary clock source, this just need use different decision mechanisms to different configurations, can't guarantee that the variation configuration of system clock obtains compatible testing mechanism.
Summary of the invention
The object of the present invention is to provide a kind of clock source frequency bias detecting method, to solve the shortcoming that can not promptly and accurately detect clock source offset frequency situation and crystal oscillator quality in the existing technology.
The invention provides following technical scheme:
A kind of clock source frequency bias detecting method is used for detecting the clock and the crystal oscillator situation of synchronous network system network element device; The method comprising the steps of:
A, from the multichannel reference source of network element device, select clock source signals to be measured;
B, with the clock signal of active clock equipment in the network element device as counting clock, respectively to each road clock source signals counting to be measured, and obtain the multiple metering value;
C, respectively with each road count value and preassigned numerical computations difference, with each road count value of calculating relative difference each other, and the frequency offseting value that calculates each difference and relative difference correspondence, wherein, described preassigned numerical value is the count value that the synchronous counting clock of employing and active clock equipment clock counts to get the active clock equipment clock;
D, according to the frequency deviation range under each frequency offseting value, obtain the level threshold value of difference correspondence and the relative threshold of relative difference correspondence;
E, the level threshold value of gained and relative threshold are pressed predefined procedure constitute combined threshold value, and utilize the inquiry of this combined threshold value to comprise the decisional table of combined threshold value and corresponding warning content, obtain the warning content of one of tracing source, active clock equipment crystal oscillator and standby clock equipment crystal oscillator at least;
F, report the frequency offseting value of described warning content and each road tested clock source signals.
Wherein:
When having tracing source and standby clock equipment in the network element device, preferentially select tracing source and standby clock equipment clock, if there is a plurality of clocks source to need to detect on the same equipment, then only detect the clock source that priority is the highest and exist.
Multipath clock source signal described in the steps A comprises at least and is configured in all clock source signals in the priority list of clock source.
When the clock source quantity in the priority list was less than predetermined value, the clock source of search existence was as the reference source automatically.
The independent source that comprises in the described clock source signals to be measured is selected by clock source priority list medium priority order from high to low.
The present invention can detect each the clock source, road in the priority list and the reference frequency output of phase-locked loop crystal oscillator timely and effectively accurately, and has reached alarm accurately and switching of clock source and the switching of active and standby crystal oscillator by relevant processing; Provide each timely frequency deviation data in clock source, road simultaneously, and precision can be adjusted by the figure place of counter as required; And the clock system of difference configuration had fine compatibility, be applicable to the priority lists of various different configurations.
Description of drawings
Figure 1A, Figure 1B are the structure chart of frequency deviation detection module;
Fig. 2 is the sequential chart of counter;
Fig. 3 mainly adjudicates flow chart for tracing source and stand-by equipment crystal oscillator;
Fig. 4 mainly adjudicates flow chart for independent source and stand-by equipment crystal oscillator;
Fig. 5 mainly adjudicates flow chart for tracing source and independent source;
Fig. 6 mainly adjudicates flow chart for full independent source.
Embodiment
In synchronous network system, the network element device clock by digital phase-locked loop to the phase-locked output system clock of reference source, and for crystal oscillator, all having a voltage-controlled scope, crystal oscillator frequency and voltage-controlled voltage are linear in voltage-controlled scope, exceed voltage-controlled scope and become non-linear relation.So when the design phase-locked loop, just consider crystal oscillator is operated in the voltage-controlled scope, guarantee the accuracy of output frequency.For example the scope with the digital simulation conversion values (hereinafter to be referred as the DA value) of apparatus figure phase-locked loop is set at A～B.In case frequency shift (FS) has taken place in reference source, the DA value will change with the offset direction and continue to follow the tracks of, if but frequency deviation has exceeded the controlled scope phase-locked loop of DA value is losing lock, at this moment the DA value is changed to maximum B or minimum value A by the reference frequency offset direction, and this is the important evidence that frequency deviation detects.
The stand-by equipment clock is followed the tracks of the host apparatus clock with analog phase-locked look, so under normal circumstances it and master clock also should keep synchronous.Stand-by equipment carries out active and standby interlocking by exporting one tunnel feedback clock signal to main equipment, therefore can utilize this road clock signal to judge the lock condition of active and standby plate.
Generally speaking, in the priority list of the clock source of equipment, dispose multipath clock source (the stand-by equipment clock is included in and exists in the clock source, but is not included in the priority list).Master clock is followed the tracks of the highest clock source of priority during operate as normal, and this clock source is called tracing source, and all the other not tracked clock sources are called independent source.Can judge whether and to follow the tracks of that for independent source if the reference source frequency in DA value scope then can follow the tracks of, exceeds this scope and then can't follow the tracks of, this also is the theoretical foundation that frequency deviation detects by the DA value scope of crystal oscillator.The capture range of standard crystal oscillator by standard should be-4.6～+ 4.6PPM, in the present embodiment the crystal oscillator capture range that frequency deviation is detected arrive-5 surely～+ 5PPM.
The present invention is output as benchmark with active clock equipment crystal oscillator, and reference source signal and crystal oscillator output signal counting to needs detect obtain relevant information by count value.
Consult shown in Figure 1A, the logical gate of frequency deviation detection module comprises by mask register, counter and output interface.Mask register is used to receive the multichannel reference source signal, and the clock signal of therefrom selecting to need to detect is exported; Counter receives the clock signal of mask register output and count value is exported by output interface in its counting back.The counting clock input of counter is connected with the output of active clock equipment crystal oscillator, and the output signal of utilizing active clock equipment crystal oscillator is as counting clock.
Consult shown in Figure 1B, because frequency higher signal counting is needed the high device of performance, in order to reduce requirement, connect frequency divider, become low frequency signal after making the reference source signal frequency division at the input of mask register to device performance.Equally, between the counting clock input of counter and active clock equipment crystal oscillator output, be connected frequency divider, with behind the output signal frequency division of crystal oscillator as counting clock.
Below be that the present invention is described in detail for example with Figure 1B.
Consult Figure 1B, mask register is 5 32 and selects 1 mask register, select 5 the tunnel as measured signal from the multichannel reference source.Mask register is a programmable logic device, realizes some logic functions, as the selection allotment in clock source etc.Mask register is by the relevant control command of interface receiving processor.
Counter is 5 16 digit counters, and each counter utilizes the signal behind the crystal oscillator output frequency division of host apparatus as counting clock one road measured signal to be counted synchronously.Consult counter sequential shown in Figure 2, with the counting precision that reaches 0.1PPM is example, the equipment crystal oscillator is output as 10M, low-frequency clock signal to be measured is 1K, then need to count 1000 1K cycles (1000/ (10000000*1000)=0.1PPM), so counter is at first counted by the 10M trailing edge 1000 1K cycles, counting down to the register read enable signal CNT-REFRESH that produced two cycles of pulsewidth at 1001 o'clock, by 10M rising edge read counter; Produce the counter O reset enable signal CNT-CLEAR in two cycles of pulsewidth subsequently, by the 10M trailing edge to counter O reset.Enumeration data remains to reading (following explanation is a benchmark with this example all) next time always in register.
Can register be set at the output of each counter, with the count value of temporary counter output, the processing module in the supply equipment reads.When not having register, counter can read count value by processing module by interrupt signal when finishing counting.
The groundwork process that frequency deviation detects is as follows:
(1) multipath clock source signals such as comprising outer synchronisation source, line source and standby clock crystal oscillator is arranged on the network element device, these clock sources become low-frequency clock signal input mask register after by frequency division.
The clock source of configuration all should be as input in the clock priority tabulation of network element device.When if the clock source in the priority list adds 4 of the clock source less thaies of standby clock equipment, then automatically the clock source that exists of search as input.
(2) 5 selectors are therefrom selected 5 road measured signals by the priority of clock source in priority list.
Because the clock of standby clock equipment not in priority list, therefore just should be selected as long as this clock source exists.For independent source, by its priority selective sequential from high to low at priority list.
(3) 5 road countings are counted 5 road measured signals respectively, output count value A1, A2, A3, A4, A5, then to preceding four tunnel count value A1, A2, A3, A4 basis of calculation threshold value, calculate the relative threshold of relative value A1-A2, A1-A3, A1-A4, A2-A3, A2-A4, A3-A4 again, level threshold value and relative value are constituted combined threshold value in certain sequence.
A, level threshold value: give an example by above-mentioned, then be count value and standard value 16 systems of computing counter output count 9680H (9680H is that the mainboard crystal oscillator is exported 16 hex value that 10M obtains the signal-count of 1K, when just 1K and 10M are synchronous count value) the residing frequency range of difference.What this difference embodied is the frequency difference of two frequencies, is converted into PPM and is equivalent to every 1 corresponding two frequencies that differ from and differs 0.1PPM.
B, relative threshold: the counter output residing frequency range of difference between any two.
Size according to frequency offseting value is divided into five threshold ranges:
Threshold value-3 expression: difference＜=-5PPM;
Threshold value-2 expression :-5PPM＜difference＜-0.3PPM;
Threshold value+2 expressions: 0.3PPM＜difference＜5PPM;
Threshold value+3 expressions: difference 〉=5PPM; Wherein 5 PPM represent the lock-in range of crystal oscillator.
Basis of calculation threshold value then is: earlier with preceding four tunnel count value A1, A2, A3, A4 and standard figures 9680H calculated difference; Calculate the frequency offseting value of each difference correspondence; Obtain corresponding level threshold value according to the scope under each frequency offseting value.
Calculating relative threshold then is: the frequency offseting value that calculates relative value A1-A2, A1-A3, A1-A4, A2-A3, A2-A4, A3-A4 correspondence; Obtain corresponding relative threshold according to the scope under each frequency offseting value.
As: 2 ,-2 ,-2,2,1,21 ,-2,2 ,-3 the level threshold value that calculates is respectively:, the relative threshold that calculates is:, then in order these values are constituted combined threshold value: 1-22-32-2-2212.
(4) inquire about decisional table with combined threshold value, obtain the warning content of crystal oscillator and clock source state.
Decisional table just is used for judging the quality of current tracing source, mainboard crystal oscillator, slave board crystal oscillator.The decisional table content is mainly divided threshold value and alarm two parts, utilizes majority voting, phase-locked loop characteristics and system performance comprehensively to form, and the phase-locked loop characteristics of mainly using is the capture range of phase-locked loop, and exceeds the characteristic that is operated in upper and lower bound after the capture range; System performance then is the processing method of transmission product for clock, for example selects the source, backs up, switches etc.The quality in crystal oscillator and clock source is obtained in a kind of alarm in the corresponding decisional table of each group combined threshold value by alarm.As: the combined threshold value 1-22-32-2-2212 that will go up in the step searches corresponding alarm signal from corresponding decisional table.
(5) the No. five counters output A5 is specifically designed to the independent source that detects not selected participation inquiry decisional table in the priority list, and its count results only is used to report the frequency deviation value of detection resources not as the decisional table foundation.
Clock source in the priority list can enter in preceding 4 counters in order, finishes tabling look-up of decisional table, draws corresponding alarm and processing.Owing to except the stand-by equipment crystal oscillator, 3 road clock sources can only be arranged again in four counters, but possible configuration has clock source more than 3 tunnel in the priority list, and other clock sources (independent source) that have more like this can't be detected.Therefore, utilize the No. five counter that detection is rotated in these sources, that is to say that the clock source in this counter is unfixing.For example: 5 road clock sources are arranged in the priority list, have 3 the tunnel in decisional table, to judge, remaining 2 the tunnel count in the No. 5 counter, earlier 1 tunnel a period of time of meter, count 1 tunnel a period of time in addition again, so by turns, every counting once all compares the value of counting out with normal source, if differ in the scope that meets the demands, then this source is good, if go beyond the scope then this source is bad.
The treatment principle of independent source:
Whether the quality of independent source adopts independent source to judge in mainboard crystal oscillator lock-in range: whether the DA value that the PPM value that current active clock equipment crystal oscillator DA value+independent source is offset converts to (A～B) in the lock-in range of mainboard crystal oscillator, if in lock-in range, then independent source is normal, otherwise the independent source frequency deviation is excessive.
The PPM value converts the method for DA value to:
DA value=PPM value * coefficient=(count value/10) * coefficient;
Coefficient=(the lock-in range upper limit-lower limit)/(crystal oscillator capture range * 2)
Wherein: capture range is relevant with crystal oscillator, requires the capture range must be greater than the capture range of decisional table.
Under the normal situation of active clock equipment crystal oscillator, illustrate that the crystal oscillator output frequency is accurate, can be used as reference frequency, at this moment press counter output and calculate each clock source frequency deviation, can inquire about concrete numerical value by order line; But when crystal oscillator detects bad time, do not have accurate a reference source, promptly stop to calculate amounts of frequency offset.
(6) frequency offseting value of each road detection resources and the alarm automatic report that produces of tabling look-up are given computer the most at last, and carry out corresponding operation.
The principle of drawing up of decisional table in the present embodiment:
In actual conditions, equipment is furnished with active clock equipment (afterwards being called mainboard) and standby clock equipment (afterwards being called slave board) usually, configuration multipath clock source in the priority list of clock source (the highest clock source of master clock tracking priority is called tracing source at this during operate as normal, and all the other not tracked sources are called independent source).But also might occur: the no slave board situation of only being furnished with a clockwork; The free oscillation situation of no tracing source; And there is not a situation that tracing source does not have slave board yet.And the number in clock source also is uncertain in the priority list.So decisional table can be divided into by type: have tracing source to have slave board, no tracing source that slave board is arranged, have tracing source not have slave board, no tracing source does not have four types of slave boards.Every type is divided into binary, ternary, quaternary decisional table by the number that participates in judgement clock source again.
The decisional table content is mainly divided threshold value and alarm two parts.
The method of threshold decision lock condition is as follows:
(1), the threshold value of tracing source: 1～illustrate and follow the tracks of normally; 2～illustrating that tracing source exceeds capture range, the mainboard crystal oscillator frequency is pulled to the highest, and 0.3PPM＜differ＜5ppm;-2～illustrating that tracing source exceeds capture range, the mainboard crystal oscillator frequency is pulled to minimum, and-5PPM＜differ＜0.3PPM; 3～illustrate that tracing source exceeds capture range, the mainboard crystal oscillator frequency is pulled to the highest, and differs 〉=5PPM;-3～illustrating that tracing source exceeds capture range, the mainboard crystal oscillator frequency is pulled to minimum, and differ＜=-5PPM.
(2), the threshold value of slave board crystal oscillator: 1～illustrate and follow the tracks of normally; 2～illustrating that losing lock, mainboard crystal oscillator frequency exceed slave board crystal oscillator capture range, the slave board crystal oscillator is pulled to minimum, and 0.3PPM＜differ＜5ppm;-2～illustrating that losing lock, mainboard crystal oscillator frequency exceed slave board crystal oscillator capture range, the slave board crystal oscillator is pulled to the highest, and-5PPM＜differ＜0.3PPM; 3～illustrate that losing lock, mainboard crystal oscillator frequency exceed slave board crystal oscillator capture range, the slave board crystal oscillator is pulled to minimum, and differs 〉=5PPM;-3～illustrating that losing lock, mainboard crystal oscillator frequency exceed slave board crystal oscillator capture range, the slave board crystal oscillator is pulled to the highest, and differ＜=-5PPM.
(3), independent source and mainboard crystal oscillator could lock: whether the DA value that the PPM value of the current DA value of mainboard crystal oscillator+independent source skew converts to (A～B) in the lock-in range of mainboard crystal oscillator.
(4), tracing source, independent source and slave board crystal oscillator could lock: whether tracing source, independent source be in slave board crystal oscillator lock-in range.
(5), whether tracing source is consistent with independent source: 1～illustrate consistent; 2～illustrate inconsistently, but be more or less the same;-2～illustrate inconsistently, but be more or less the same; 3～illustrate inconsistently, differ bigger;-3～illustrate inconsistently, differ bigger.
Consult the judgement flow chart of Fig. 3, Fig. 4, Fig. 5 and Fig. 6, each flow chart is the main foundation of the flow chart of row system the type decisional table.
Consult Fig. 3: the main judgement flow process of tracing source and slave board crystal oscillator is as follows:
Step 300: judge whether losing lock of tracing source, if not then carry out step 301, otherwise carry out step 304;
Step 301: judge whether losing lock of active and standby plate, if not then determining active and standby plate normal (step 302), otherwise determine slave board crystal oscillator bad (step 303);
Step 304: judge tracing source whether in slave board crystal oscillator lock-in range, if not then carry out step 305, otherwise determine mainboard crystal oscillator bad (step 306);
Step 305: judge most independent sources whether in mainboard crystal oscillator lock-in range, if not then carry out step 307, otherwise determine tracing source bad (step 308);
Step 307: judge most independent sources whether in slave board crystal oscillator lock-in range, if not then carry out step 309, otherwise determine mainboard crystal oscillator bad (step 410);
Step 309: judged whether reference source in mainboard crystal oscillator lock-in range,, otherwise determined tracing source bad (step 312) if not then carry out step 311;
Step 311: judged whether reference source in slave board crystal oscillator lock-in range,, otherwise determined slave board crystal oscillator bad (step 314) if not then determine mainboard crystal oscillator bad (step 313).
Consult Fig. 4, the main judgement flow process of independent source and slave board crystal oscillator is as follows:
Step 200: judge whether losing lock of active and standby plate, if not then carry out step 201, otherwise carry out step 208;
Step 201: judged whether independent source in mainboard crystal oscillator lock-in range, if not then carry out step 202, otherwise carry out step 203;
Step 202: judged whether independent source in slave board crystal oscillator lock-in range, if not then carry out independent source and detect (step 204); Otherwise carry out masterslave switchover (step 205);
Step 203: judge whether the independent source frequency is identical, if not then determining active and standby plate normal (step 206), otherwise determine source inconsistent (step 207);
Step 208: judge whether that the independent source in the mainboard crystal oscillator lock-in range is less than the slave board crystal oscillator, if not then determining brilliant former shatter (step 209) of slave board, otherwise determine mainboard crystal oscillator bad (step 210).
Consult Fig. 5, the main judgement flow process of tracing source and independent source is as follows:
Step 10: judge whether losing lock of tracing source, if not then carry out step 20, otherwise carry out step 30;
Step 20: judge whether tracing source is identical with the independent source frequency; If then determine tracing source normal (step 22); Otherwise determine source inconsistent (step 21);
Step 30: judged whether that independent source is in mainboard crystal oscillator lock-in range; If then determine tracing source bad (step 32); Otherwise determine active clock equipment crystal oscillator bad (step 31).
Consult Fig. 6, the main judgement flow process of full independent source is as follows:
Step 100: judge whether that most independent sources are in mainboard crystal oscillator lock-in range; If then carry out step 120, otherwise carry out step 110;
Step 110: judge whether most independent source frequencies are consistent; Detect (step 112) if then carry out independent source, otherwise determine active clock equipment crystal oscillator bad (step 111);
Step 120: judge whether the independent source frequency is consistent; Detect (step 122) if then carry out independent source, otherwise determine independent source normal (step 121).
The two-element list principle of drawing up:
Two-element list reference source number: 2
Threshold value is distributed: first is the threshold value ((reference source 1 count value-9680H) threshold value) of reference source 1; Second is the threshold value of reference source 2; The 3rd is the threshold value of reference source 1-reference source 2.
Four kinds of table types:
1, tracing source+slave board crystal oscillator
For example: " 111 " follow the tracks of normal.
Alarm: normal.
" 222 " mainboard crystal oscillator can't the track reference source, and tracing source is in slave board crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
" 12-2 " mainboard crystal oscillator is followed the tracks of normal, slave board crystal oscillator losing lock.
Alarm: the slave board crystal oscillator is bad.
2, independent source+slave board crystal oscillator
For example: " 111 " locking is normal, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: normal.
" 212 " locking is normal, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: normal.
" 22-2 " active and standby plate losing lock, independent source is in this crystal oscillator lock-in range.
Alarm: the slave board crystal oscillator is bad.
" 322 " active and standby plate losing lock, independent source is in this crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
3, tracing source+independent source
For example: " 111 " follow the tracks of normal, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: normal.
" 2-22 " mainboard crystal oscillator can't the track reference source, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: reference source 1 is bad.
" 221 " mainboard crystal oscillator can't the track reference source, and independent source is not in mainboard crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
4, independent source+independent source
For example: " 111 " independent source is in mainboard crystal oscillator lock-in range.
Alarm: normal.
" 2-22 " independent source is in mainboard crystal oscillator lock-in range, and the clock source is inconsistent.
Alarm: the source is inconsistent.
" 331 " independent source is not in mainboard crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
Ternary table development principle:
Tabulation principle: same two-element list
Ternary table reference source number: 3
Threshold value is distributed: first is the threshold value of reference source 1; Second is the threshold value of reference source 2; The 3rd is the threshold value of reference source 3; The 4th is the threshold value of reference source 1-reference source 2; The 5th is the threshold value of reference source 2-reference source 3; The 6th is the threshold value of reference source 1-reference source 3.
Four kinds of table types:
1, tracing source+independent source+slave board crystal oscillator
For example: " 2-212-21 " mainboard crystal oscillator can't the track reference source, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: reference source 1 is bad.
" 11-2122 " mainboard crystal oscillator is followed the tracks of normal, slave board crystal oscillator losing lock.
Alarm: the slave board crystal oscillator is bad.
" 222122 " mainboard crystal oscillator can't the track reference source, and tracing source is in slave board crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
2, two independent source+slave board crystal oscillators
For example: " 22-3133 " active and standby plate losing lock, independent source is in mainboard crystal oscillator lock-in range.
Alarm: the slave board crystal oscillator is bad.
" 332122 " active and standby plate losing lock, independent source is in to the crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
3, tracing source+two independent source
For example: " 2-2-2212 " mainboard crystal oscillator can't the track reference source, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: reference source 1 is bad.
" 222111 " mainboard crystal oscillator can't the track reference source, and independent source is not in mainboard crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
4, three independent sources
For example: " 2-222-21 " independent source is in mainboard crystal oscillator lock-in range, and the clock source is inconsistent.
Alarm: the source is inconsistent.
" 333111 " independent source is not in mainboard crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
Quaternary table development principle:
Tabulation principle: same two-element list
Quaternary table reference source number: 4
Threshold value is distributed: first is the threshold value of reference source 1; Second is the threshold value of reference source 2; The 3rd is the threshold value of reference source 3; The 4th is the threshold value of reference source 4; The 5th is the threshold value of reference source 1-reference source 2; The 6th is the threshold value of reference source 1-reference source 3; The 7th is the threshold value of reference source 1-reference source 4; The 8th is the threshold value of reference source 2-reference source 3; The 9th is the threshold value of reference source 2-reference source 4; The tenth is the threshold value of reference source 1-reference source 4.
Four kinds of table types:
1, tracing source+two independent source+slave board crystal oscillator (" * " represents any threshold)
For example: " 2-21-2****** " mainboard crystal oscillator can't the track reference source, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: reference source 1 is bad.
" 1113****** " mainboard crystal oscillator is followed the tracks of normal, slave board crystal oscillator losing lock.
Alarm: the slave board crystal oscillator is bad.
" 2222111*** " mainboard crystal oscillator can't the track reference source, and tracing source is in slave board crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
2, three independent source+slave board crystal oscillators
For example: " 222-211*1** " active and standby plate losing lock, independent source is in mainboard crystal oscillator lock-in range.
Alarm: the slave board crystal oscillator is bad.
" 333111*** " active and standby plate losing lock, independent source is in to the crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
3, tracing source+three independent source
For example: " 2-2-22****** " mainboard crystal oscillator can't the track reference source, and independent source is in mainboard crystal oscillator lock-in range.
Alarm: reference source 1 is bad.
" 2222111111 " mainboard crystal oscillator can't the track reference source, and independent source is not in mainboard crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
4, four independent sources
For example: " 2-222****** " independent source is in mainboard crystal oscillator lock-in range, and the clock source is inconsistent.
Alarm: the source is inconsistent.
" 333111**** " independent source is not in mainboard crystal oscillator lock-in range.
Alarm: the mainboard crystal oscillator is bad.
Warning content:
Tracing source and crystal oscillator quality situation according to decisional table is judged need report a series of alarms and relevant treatment, have listed 25 kinds of alarms altogether according to various situations in the decisional table.
The realization of present embodiment software module part:
The software major function is to select corresponding decisional table according to present clock source situation, according to the offset frequency situation allocation threshold in each clock source, is searching processing method according to threshold value in decisional table.
Decisional table is divided into four kinds by type, in software respectively with: 0 the representative no tracing source, no slave board; 1 representative has tracing source, no slave board; The no tracing source of 2 representatives has slave board; 3 representatives have tracing source, and slave board is arranged.Every type of decisional table is corresponding respectively: 4 yuan of tables, 3 yuan of tables, 2 yuan of tables.Select decisional table type and dimension according to the situation in clock source, preferentially select 4 yuan of tables, tracing source is arranged, the decisional table of slave board is arranged.
Detection range: the clock source that state exists in the priority list, mainboard crystal oscillator, slave board crystal oscillator.
Select the source principle:
1) if there is a plurality of clocks source to need to detect on the same equipment, then only detects the clock source that priority is the highest and exist.
2) if 4 of clock source less thaies, then the clock source that exists of search is added in the detection list automatically, participates in judging process.
The counting principle: hardware provides 5 counters, wherein preceding 4 clock sources that are used for counting decisional table, last 1 offset frequency situation that is used for counting independent source.If a plurality of independent sources are arranged, then rotating and counting with last counter.Certainly exist 1 variation during counting, for fear of shaking at boundary, it is 1 that twice numeration in front and back differs, and then still previous numeration result is sent to frequency deviation and detects.
The principle of tabling look-up: in order to improve the speed of tabling look-up, as far as possible dwindle the table scale again, so every decisional table is divided into a plurality of little tables.Depositing the result of the different relative value combination in clock source in the little table.
1) searches corresponding little table according to the type of table and the threshold value situation in clock source earlier.
2) in table, search corresponding result according to the threshold value of relative value between each clock source.
For fear of producing wrong judgement in losing lock to locking process, checking result must be passed through multiple times of filtration, as 5 times.
In the present invention, the mask register sum counter is not limited in 5, can increase and reduce according to need; According to the clock number that participates in judgement, decisional table also can be five yuan of tables etc.
Claims (15)
1, a kind of clock source frequency bias detecting method is used for detecting the clock and the crystal oscillator situation of synchronous network system network element device; It is characterized in that comprising step:
A, from the multichannel reference source of network element device, select clock source signals to be measured;
B, with the clock signal of active clock equipment in the network element device as counting clock, respectively to each road clock source signals counting to be measured, and obtain the multiple metering value;
C, respectively with each road count value and preassigned numerical computations difference, with each road count value of calculating relative difference each other, and the frequency offseting value that calculates each difference and relative difference correspondence, wherein, described preassigned numerical value is the count value that the synchronous counting clock of employing and active clock equipment clock counts to get the active clock equipment clock;
D, according to the frequency deviation range under each frequency offseting value, obtain the level threshold value of difference correspondence and the relative threshold of relative difference correspondence;
E, the level threshold value of gained and relative threshold are pressed predefined procedure constitute combined threshold value, and utilize the inquiry of this combined threshold value to comprise the decisional table of combined threshold value and corresponding warning content, obtain the warning content of one of tracing source, active clock equipment crystal oscillator and standby clock equipment crystal oscillator at least;
F, report the frequency offseting value of described warning content and each road tested clock source signals.
2, the method for claim 1, it is characterized in that, when having tracing source and standby clock equipment in the network element device, preferentially select tracing source and standby clock equipment clock, if have a plurality of clocks source to need to detect on the same equipment, then only detect the clock source that priority is the highest and exist.
3 the method for claim 1 is characterized in that, the multichannel reference clock source signal described in the steps A comprises at least and is configured in all clock source signals in the priority list of clock source.
4, method as claimed in claim 3 is characterized in that, when the clock source quantity in the priority list was less than predetermined value, the clock source of search existence was as the reference source automatically.
5, method as claimed in claim 3 is characterized in that, the independent source that comprises in the described clock source signals to be measured is selected by clock source priority list medium priority order from high to low.
6, the method for claim 1, it is characterized in that, when comprising independent source in the clock source signals to be measured, judge further that in step e " the current frequency values of active clock equipment crystal oscillator+independent source frequency offseting value " is whether in the lock-in range of active clock equipment crystal oscillator, if, determine that then this independent source is normal, otherwise, determine that this independent source frequency deviation is excessive; And in step F, report judged result.
7, method as claimed in claim 3 is characterized in that, when not being selected for the independent source that participates in the inquiry judging table in the priority list of clock source in addition:
In step B, also described independent source signal is taken turns flow accounting;
In step C, also the described count value that counts to get in turn and preassigned numeric ratio are obtained the frequency offseting value of each road independent source;
In step e, also determine that according to the frequency offseting value of the current frequency values of active clock equipment crystal oscillator+described each road independent source independent source is whether in the lock-in range of active clock equipment crystal oscillator, if, determine that then this independent source is normal, otherwise, determine that this independent source frequency deviation is excessive;
In step F, report judged result and frequency offseting value to these independent sources.
8, the method for claim 1 is characterized in that, steps A comprises step:
A1, multipath clock source signal frequency division is obtained the multichannel low frequency signal;
A2, from the multichannel low frequency signal, select clock source signals to be measured.
9, as claim 1 or 8 described methods, it is characterized in that, among the step B, with behind the output clock division of active clock equipment crystal oscillator as counting clock.
10, the method for claim 1 is characterized in that, described decisional table utilizes majority voting, phase-locked loop characteristics and system clock processing method characteristic comprehensively to form.
11, as claim 1 or 10 described methods, it is characterized in that described decisional table is divided into according to tracing source and standby clock equipment situation has tracing source to have standby clock equipment, no tracing source that standby clock equipment is arranged, have tracing source not have standby clock equipment, no tracing source does not have four types of standby clock equipment.
12, method as claimed in claim 11 is characterized in that, every type decisional table is divided into binary, ternary, quaternary decisional table and polynary judgement table by the number that participates in judgement clock source.
13, method as claimed in claim 12 is characterized in that, described each decisional table is made up of the identical little table of a plurality of structures, and described little table is being deposited the alarm of the different relative threshold combination in clock source.
14, method as claimed in claim 12 is characterized in that, when inquiring about described decisional table, at first according to the type selecting decisional table type in clock source, selects the dimension of decisional table according to the number in clock source.
15, method as claimed in claim 14 is characterized in that, preferentially selects 4 yuan of decisional tables or/and tracing source is arranged, the decisional table of slave board is arranged.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03144068 CN100488082C (en) | 2003-07-28 | 2003-07-28 | Clock source frequency shift detecting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03144068 CN100488082C (en) | 2003-07-28 | 2003-07-28 | Clock source frequency shift detecting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1578197A CN1578197A (en) | 2005-02-09 |
| CN100488082C true CN100488082C (en) | 2009-05-13 |
Family
ID=34579580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03144068 Expired - Fee Related CN100488082C (en) | 2003-07-28 | 2003-07-28 | Clock source frequency shift detecting method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100488082C (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7539200B2 (en) | 2005-04-27 | 2009-05-26 | Agere Systems Inc. | Line-timing in packet-based networks |
| CN102062817B (en) * | 2009-11-13 | 2015-05-20 | 中兴通讯股份有限公司 | Frequency offset detection method and device for crystal oscillator of electronic product |
| CN102480327B (en) * | 2010-11-24 | 2014-04-09 | 中兴通讯股份有限公司 | Method and device for quick inspection of frequency deviation states of clock boards |
| CN103049038B (en) * | 2011-10-17 | 2015-10-14 | 卡斯柯信号有限公司 | The hardware clock synchronizing circuit of two security systems is got for three |
| CN102680782A (en) * | 2012-06-08 | 2012-09-19 | 东莞市翔丰电子科技实业有限公司 | Method for calculating high-frequency signal frequency by utilizing low-frequency clock source |
| CN103312307B (en) * | 2013-05-13 | 2015-12-02 | 华为技术有限公司 | Clock frequency deviation detection method and device |
| CN104518839B (en) * | 2013-09-30 | 2017-06-27 | 华为技术有限公司 | frequency deviation detection method and device |
| CN104283740A (en) * | 2014-10-23 | 2015-01-14 | 天津市德力电子仪器有限公司 | Method for online measurement of Ethernet frequency deviation |
| CN110690894B (en) * | 2019-09-20 | 2023-05-12 | 上海励驰半导体有限公司 | Clock failure safety protection method and circuit |
| CN112887122B (en) * | 2019-11-29 | 2022-11-04 | 华为技术有限公司 | Clock fault positioning method and network equipment |
| CN112838861B (en) * | 2020-12-31 | 2022-08-26 | 广东大普通信技术股份有限公司 | Clock locking method, device, equipment and storage medium |
| CN113098650B (en) * | 2021-03-29 | 2023-07-25 | 大连市共进科技有限公司 | Time deviation measuring method, apparatus, communication device and readable storage medium |
| CN118393968B (en) * | 2024-06-24 | 2024-09-13 | 杭州胜金微电子有限公司 | Clock detection and control circuit |
-
2003
- 2003-07-28 CN CN 03144068 patent/CN100488082C/en not_active Expired - Fee Related
Non-Patent Citations (8)
| Title |
|---|
| "SDH光通信设备工程测试". 杨会峰.电力系统通信，第3期. 2003 |
| "一种SDH光纤传输系统设备时钟的研究与实现". 史国炜，王治，王峰等.航空计测技术，第20卷第5期. 2000 |
| "江苏高速公路通信时钟同步网的设计". 柏长冰，陈启美，常飞等.公路交通科技，第20卷第3期. 2003 |
| "通信网时钟同步方案". 张华清.北京广播学院学报，第2期. 1999 |
| "SDH光通信设备工程测试". 杨会峰.电力系统通信，第3期. 2003 * |
| "一种SDH光纤传输系统设备时钟的研究与实现". 史国炜，王治，王峰等.航空计测技术，第20卷第5期. 2000 * |
| "江苏高速公路通信时钟同步网的设计". 柏长冰，陈启美，常飞等.公路交通科技，第20卷第3期. 2003 * |
| "通信网时钟同步方案". 张华清.北京广播学院学报，第2期. 1999 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1578197A (en) | 2005-02-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100488082C (en) | Clock source frequency shift detecting method | |
| EP1675267B1 (en) | Periodic electrical signal frequency monitoring systems and methods | |
| US3303462A (en) | Error detection in duobinary data systems | |
| CN103777072B (en) | The method being monitored to the clock frequency of multiple clock sources | |
| KR950005940B1 (en) | Clock monitoring circuit | |
| US6907553B2 (en) | Method and apparatus for estimation of error in data recovery schemes | |
| US10789148B2 (en) | Electronic device and method for event logging | |
| US7089462B2 (en) | Early clock fault detection method and circuit for detecting clock faults in a multiprocessing system | |
| CN104518839A (en) | Frequency deviation detecting method and device | |
| CN104579455B (en) | A kind of multiple data channel of satellite-borne data transmission transmitter independently selects processing unit | |
| CN108206707B (en) | Frequency offset test system and method for power line carrier communication unit | |
| US7512854B2 (en) | Method and apparatus for testing, characterizing and monitoring a chip interface using a second data path | |
| US6282173B1 (en) | Processing apparatus for measuring performance monitoring parameters | |
| US20020008548A1 (en) | Device for detecting abnormality of clock signal | |
| CN111431760B (en) | Method for measuring bandwidth utilization rate of port in switching chip | |
| US7126986B2 (en) | Method and system for improved phase tracking | |
| JPH04326410A (en) | Clock monitor device | |
| WO2006057779A1 (en) | Frequency to digital conversion | |
| CN101010908A (en) | Supervising arrangement | |
| JPH04178047A (en) | Skew compensation system | |
| RU2800031C1 (en) | Calibration scheme, memory and calibration method | |
| US20040086063A1 (en) | Apparatus and method for dynamically adjusting receiver bandwidth | |
| CN110460329B (en) | Fault-oriented phase-locked loop test circuit | |
| SU1499489A1 (en) | Self-check computing device | |
| KR940011751B1 (en) | Es detective circuit of transmitting system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090513 Termination date: 20160728 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |