AU7039398A - Addressing scheme for doubling the transmission capacity of a master-controlled slave-to-slave communication in any kind of bus system - Google Patents
Addressing scheme for doubling the transmission capacity of a master-controlled slave-to-slave communication in any kind of bus systemInfo
- Publication number
- AU7039398A AU7039398A AU70393/98A AU7039398A AU7039398A AU 7039398 A AU7039398 A AU 7039398A AU 70393/98 A AU70393/98 A AU 70393/98A AU 7039398 A AU7039398 A AU 7039398A AU 7039398 A AU7039398 A AU 7039398A
- Authority
- AU
- Australia
- Prior art keywords
- slave
- doubling
- master
- bus system
- transmission capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
- G06F13/4213—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP1998/001644 WO1999049397A1 (en) | 1998-03-20 | 1998-03-20 | Addressing scheme for doubling the transmission capacity of a master-controlled slave-to-slave communication in any kind of bus system |
Publications (1)
Publication Number | Publication Date |
---|---|
AU7039398A true AU7039398A (en) | 1999-10-18 |
Family
ID=8166912
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU70393/98A Abandoned AU7039398A (en) | 1998-03-20 | 1998-03-20 | Addressing scheme for doubling the transmission capacity of a master-controlled slave-to-slave communication in any kind of bus system |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0983555A1 (en) |
AU (1) | AU7039398A (en) |
WO (1) | WO1999049397A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19733906C2 (en) * | 1997-08-05 | 1999-09-30 | Siemens Ag | Method for automatic address assignment, bus system for automatic address assignment and communication participants that can be used in the bus system or in the context of the method |
US7809873B2 (en) | 2008-04-11 | 2010-10-05 | Sandisk Il Ltd. | Direct data transfer between slave devices |
US9892077B2 (en) * | 2013-10-07 | 2018-02-13 | Qualcomm Incorporated | Camera control interface slave device to slave device communication |
WO2019090145A1 (en) * | 2017-11-03 | 2019-05-09 | Qualcomm Incorporated | Radio frequency front end devices with masked write |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4001790A (en) * | 1975-06-30 | 1977-01-04 | Honeywell Information Systems, Inc. | Modularly addressable units coupled in a data processing system over a common bus |
DE3240141A1 (en) * | 1982-10-29 | 1984-05-03 | Loewe Opta Gmbh, 8640 Kronach | Method and circuit arrangement for the pictorial representation of texts, graphics and symbols on screens of monitors and/or by means of dot-controlled printers |
US5649142A (en) * | 1991-10-24 | 1997-07-15 | Intel Corporation | Method and apparatus for translating addresses using mask and replacement value registers and for accessing a service routine in response to a page fault |
-
1998
- 1998-03-20 AU AU70393/98A patent/AU7039398A/en not_active Abandoned
- 1998-03-20 EP EP98917033A patent/EP0983555A1/en not_active Ceased
- 1998-03-20 WO PCT/EP1998/001644 patent/WO1999049397A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
WO1999049397A1 (en) | 1999-09-30 |
EP0983555A1 (en) | 2000-03-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |