AU6636174A - Addressing memory arrangement and control process corresponding thereto - Google Patents

Addressing memory arrangement and control process corresponding thereto

Info

Publication number
AU6636174A
AU6636174A AU66361/74A AU6636174A AU6636174A AU 6636174 A AU6636174 A AU 6636174A AU 66361/74 A AU66361/74 A AU 66361/74A AU 6636174 A AU6636174 A AU 6636174A AU 6636174 A AU6636174 A AU 6636174A
Authority
AU
Australia
Prior art keywords
control process
process corresponding
memory arrangement
addressing memory
addressing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU66361/74A
Other versions
AU489616B2 (en
Inventor
Barka Raymond
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Application granted granted Critical
Publication of AU6636174A publication Critical patent/AU6636174A/en
Publication of AU489616B2 publication Critical patent/AU489616B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/06—Time-space-time switching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
AU66361/74A 1973-03-21 1974-03-06 Addressing memory arrangement and control process corresponding thereto Expired AU489616B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR7310144A FR2222727B1 (en) 1973-03-21 1973-03-21
FRFR7310144 1973-03-21

Publications (2)

Publication Number Publication Date
AU6636174A true AU6636174A (en) 1975-09-11
AU489616B2 AU489616B2 (en) 1975-09-11

Family

ID=

Also Published As

Publication number Publication date
FR2222727B1 (en) 1977-04-29
DE2413224C2 (en) 1982-06-03
FR2222727A1 (en) 1974-10-18
DE2413224A1 (en) 1974-09-26

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