AU1035492A - A printed circuit board - Google Patents

A printed circuit board

Info

Publication number
AU1035492A
AU1035492A AU10354/92A AU1035492A AU1035492A AU 1035492 A AU1035492 A AU 1035492A AU 10354/92 A AU10354/92 A AU 10354/92A AU 1035492 A AU1035492 A AU 1035492A AU 1035492 A AU1035492 A AU 1035492A
Authority
AU
Australia
Prior art keywords
circuit board
printed circuit
printed
board
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU10354/92A
Other versions
AU640850B2 (en
Inventor
Jonathan Fitch
Ronald Hochsprung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Apple Inc
Original Assignee
Apple Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/025,500 external-priority patent/US4905182A/en
Priority claimed from US07/025,499 external-priority patent/US4931923A/en
Application filed by Apple Computer Inc filed Critical Apple Computer Inc
Publication of AU1035492A publication Critical patent/AU1035492A/en
Application granted granted Critical
Publication of AU640850B2 publication Critical patent/AU640850B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646Configuration or reconfiguration
    • G06F12/0653Configuration or reconfiguration with centralised address assignment
    • G06F12/0661Configuration or reconfiguration with centralised address assignment and decentralised selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
AU10354/92A 1987-03-13 1992-01-21 A printed circuit board Ceased AU640850B2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US07/025,500 US4905182A (en) 1987-03-13 1987-03-13 Self-configuring memory management system with on card circuitry for non-contentious allocation of reserved memory space among expansion cards
US025500 1987-03-13
US025499 1987-03-13
US07/025,499 US4931923A (en) 1987-03-13 1987-03-13 Computer system for automatically reconfigurating memory space to avoid overlaps of memory reserved for expansion slots

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
AU12769/88A Division AU616171B2 (en) 1987-03-13 1988-03-08 Computer with expansion slots for cards and card for computer with expansion slots

Publications (2)

Publication Number Publication Date
AU1035492A true AU1035492A (en) 1992-03-12
AU640850B2 AU640850B2 (en) 1993-09-02

Family

ID=26699830

Family Applications (2)

Application Number Title Priority Date Filing Date
AU12769/88A Ceased AU616171B2 (en) 1987-03-13 1988-03-08 Computer with expansion slots for cards and card for computer with expansion slots
AU10354/92A Ceased AU640850B2 (en) 1987-03-13 1992-01-21 A printed circuit board

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AU12769/88A Ceased AU616171B2 (en) 1987-03-13 1988-03-08 Computer with expansion slots for cards and card for computer with expansion slots

Country Status (7)

Country Link
JP (1) JPS63314657A (en)
KR (1) KR950014182B1 (en)
CN (1) CN1017007B (en)
AU (2) AU616171B2 (en)
DE (1) DE3808193A1 (en)
FR (1) FR2612314B1 (en)
IL (1) IL85518A0 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2203869B (en) * 1987-04-17 1991-10-23 Apple Computer Computer resource configuration method and apparatus
CN101321250B (en) * 2008-07-03 2010-06-02 四川长虹电器股份有限公司 Television set important data storage method
US10146253B2 (en) * 2016-03-10 2018-12-04 Epro Gmbh Combined slot and backplane identification

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3675083A (en) * 1970-09-14 1972-07-04 Digital Equipment Corp Universal bus arrangement for data processing systems
GB2060961A (en) * 1979-10-10 1981-05-07 Magnuson Computer Systems Inc Data processing system having memory modules with distributed address information
US4373181A (en) * 1980-07-30 1983-02-08 Chisholm Douglas R Dynamic device address assignment mechanism for a data processing system
GB2101370A (en) * 1981-06-26 1983-01-12 Philips Electronic Associated Digital data apparatus with memory interrogation
GB2103397A (en) * 1981-07-31 1983-02-16 Philips Electronic Associated Digital data aparatus with memory selection
US5067071A (en) * 1985-02-27 1991-11-19 Encore Computer Corporation Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus

Also Published As

Publication number Publication date
JPS63314657A (en) 1988-12-22
FR2612314B1 (en) 1991-11-22
IL85518A0 (en) 1988-08-31
CN88101358A (en) 1988-09-21
CN1017007B (en) 1992-06-10
FR2612314A1 (en) 1988-09-16
AU640850B2 (en) 1993-09-02
KR950014182B1 (en) 1995-11-22
AU616171B2 (en) 1991-10-24
DE3808193A1 (en) 1988-09-22
AU1276988A (en) 1988-09-15
KR880011668A (en) 1988-10-29

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