Skip to content
View zhuanshulz's full-sized avatar
6 followers · 19 following

Block or report zhuanshulz

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
zhuanshulz/README.md
  • 👋 Hi, I’m @zhuanshulz

Im a student majoring microarchitecture. Using verilog language mainly and C/C++, Python, Chisel from time to time.

Pinned Loading

  1. mul_RV32I mul_RV32I Public

    Using RISCV Integer Instruction Set to Finish Unsigned Multiplication Operation.

    C

  2. RV32_chisel RV32_chisel Public

    基于chisel语言编写的RISCV微处理器核，仅支持RV32I指令级，无特权级。

    C 2

  3. RV32I_X RV32I_X Public

    C