自制的AD封装库，基于AD20

UVM Testbench For SystemVerilog Combinator Implementation

Stepper motor with multi-function interface and closed loop function. 具有多功能接口和闭环功能的步进电机。

F1C100s with Keil RTX4 + emWin5

Awesome ASIC design verification

🧑‍🏫 60 Implementations/tutorials of deep learning papers with side-by-side notes 📝; including transformers (original, xl, switch, feedback, vit, ...), optimizers (adam, adabelief, sophia, ...), gan…

Automatic Verilog/SystemVerilog verification platform generation, support for one-click simulation

This is the main repository for all the examples for the book Practical UVM

vim config for verilog and systemverilog

This stream transmission protocol is used for data transmission between some fpgas.

F1C100s with Keil RTX4 + emWin5

Build your hardware, easily!

Hardware de la CIAA

Real-time behaviour synthesis with MuJoCo, using Predictive Control

Acceleration for an s-curve shaped speed

constant jerk trajectory generator

CMSIS Software Packs

Lichee Zero: An SD-Size (breadboard-compatible) Cortex-A7 Board

Linux kernel source tree

Arduino ESP32 library to read and write data with FPGA by QSPI.

The course consists of eight labs. The first 5 labs serve as an introductory for FPGA design flow and different circuits that can be built using VHDL code and implemented and FPGA chip. The last th…

Clock Data Recovery | 時鐘數據恢復

FPGA implementation of a CDR targeting a Xilinx Kintex-7 for data rates up to 250 MHz

A Clock and Data Recovery module originally designed for a larger SERDES circuit written in VHDL. Coursework for lab portion of a class.

Eclipse ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications.

Curated list of resources for Embedded and Low-level development in the Rust programming language

Modern embedded framework, using Rust and async.

Klipper is a 3d-printer firmware