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  1. TrivialMIPS TrivialMIPS Public

    Forked from trivialmips/TrivialMIPS

    MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support

    SystemVerilog

  2. tvip-axi tvip-axi Public

    Forked from taichi-ishitani/tvip-axi

    AMBA AXI VIP

    SystemVerilog