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Fix edit conflict in phys/module_surface_driver.F #1144

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merged 1 commit into from
Mar 23, 2020

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janmandel
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@janmandel janmandel commented Mar 22, 2020

TYPE: bug fix

KEYWORDS: remove conflict marker "<<<<<" and ">>>>"

SOURCE: Jan Mandel

DESCRIPTION OF CHANGES:
In the surface driver, we have:

<<<<<<< HEAD
     END IF
  END IF
=======
      ENDIF
  ENDIF
>>>>>>> origin/master

LIST OF MODIFIED FILES:
M phys/module_surface_driver.F

TESTS CONDUCTED:

  1. Jenkins auto testing is PASS

@davegill
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@janmandel
Jan,
It is unlikely that we will want to change the wrf-model develop branch to realign the indenting for a couple of ENDIF statements, as those mods have already been pushed into release-v4.2. Can you just change your local branch to match the wrf-model develop branch?

@janmandel
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janmandel commented Mar 23, 2020 via email

@davegill davegill self-requested a review March 23, 2020 13:42
@davegill
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@janmandel
Jan,
NOW I understand.
Would you post the text of your email from Jenkins (not the attachment) in one of these lower comments.
Thank you very much for jumping on this!

@davegill
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@janmandel
Yep, your fix seems good.

==========================================================================
build started:   Mon Mar 23 13:51:22 UTC 2020
build completed: Mon Mar 23 13:59:15 UTC 2020
 
--->                  Executables successfully built                  <---
 
-rwxr-xr-x 1 root root 67038496 Mar 23 13:59 main/ndown.exe
-rwxr-xr-x 1 root root 66916664 Mar 23 13:59 main/real.exe
-rwxr-xr-x 1 root root 66115552 Mar 23 13:59 main/tc.exe
-rwxr-xr-x 1 root root 77223008 Mar 23 13:58 main/wrf.exe
 
==========================================================================
mmm-docker:/root/WRF_develop-jan>git remote -v
origin	https://github.com/wrf-sfire/WRF (fetch)
origin	https://github.com/wrf-sfire/WRF (push)
mmm-docker:/root/WRF_develop-jan>git branch
* WRF/develop
  master

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approved

@davegill davegill merged commit 877c17c into wrf-model:develop Mar 23, 2020
@janmandel
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From Jenkins:

Please find result of the WRF regression test cases in the attachment. This build is for Commit ID: 92b087c, requested by: janmandel for PR: #1144. For any query please send e-mail to David Gill.

Test Type              | Expected  | Received |  Failed
= = = = = = = = = = = = = = = = = = = = = = = =  = = = =
Number of Tests        : 10           10
Number of Builds       : 23           23
Number of Simulations  : 158           158         158
Number of Comparisons  : 101           0         0

Failed Simulations are: 
output_1:1 = STATUS test_001s em em_real 32 03

output_1:1 = STATUS test_001s em em_real 32 03DF
output_1:1 = STATUS test_001s em em_real 32 03FD
output_1:1 = STATUS test_001s em em_real 32 06
output_1:1 = STATUS test_001s em em_real 32 07NE
output_1:1 = STATUS test_001s em em_real 32 10
output_1:1 = STATUS test_001s em em_real 32 11
output_1:1 = STATUS test_001s em em_real 32 14
output_1:1 = STATUS test_001s em em_real 32 16
output_1:1 = STATUS test_001s em em_real 32 16DF
output_1:1 = STATUS test_001s em em_real 32 17
output_1:1 = STATUS test_001s em em_real 32 17AD
output_1:1 = STATUS test_001s em em_real 32 18
output_1:1 = STATUS test_001s em em_real 32 20
output_1:1 = STATUS test_001s em em_real 32 20NE
output_1:1 = STATUS test_001s em em_real 32 38
output_1:1 = STATUS test_001s em em_real 32 48
output_1:1 = STATUS test_001s em em_real 32 49
output_1:1 = STATUS test_001s em em_real 32 50
output_1:1 = STATUS test_001s em em_real 32 51
output_1:1 = STATUS test_001s em em_real 32 52
output_1:1 = STATUS test_001s em em_real 32 52DF
output_1:1 = STATUS test_001s em em_real 32 52FD
output_1:1 = STATUS test_001s em em_real 32 60
output_1:1 = STATUS test_001s em em_real 32 60NE
output_1:1 = STATUS test_001s em em_real 32 65DF
output_1:1 = STATUS test_001s em em_real 32 66FD
output_1:1 = STATUS test_001s em em_real 32 71
output_1:1 = STATUS test_001s em em_real 32 78
output_1:1 = STATUS test_001s em em_real 32 79
output_1:1 = STATUS test_001s em em_real 32 3dtke
output_1:1 = STATUS test_001s em em_real 32 cesm
output_1:1 = STATUS test_001s em em_real 32 conus
output_1:1 = STATUS test_001s em em_real 32 rap
output_1:1 = STATUS test_001s em em_real 32 tropical
output_1:1 = STATUS test_001o em em_real 33 03
output_1:1 = STATUS test_001o em em_real 33 03DF
output_1:1 = STATUS test_001o em em_real 33 03FD
output_1:1 = STATUS test_001o em em_real 33 06
output_1:1 = STATUS test_001o em em_real 33 07NE
output_1:1 = STATUS test_001o em em_real 33 10
output_1:1 = STATUS test_001o em em_real 33 11
output_1:1 = STATUS test_001o em em_real 33 14
output_1:1 = STATUS test_001o em em_real 33 16
output_1:1 = STATUS test_001o em em_real 33 16DF
output_1:1 = STATUS test_001o em em_real 33 17
output_1:1 = STATUS test_001o em em_real 33 17AD
output_1:1 = STATUS test_001o em em_real 33 18
output_1:1 = STATUS test_001o em em_real 33 20
output_1:1 = STATUS test_001o em em_real 33 20NE
output_1:1 = STATUS test_001o em em_real 33 38
output_1:1 = STATUS test_001o em em_real 33 48
output_1:1 = STATUS test_001o em em_real 33 49
output_1:1 = STATUS test_001o em em_real 33 50
output_1:1 = STATUS test_001o em em_real 33 51
output_1:1 = STATUS test_001o em em_real 33 52
output_1:1 = STATUS test_001o em em_real 33 52DF
output_1:1 = STATUS test_001o em em_real 33 52FD
output_1:1 = STATUS test_001o em em_real 33 60
output_1:1 = STATUS test_001o em em_real 33 60NE
output_1:1 = STATUS test_001o em em_real 33 65DF
output_1:1 = STATUS test_001o em em_real 33 66FD
output_1:1 = STATUS test_001o em em_real 33 71
output_1:1 = STATUS test_001o em em_real 33 78
output_1:1 = STATUS test_001o em em_real 33 79
output_1:1 = STATUS test_001o em em_real 33 3dtke
output_1:1 = STATUS test_001o em em_real 33 cesm
output_1:1 = STATUS test_001o em em_real 33 conus
output_1:1 = STATUS test_001o em em_real 33 rap
output_1:1 = STATUS test_001o em em_real 33 tropical
output_1:1 = STATUS test_001m em em_real 34 03
output_1:1 = STATUS test_001m em em_real 34 03DF
output_1:1 = STATUS test_001m em em_real 34 03FD
output_1:1 = STATUS test_001m em em_real 34 06
output_1:1 = STATUS test_001m em em_real 34 07NE
output_1:1 = STATUS test_001m em em_real 34 10
output_1:1 = STATUS test_001m em em_real 34 11
output_1:1 = STATUS test_001m em em_real 34 14
output_1:1 = STATUS test_001m em em_real 34 16
output_1:1 = STATUS test_001m em em_real 34 16DF
output_1:1 = STATUS test_001m em em_real 34 17
output_1:1 = STATUS test_001m em em_real 34 17AD
output_1:1 = STATUS test_001m em em_real 34 18
output_1:1 = STATUS test_001m em em_real 34 20
output_1:1 = STATUS test_001m em em_real 34 20NE
output_1:1 = STATUS test_001m em em_real 34 38
output_1:1 = STATUS test_001m em em_real 34 48
output_1:1 = STATUS test_001m em em_real 34 49
output_1:1 = STATUS test_001m em em_real 34 50
output_1:1 = STATUS test_001m em em_real 34 51
output_1:1 = STATUS test_001m em em_real 34 52
output_1:1 = STATUS test_001m em em_real 34 52DF
output_1:1 = STATUS test_001m em em_real 34 52FD
output_1:1 = STATUS test_001m em em_real 34 60
output_1:1 = STATUS test_001m em em_real 34 60NE
output_1:1 = STATUS test_001m em em_real 34 65DF
output_1:1 = STATUS test_001m em em_real 34 66FD
output_1:1 = STATUS test_001m em em_real 34 71
output_1:1 = STATUS test_001m em em_real 34 78
output_1:1 = STATUS test_001m em em_real 34 79
output_1:1 = STATUS test_001m em em_real 34 3dtke
output_1:1 = STATUS test_001m em em_real 34 cesm
output_1:1 = STATUS test_001m em em_real 34 conus
output_1:1 = STATUS test_001m em em_real 34 rap
output_1:1 = STATUS test_001m em em_real 34 tropical
output_10:1 = STATUS test_010s hill em_hill2d_x 32 01
output_2:1 = STATUS test_002m hwrf nmm_real 34 1NE
output_2:1 = STATUS test_002m hwrf nmm_real 34 2NE
output_2:1 = STATUS test_002m hwrf nmm_real 34 3NE
output_3:1 = STATUS test_003s chem em_real 32 1
output_3:1 = STATUS test_003s chem em_real 32 2
output_3:1 = STATUS test_003s chem em_real 32 5
output_3:1 = STATUS test_003m chem em_real 34 1
output_3:1 = STATUS test_003m chem em_real 34 2
output_3:1 = STATUS test_003m chem em_real 34 5
output_4:1 = STATUS test_004s qss em_quarter_ss 32 02NE
output_4:1 = STATUS test_004s qss em_quarter_ss 32 03
output_4:1 = STATUS test_004s qss em_quarter_ss 32 03NE
output_4:1 = STATUS test_004s qss em_quarter_ss 32 04
output_4:1 = STATUS test_004o qss em_quarter_ss 33 02NE
output_4:1 = STATUS test_004o qss em_quarter_ss 33 03
output_4:1 = STATUS test_004o qss em_quarter_ss 33 03NE
output_4:1 = STATUS test_004o qss em_quarter_ss 33 04
output_4:1 = STATUS test_004m qss em_quarter_ss 34 02NE
output_4:1 = STATUS test_004m qss em_quarter_ss 34 03
output_4:1 = STATUS test_004m qss em_quarter_ss 34 03NE
output_4:1 = STATUS test_004m qss em_quarter_ss 34 04
output_5:1 = STATUS test_005s bwave em_b_wave 32 1NE
output_5:1 = STATUS test_005s bwave em_b_wave 32 2
output_5:1 = STATUS test_005s bwave em_b_wave 32 2NE
output_5:1 = STATUS test_005s bwave em_b_wave 32 3
output_5:1 = STATUS test_005o bwave em_b_wave 33 1NE
output_5:1 = STATUS test_005o bwave em_b_wave 33 2
output_5:1 = STATUS test_005o bwave em_b_wave 33 2NE
output_5:1 = STATUS test_005o bwave em_b_wave 33 3
output_5:1 = STATUS test_005m bwave em_b_wave 34 1NE
output_5:1 = STATUS test_005m bwave em_b_wave 34 2
output_5:1 = STATUS test_005m bwave em_b_wave 34 2NE
output_5:1 = STATUS test_005m bwave em_b_wave 34 3
output_6:1 = STATUS test_006s real8 em_real 32 14
output_6:1 = STATUS test_006s real8 em_real 32 17AD
output_6:1 = STATUS test_006o real8 em_real 33 14
output_6:1 = STATUS test_006o real8 em_real 33 17AD
output_6:1 = STATUS test_006m real8 em_real 34 14
output_6:1 = STATUS test_006m real8 em_real 34 17AD
output_7:1 = STATUS test_007s qss8 em_quarter_ss 32 06
output_7:1 = STATUS test_007s qss8 em_quarter_ss 32 08
output_7:1 = STATUS test_007s qss8 em_quarter_ss 32 09
output_7:1 = STATUS test_007o qss8 em_quarter_ss 33 06
output_7:1 = STATUS test_007o qss8 em_quarter_ss 33 08
output_7:1 = STATUS test_007o qss8 em_quarter_ss 33 09
output_7:1 = STATUS test_007m qss8 em_quarter_ss 34 06
output_7:1 = STATUS test_007m qss8 em_quarter_ss 34 08
output_7:1 = STATUS test_007m qss8 em_quarter_ss 34 09
output_8:1 = STATUS test_008m move em_real 34 01
output_9:1 = STATUS test_009s fire em_fire 32 01
output_9:1 = STATUS test_009o fire em_fire 33 01
output_9:1 = STATUS test_009m fire em_fire 34 01
Which comparisons are not bit-for-bit:
None

@smileMchen
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@janmandel
Jan,
Thanks for fixing the problem.
I will take a look further just to figure out why the code can be merged with this unsolved conflict.
Ming

vlakshmanan-scala pushed a commit to scala-computing/WRF that referenced this pull request Apr 4, 2024
…l#1144)

TYPE: bug fix

KEYWORDS: remove conflict marker "<<<<<" and ">>>>"

SOURCE: Jan Mandel (CU Denver)

DESCRIPTION OF CHANGES:
In the surface driver, we have:
```
<<<<<<< HEAD
     END IF
  END IF
=======
      ENDIF
  ENDIF
>>>>>>> origin/master
```

LIST OF MODIFIED FILES:
M       phys/module_surface_driver.F

TESTS CONDUCTED:
1. Jenkins auto testing  is PASS
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3 participants