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Changed data reset in monitor to async which makes it work with ice40
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wd5gnr committed Aug 29, 2018
1 parent 04ebde7 commit cc34018
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Showing 3 changed files with 406 additions and 392 deletions.
25 changes: 19 additions & 6 deletions demos/ice40/demo1/demo.v
Original file line number Diff line number Diff line change
Expand Up @@ -3,11 +3,26 @@ module top(input clk, output LED1, output LED2, output LED3,
output LED4, output LED5, output RS232_Tx, input RS232_Rx);
reg [16:0] count=0;
wire iclk;
reg [3:0] laresetct=0;
wire lareset;

reg por=1;
reg pordone=0;

assign lareset = laresetct==4'b0000 || laresetct==4'b1111;

// Generate a low sync edge on power up
// If you have a user reset you could and/or it in the following assign
assign lareset=por;

always @(posedge clk)
if (pordone==1'b0)
if (por==1'b1)
begin
por<=1'b0;
end
else
begin
por<=1'b1;
pordone<=1'b1;
end



Expand All @@ -22,8 +37,7 @@ module top(input clk, output LED1, output LED2, output LED3,
assign LED2=subcount[4];
assign LED3=subcount[5];
assign LED4=subcount[6];
assign LED5=lareset;
// subcount[7];
assign LED5=subcount[7];



Expand All @@ -46,7 +60,6 @@ module top(input clk, output LED1, output LED2, output LED3,
.uart_XMIT_dataH(RS232_Tx),
.uart_REC_dataH(RS232_Rx));

always @(posedge clk) if (laresetct!=4'b1111) laresetct<=laresetct+4'b0001;

always @(posedge clk) count<={ 0, count[15:0]} +1;

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