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Verilator simulation (RocketConfig default example) crashes on MacOS #1886
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Thanks for debugging this! I think your diagnosis is correct. Can you open a PR with the fix in testchipip? |
Thanks Jerry for taking care of this. There are potentially two ways to fix the issue: *in_valid = tsi->in_valid();
*in_bits = *in_valid ? tsi->in_bits() : 0;
*out_ready = tsi->out_ready(); (as noted above) or else *in_valid = tsi->in_valid();
if (*in_valid) {
*in_bits = tsi->in_bits();
}
*out_ready = tsi->out_ready(); A key assumption for both fixes is that the underlying queue in Which of the two fixes is more appropriate depends on the assumed specification of the |
I previously assumed that all the However, I believe inheritors of |
The same issue triggers a failed assertion on Gentoo Linux (glibc 2.40, verilator 5.024).
|
Background Work
Chipyard Version and Hash
Main/HEAD
Commit: 3a6677b
OS Setup
MacBook Air running Sonoma 14.5 (Apple M2).
Output of
clang --version
is:Apple clang version 15.0.0 (clang-1500.3.9.4)
Target: arm64-apple-darwin23.5.0
Thread model: posix
InstalledDir: /Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin
(I am using clang for compilation, not any version of gcc.)
All software is up-to-date as of 27 May 2024. The RISC-V toolchain and tools have been installed from Homebrew:
I am using
Verilator 5.024 2024-04-05 rev UNKNOWN.REV
albeit with a slight hack to get around Issue 5031 - yes, it is currently troublesome to get verilator working under the latest Sonoma and Clang updates on MacOS 😒.Other Setup
Step 0: Install RISC-V tools via Homebrew (see OS Setup section). Also, install gnu-sed, jq and help2man. Possible other packages that escape me now ...
Step 1: Setting up environment variables. I am using my own handwritten script here due to installing RISC-V tools and toolchain from Homebrew and using a custom-compiled verilator.
Step 2: Patch
common-sim-flags.mk
by removing-std=c++17
fromSIM_CXXFLAGS
. Long story short, we need to compile verilator code with-std=c++20
in order to circumvent Issue 5031 . My patched verilator does that, but this is for a different issue.Step 3: Enter
sims/verilator
and runmake
.Step 4: Run the verilator simulation executable. I.e.,
assuming that rv64ui-p-simple (from riscv-tests is located in the current directory.
Current Behavior
On my system, this results in an immediate Segmentation Fault.
Attached is a relevant extract from the MacOS Diagnostic report.
Expected Behavior
Perform simulation and do not crash.
Other Information
I have already debugged and somewhat fixed the issue. The culprit, as can be seen from the stack trace, is
The code:
(see https://github.com/ucb-bar/testchipip/blob/104df6a81fd989cd4cad69b699894664fcf93c05/src/main/resources/testchipip/csrc/SimTSI.cc#L59-L61) is unsafe.
tsi->in_bits();
implicitly calls thestd::queue::front()
method/function whose behavior is undefined if the queue is empty. Hence, replace the above, for instance, byto avoid the crash. (The above code is not thread-safe though, perhaps it does not need to be ...)
Note: I have not tried if this is an issue under Ubuntu/Linux. My suspicion is that there, the program would just continue with some arbitrary value for
*in_bits
. Semantically, anything can happen once we enter undefined behavior, so the above fix is advised either way!PS: I apologize for just realizing that this bug report may have been better submitted in the testchipip repository.
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