Algorithms for automatic layout PCBs and Schematics
For routing algorithms, see @tscircuit/routing
The main autolayout algorithm we're working on currently focuses on schematic layout and determines which of the following scenarios is the best fit:
- Row layout (a simple row, e.g. multiple passives)
- Column layout (a simple column, e.g. multiple passives)
- Central LR bug with ascending columns
In this stage, ports are aligned for the layout is adjusted for general orderly-ness.
- Port alignment
- Central LR Bug Only: Shift columns downward where the adjacent colum has the same bottom net