pronoym99 / PN-Sequence-Generator Star 2 Code Issues Pull requests This is a simulation based VHDL code developed in Xilinx to demonstrate a 4-bit PN sequence generator. simulation vhdl xilinx sequence vhdl-verification vhdl-modules sequence-generation vhdl-code vhdl-examples vhdl-coursework Updated Nov 6, 2018 C++
ElecGeek / MultiSignalGene Star 0 Code Issues Pull requests Discussions Generates multi channels sounds from primitives state-machine algorithms stl cplusplus-14 cplusplus-11 jackaudio cplusplus-17 vhdl-code cordic-algorithm wavegenerator Updated Jul 3, 2024 C++
SamsonAdem / HW_SW_Co_Design_FPGA Star 0 Code Issues Pull requests Hardware accelerator for Image processing in FPGA cpp hardware vhdl image-processing xilinx-fpga median-filter vhdl-code hardwareaccelerator vitis-hls Updated Oct 3, 2023 C++