printf: Use inttype.h macros for format strings

DJGPP for compiling DOS has other sizes for the normal int types and
therefore throwing errors when using %i %d or %x with uint32_t.

Fix these warnings by using the macros created for it and provided in
inttypes.h.

Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d
Signed-off-by: Thomas Heijligen <[email protected]>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73040
Reviewed-by: Anastasia Klimchuk <[email protected]>
Tested-by: build bot (Jenkins) <[email protected]>

atavia.c

@@ -166,7 +166,7 @@ static int atavia_init(const struct programmer_cfg *cfg)
  pci_write_long(dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK);
  default_delay(90);
  uint32_t base = pci_read_long(dev, PCI_ROM_ADDRESS);
- msg_pdbg2("BROM base=0x%08x\n", base);
+ msg_pdbg2("BROM base=0x%08"PRIx32"\n", base);
  if ((base & PCI_ROM_ADDRESS_MASK) == 0) {
  msg_pwarn("Controller thinks there is no ROM attached.\n");
  }

board_enable.c

@@ -672,7 +672,7 @@ int it8705f_write_enable(uint8_t port)
  */
  ret = 1;
  }
- msg_pdbg("Maximum IT8705F parallel flash decode size is %u.\n",
+ msg_pdbg("Maximum IT8705F parallel flash decode size is %"PRIu32".\n",
  max_rom_decode.parallel);
  if (ret) {
  msg_pinfo("Not enabling IT8705F flash write.\n");

cbtable.c

@@ -159,7 +159,7 @@ static int lb_header_valid(struct lb_header *head, unsigned long addr)
  msg_pdbg("Found candidate at: %08lx-%08lx\n",
  addr, addr + sizeof(*head) + head->table_bytes);
  if (head->header_bytes != sizeof(*head)) {
- msg_perr("Header bytes of %d are incorrect.\n",
+ msg_perr("Header bytes of %"PRId32" are incorrect.\n",
  head->header_bytes);
  return 0;
  }
@@ -175,12 +175,12 @@ static int lb_table_valid(struct lb_header *head, struct lb_record *recs)
 {
  if (compute_checksum(recs, head->table_bytes)
  != head->table_checksum) {
- msg_perr("Bad table checksum: %04x.\n",
+ msg_perr("Bad table checksum: %04"PRIx32".\n",
  head->table_checksum);
  return 0;
  }
  if (count_lb_records(head) != head->table_entries) {
- msg_perr("Bad record count: %d.\n",
+ msg_perr("Bad record count: %"PRId32".\n",
  head->table_entries);
  return 0;
  }
@@ -352,7 +352,7 @@ int cb_parse_table(const char **vendor, const char **model)
  (unsigned long)lb_table - (unsigned long)table_area + start);
  rec = (struct lb_record *)(((char *)lb_table) + lb_table->header_bytes);
  last = (struct lb_record *)(((char *)rec) + lb_table->table_bytes);
- msg_pdbg("coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n",
+ msg_pdbg("coreboot header(%"PRId32") checksum: %04"PRIx32" table(%"PRId32") checksum: %04"PRIx32" entries: %"PRId32"\n",
  lb_table->header_bytes, lb_table->header_checksum,
  lb_table->table_bytes, lb_table->table_checksum,
  lb_table->table_entries);

chipset_enable.c

@@ -550,7 +550,7 @@ static int enable_flash_ich_fwh_decode(const struct programmer_cfg *cfg, struct
  }
  }
  max_rom_decode.fwh = min(max_decode_fwh_idsel, max_decode_fwh_decode);
- msg_pdbg("Maximum FWH chip size: 0x%x bytes\n", max_rom_decode.fwh);
+ msg_pdbg("Maximum FWH chip size: 0x%"PRIx32" bytes\n", max_rom_decode.fwh);
 
  return 0;
 }
@@ -625,7 +625,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
  break;
  }
 
- msg_pdbg("%s = 0x%x: ", reg_name, gcs);
+ msg_pdbg("%s = 0x%"PRIx32": ", reg_name, gcs);
  msg_pdbg("BIOS Interface Lock-Down: %sabled, ", bild ? "en" : "dis");
 
  struct boot_straps {
@@ -774,7 +774,7 @@ static int enable_flash_ich_spi(const struct programmer_cfg *cfg, struct pci_dev
 {
  /* Get physical address of Root Complex Register Block */
  uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000;
- msg_pdbg("Root Complex Register Block address = 0x%x\n", rcra);
+ msg_pdbg("Root Complex Register Block address = 0x%"PRIx32"\n", rcra);
 
  /* Map RCBA to virtual memory */
  void *rcrb = rphysmap("ICH RCRB", rcra, 0x4000);
@@ -958,7 +958,7 @@ static int enable_flash_pch100_or_c620(const struct programmer_cfg *cfg,
  void *const spibar = rphysmap("SPIBAR", phys_spibar, 0x1000);
  if (spibar == ERROR_PTR)
  goto _freepci_ret;
- msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08x)\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
+ msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08"PRIx32")\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
 
  /* This adds BUS_SPI */
  const int ret_spi = ich_init_spi(cfg, spibar, pch_generation);
@@ -1050,7 +1050,7 @@ static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_
 
  /* Get physical address of Root Complex Register Block */
  uint32_t rcba = pci_read_long(dev, 0xf0) & 0xfffffc00;
- msg_pdbg("Root Complex Register Block address = 0x%x\n", rcba);
+ msg_pdbg("Root Complex Register Block address = 0x%"PRIx32"\n", rcba);
 
  /* Handle GCS (in RCRB) */
  void *rcrb = physmap("BYT RCRB", rcba, 4);
@@ -1068,7 +1068,7 @@ static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_
 
  /* Get physical address of SPI Base Address and map it */
  uint32_t sbase = pci_read_long(dev, 0x54) & 0xfffffe00;
- msg_pdbg("SPI_BASE_ADDRESS = 0x%x\n", sbase);
+ msg_pdbg("SPI_BASE_ADDRESS = 0x%"PRIx32"\n", sbase);
  void *spibar = rphysmap("BYT SBASE", sbase, 512); /* Last defined address on Bay Trail is 0x100 */
  if (spibar == ERROR_PTR)
  return ERROR_FLASHROM_FATAL;
@@ -1387,7 +1387,7 @@ static int enable_flash_sb600(const struct programmer_cfg *cfg, struct pci_dev *
  /* No protection flags for this region?*/
  if ((prot & 0x3) == 0)
  continue;
- msg_pdbg("Chipset %s%sprotected flash from 0x%08x to 0x%08x, unlocking...",
+ msg_pdbg("Chipset %s%sprotected flash from 0x%08"PRIx32" to 0x%08"PRIx32", unlocking...",
  (prot & 0x2) ? "read " : "",
  (prot & 0x1) ? "write " : "",
  (prot & 0xfffff800),
@@ -1396,7 +1396,7 @@ static int enable_flash_sb600(const struct programmer_cfg *cfg, struct pci_dev *
  rpci_write_byte(dev, reg, prot);
  prot = pci_read_long(dev, reg);
  if ((prot & 0x3) != 0) {
- msg_perr("Disabling %s%sprotection of flash addresses from 0x%08x to 0x%08x failed.\n",
+ msg_perr("Disabling %s%sprotection of flash addresses from 0x%08"PRIx32" to 0x%08"PRIx32" failed.\n",
  (prot & 0x2) ? "read " : "",
  (prot & 0x1) ? "write " : "",
  (prot & 0xfffff800),
@@ -1494,7 +1494,7 @@ static int enable_flash_ck804(const struct programmer_cfg *cfg, struct pci_dev *
 
  segctrl = pci_read_byte(dev, reg);
  if ((segctrl & 0x3) != 0x0) {
- msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%x).\n",
+ msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%"PRIx32").\n",
  reg, segctrl);
  err++;
  } else
@@ -1518,7 +1518,7 @@ static int enable_flash_ck804(const struct programmer_cfg *cfg, struct pci_dev *
 
  segctrl = pci_read_long(dev, reg);
  if ((segctrl & 0x33333333) != 0x00000000) {
- msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08x).\n",
+ msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08"PRIx32").\n",
  reg, segctrl);
  err++;
  } else

cli_classic.c

@@ -579,32 +579,32 @@ static unsigned int count_max_decode_exceedings(const struct flashctx *flash,
 
  if ((buses & BUS_PARALLEL) && (max_rom_decode_->parallel < size)) {
  limitexceeded++;
- msg_pdbg("Chip size %u kB is bigger than supported "
- "size %u kB of chipset/board/programmer "
+ msg_pdbg("Chip size %"PRIu32" kB is bigger than supported "
+ "size %"PRIu32" kB of chipset/board/programmer "
  "for %s interface, "
  "probe/read/erase/write may fail. ", size / 1024,
  max_rom_decode_->parallel / 1024, "Parallel");
  }
  if ((buses & BUS_LPC) && (max_rom_decode_->lpc < size)) {
  limitexceeded++;
- msg_pdbg("Chip size %u kB is bigger than supported "
- "size %u kB of chipset/board/programmer "
+ msg_pdbg("Chip size %"PRIu32" kB is bigger than supported "
+ "size %"PRIu32" kB of chipset/board/programmer "
  "for %s interface, "
  "probe/read/erase/write may fail. ", size / 1024,
  max_rom_decode_->lpc / 1024, "LPC");
  }
  if ((buses & BUS_FWH) && (max_rom_decode_->fwh < size)) {
  limitexceeded++;
- msg_pdbg("Chip size %u kB is bigger than supported "
- "size %u kB of chipset/board/programmer "
+ msg_pdbg("Chip size %"PRIu32" kB is bigger than supported "
+ "size %"PRIu32" kB of chipset/board/programmer "
  "for %s interface, "
  "probe/read/erase/write may fail. ", size / 1024,
  max_rom_decode_->fwh / 1024, "FWH");
  }
  if ((buses & BUS_SPI) && (max_rom_decode_->spi < size)) {
  limitexceeded++;
- msg_pdbg("Chip size %u kB is bigger than supported "
- "size %u kB of chipset/board/programmer "
+ msg_pdbg("Chip size %"PRIu32" kB is bigger than supported "
+ "size %"PRIu32" kB of chipset/board/programmer "
  "for %s interface, "
  "probe/read/erase/write may fail. ", size / 1024,
  max_rom_decode_->spi / 1024, "SPI");

dummyflasher.c

@@ -215,7 +215,7 @@ static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipad
 
 static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
- msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%08x\n", __func__, addr, val);
+ msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%08"PRIx32"\n", __func__, addr, val);
 }
 
 static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len)

erasure_layout.c

@@ -313,15 +313,15 @@ int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff
 
  if (region.write_prot) {
  msg_gdbg("%s: cannot erase inside %s "
- "region (%#08x..%#08x), skipping range (%#08x..%#08x).\n",
+ "region (%#08"PRIx32"..%#08"PRIx32"), skipping range (%#08x..%#08x).\n",
  __func__, region.name,
  region.start, region.end - 1,
  addr, addr + len - 1);
  free(region.name);
  continue;
  }
 
- msg_gdbg("%s: %s region (%#08x..%#08x) is "
+ msg_gdbg("%s: %s region (%#08"PRIx32"..%#08"PRIx32") is "
  "writable, erasing range (%#08x..%#08x).\n",
  __func__, region.name,
  region.start, region.end - 1,
@@ -339,7 +339,7 @@ int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff
  ret = erasefn(flashctx, start_addr, block_len);
  if (ret) {
  msg_cerr("Failed to execute erase command "
- "for offset %#x to %#x.\n",
+ "for offset %#"PRIx32" to %#"PRIx32".\n",
  start_addr, start_addr + block_len);
  ret = -1;
  goto _end;
@@ -349,11 +349,11 @@ int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff
  memset(curcontents+start_addr, erased_value, block_len);
  // after erase make it unselected again
  erase_layout[i].layout_list[j].selected = false;
- msg_cdbg("E(%x:%x)", start_addr, start_addr + block_len - 1);
+ msg_cdbg("E(%"PRIx32":%"PRIx32")", start_addr, start_addr + block_len - 1);
  // verify erase
  ret = check_erased_range(flashctx, start_addr, block_len);
  if (ret) {
- msg_cerr("Verifying flash. Erase failed for range %#x : %#x, Abort.\n",
+ msg_cerr("Verifying flash. Erase failed for range %#"PRIx32" : %#"PRIx32", Abort.\n",
  start_addr, start_addr + block_len - 1);
  goto _end;
  }
@@ -381,14 +381,14 @@ int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff
  // adjust curcontents
  memcpy(curcontents + region_start + start_here,
  newcontents + region_start + start_here, len_here);
- msg_cdbg("W(%x:%x)", region_start + start_here, region_start + start_here + len_here - 1);
+ msg_cdbg("W(%"PRIx32":%"PRIx32")", region_start + start_here, region_start + start_here + len_here - 1);
 
  *all_skipped = false;
  }
  // verify write
  ret = verify_range(flashctx, newcontents + region_start, region_start, region_end - region_start);
  if (ret) {
- msg_cerr("Verifying flash. Write failed for range %#x : %#x, Abort.\n",
+ msg_cerr("Verifying flash. Write failed for range %#"PRIx32" : %#"PRIx32", Abort.\n",
  region_start, region_end);
  goto _end;
  }
@@ -400,6 +400,6 @@ int erase_write(struct flashctx *const flashctx, chipoff_t region_start, chipoff
  free(old_start_buf);
  free(old_end_buf);
 
- msg_cinfo("Erase/write done from %x to %x\n", region_start, region_end);
+ msg_cinfo("Erase/write done from %"PRIx32" to %"PRIx32"\n", region_start, region_end);
  return ret;
 }

flashrom.c

@@ -391,7 +391,7 @@ int check_for_unwritable_regions(const struct flashctx *flash, unsigned int star
  get_flash_region(flash, addr, &region);
 
  if (region.write_prot) {
- msg_gerr("%s: cannot write/erase inside %s region (%#08x..%#08x).\n",
+ msg_gerr("%s: cannot write/erase inside %s region (%#08"PRIx32"..%#08"PRIx32").\n",
  __func__, region.name, region.start, region.end - 1);
  free(region.name);
  return -1;
@@ -587,7 +587,7 @@ int read_flash(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigne
 
  if (region.read_prot) {
  if (flash->flags.skip_unreadable_regions) {
- msg_gdbg("%s: cannot read inside %s region (%#08x..%#08x), "
+ msg_gdbg("%s: cannot read inside %s region (%#08"PRIx32"..%#08"PRIx32"), "
  "filling (%#08x..%#08x) with erased value instead.\n",
  __func__, region.name, region.start, region.end - 1,
  addr, addr + read_len - 1);
@@ -597,12 +597,12 @@ int read_flash(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigne
  continue;
  }
 
- msg_gerr("%s: cannot read inside %s region (%#08x..%#08x).\n",
+ msg_gerr("%s: cannot read inside %s region (%#08"PRIx32"..%#08"PRIx32").\n",
  __func__, region.name, region.start, region.end - 1);
  free(region.name);
  return -1;
  }
- msg_gdbg("%s: %s region (%#08x..%#08x) is readable, reading range (%#08x..%#08x).\n",
+ msg_gdbg("%s: %s region (%#08"PRIx32"..%#08"PRIx32") is readable, reading range (%#08x..%#08x).\n",
  __func__, region.name, region.start, region.end - 1, addr, addr + read_len - 1);
  free(region.name);
 
@@ -655,20 +655,20 @@ int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int sta
 
  if ((region.write_prot && flash->flags.skip_unwritable_regions) ||
  (region.read_prot && flash->flags.skip_unreadable_regions)) {
- msg_gdbg("%s: Skipping verification of %s region (%#08x..%#08x)\n",
+ msg_gdbg("%s: Skipping verification of %s region (%#08"PRIx32"..%#08"PRIx32")\n",
  __func__, region.name, region.start, region.end - 1);
  free(region.name);
  continue;
  }
 
  if (region.read_prot) {
- msg_gerr("%s: Verification imposible because %s region (%#08x..%#08x) is unreadable.\n",
+ msg_gerr("%s: Verification imposible because %s region (%#08"PRIx32"..%#08"PRIx32") is unreadable.\n",
  __func__, region.name, region.start, region.end - 1);
  free(region.name);
  goto out_free;
  }
 
- msg_gdbg("%s: Verifying %s region (%#08x..%#08x)\n",
+ msg_gdbg("%s: Verifying %s region (%#08"PRIx32"..%#08"PRIx32")\n",
  __func__, region.name, region.start, region.end - 1);
  free(region.name);
 
@@ -1032,13 +1032,13 @@ int write_flash(struct flashctx *flash, const uint8_t *buf,
  const uint8_t *rbuf = buf + addr - start;
 
  if (region.write_prot) {
- msg_gdbg("%s: cannot write inside %s region (%#08x..%#08x), skipping (%#08x..%#08x).\n",
+ msg_gdbg("%s: cannot write inside %s region (%#08"PRIx32"..%#08"PRIx32"), skipping (%#08x..%#08x).\n",
  __func__, region.name, region.start, region.end - 1, addr, addr + write_len - 1);
  free(region.name);
  continue;
  }
 
- msg_gdbg("%s: %s region (%#08x..%#08x) is writable, writing range (%#08x..%#08x).\n",
+ msg_gdbg("%s: %s region (%#08"PRIx32"..%#08"PRIx32") is writable, writing range (%#08x..%#08x).\n",
  __func__, region.name, region.start, region.end - 1, addr, addr + write_len - 1);
 
  write_func_t *write_func = lookup_write_func_ptr(flash->chip);
@@ -1364,7 +1364,7 @@ static int walk_eraseblocks(struct flashctx *const flashctx,
  first = false;
  else
  msg_cdbg(", ");
- msg_cdbg("0x%06x-0x%06x:", info->erase_start, info->erase_end);
+ msg_cdbg("0x%06"PRIx32"-0x%06"PRIx32":", info->erase_start, info->erase_end);
 
  erasefunc_t *erase_func = lookup_erase_func_ptr(eraser);
  ret = per_blockfn(flashctx, info, erase_func, all_skipped);
@@ -1496,13 +1496,13 @@ static int erase_block(struct flashctx *const flashctx,
  len = min(info->erase_start + erase_len, region.end) - addr;
 
  if (region.write_prot) {
- msg_gdbg("%s: cannot erase inside %s region (%#08x..%#08x), skipping range (%#08x..%#08x).\n",
+ msg_gdbg("%s: cannot erase inside %s region (%#08"PRIx32"..%#08"PRIx32"), skipping range (%#08x..%#08x).\n",
  __func__, region.name, region.start, region.end - 1, addr, addr + len - 1);
  free(region.name);
  continue;
  }
 
- msg_gdbg("%s: %s region (%#08x..%#08x) is writable, erasing range (%#08x..%#08x).\n",
+ msg_gdbg("%s: %s region (%#08"PRIx32"..%#08"PRIx32") is writable, erasing range (%#08x..%#08x).\n",
  __func__, region.name, region.start, region.end - 1, addr, addr + len - 1);
  free(region.name);
 

gfxnvidia.c

@@ -115,7 +115,7 @@ static int gfxnvidia_init(const struct programmer_cfg *cfg)
  return 1;
 
  io_base_addr += 0x300000;
- msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr);
+ msg_pinfo("Detected NVIDIA I/O base address: 0x%"PRIx32".\n", io_base_addr);
 
  bar = rphysmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE);
  if (bar == ERROR_PTR)