design a ASK modulator using DDS
digital modulator Quartus13.0+modelsim10.7 Verilog content: Using the FPGA chip as the core chip, a digital modulation baseband signal is generated internally. The modulation symbols can be set through an external DIP switch. The baseband signal is converted into a multi-level parallel code through a serial-to-parallel conversion circuit, and the carrier is keyed through keying. Make adjustments. Note: Use the ROM inside the FPGA to store a sine list parameter, read the sine parameters through a table lookup method to generate a sine carrier signal, write a DDS control module program, and achieve any frequency setting within the frequency range; construct a ROM sine list, address The depth can be defined according to actual needs. After digital modulation, it is sent to an external DAC for digital-to-analog conversion, and finally converted into an analog signal output. Require: Modulation mode: 2ASK, 4ASK, 8ASK (can be set), symbol rate: 10Kbit/s, carrier frequency: 1MHz, output amplitude: 2Vpp.
Module:
- Binary pseudo-random number generator, rate 10kbit/s.
- rom with 200 LUT(look up table)
- lut.py is the script to generate sin look up atbel data.
- Data_converter includes serial data conversion to parallel and digital modulation.
- ASK_mudulator is the top mudule, connected in series with other modules, and includes verilog blocks such as key detection and output amplitude attenuation. 5.DDS
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signal ports: button1 S9, button0 S8, reset R10
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Operation method: After pressing reset, press the button twice in succession, press s9, s8 is 01, 2ask. Press s8, s9 is 10, 4ask. Press s9s9, it is 11, 8ask. Press s8, s8 is 00, no output, you need to press reset again before setting.
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Three buttons have been added. One is to switch the input mode. Press once to switch to key input, and press again to switch to random input. Then during key input, pressing button2 is 0, pressing button3 is 1, and the output is based on the ask mode. For example, in 4ASK mode, pressing button2/3 twice will output one value, and pressing button2/3 twice will output another value.
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dac out put as:
Details can be referred in the comment of the code.
simulation results:
4ASK:
8ASK:
button switch mode:
