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Stabilize armv8 neon instruction set on aarch64 #1266

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merged 6 commits into from
Dec 13, 2021
Merged

Stabilize armv8 neon instruction set on aarch64 #1266

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45dcf31
test a few stabilization and correct some assert_instr
SparrowLii Dec 9, 2021
269dfba
stabilize aarch64/neon/mod.rs and arm_shared/neon/mod.rs
SparrowLii Dec 10, 2021
c2840ee
stabilize aarch64/neon/generated.rs and arm_shared/neon/generated.rs
SparrowLii Dec 10, 2021
34cf17a
correct fmt
SparrowLii Dec 10, 2021
5b8e8e6
correct scope of stabilization
SparrowLii Dec 11, 2021
634cd27
use static_assert in vext
SparrowLii Dec 13, 2021
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correct scope of stabilization
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@SparrowLii
SparrowLii committed Dec 11, 2021
commit 5b8e8e65b831debb0ae2c005e0e8c7e76509be3e
2 changes: 0 additions & 2 deletions crates/core_arch/src/aarch64/crc.rs
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Expand Up @@ -13,7 +13,6 @@ use stdarch_test::assert_instr;
#[inline]
#[target_feature(enable = "crc")]
#[cfg_attr(test, assert_instr(crc32x))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 {
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The FCP only covers the NEON (SIMD) intrinsics, not crc intrinsics.

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OK. Unmarked it.

crc32x_(crc, data)
}
Expand All @@ -22,7 +21,6 @@ pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 {
#[inline]
#[target_feature(enable = "crc")]
#[cfg_attr(test, assert_instr(crc32cx))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn __crc32cd(crc: u32, data: u64) -> u32 {
crc32cx_(crc, data)
}
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16 changes: 8 additions & 8 deletions crates/core_arch/src/aarch64/neon/generated.rs
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Expand Up @@ -12904,7 +12904,7 @@ pub unsafe fn vsha512su1q_u64(a: uint64x2_t, b: uint64x2_t, c: uint64x2_t) -> ui
/// Floating-point round to 32-bit integer, using current rounding mode
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint32x))]
pub unsafe fn vrnd32x_f32(a: float32x2_t) -> float32x2_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12917,7 +12917,7 @@ pub unsafe fn vrnd32x_f32(a: float32x2_t) -> float32x2_t {
/// Floating-point round to 32-bit integer, using current rounding mode
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint32x))]
pub unsafe fn vrnd32xq_f32(a: float32x4_t) -> float32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12930,7 +12930,7 @@ pub unsafe fn vrnd32xq_f32(a: float32x4_t) -> float32x4_t {
/// Floating-point round to 32-bit integer toward zero
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint32z))]
pub unsafe fn vrnd32z_f32(a: float32x2_t) -> float32x2_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12943,7 +12943,7 @@ pub unsafe fn vrnd32z_f32(a: float32x2_t) -> float32x2_t {
/// Floating-point round to 32-bit integer toward zero
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint32z))]
pub unsafe fn vrnd32zq_f32(a: float32x4_t) -> float32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12956,7 +12956,7 @@ pub unsafe fn vrnd32zq_f32(a: float32x4_t) -> float32x4_t {
/// Floating-point round to 64-bit integer, using current rounding mode
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint64x))]
pub unsafe fn vrnd64x_f32(a: float32x2_t) -> float32x2_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12969,7 +12969,7 @@ pub unsafe fn vrnd64x_f32(a: float32x2_t) -> float32x2_t {
/// Floating-point round to 64-bit integer, using current rounding mode
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint64x))]
pub unsafe fn vrnd64xq_f32(a: float32x4_t) -> float32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12982,7 +12982,7 @@ pub unsafe fn vrnd64xq_f32(a: float32x4_t) -> float32x4_t {
/// Floating-point round to 64-bit integer toward zero
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint64z))]
pub unsafe fn vrnd64z_f32(a: float32x2_t) -> float32x2_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -12995,7 +12995,7 @@ pub unsafe fn vrnd64z_f32(a: float32x2_t) -> float32x2_t {
/// Floating-point round to 64-bit integer toward zero
#[inline]
#[target_feature(enable = "neon,frintts")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(frint64z))]
pub unsafe fn vrnd64zq_f32(a: float32x4_t) -> float32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
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8 changes: 4 additions & 4 deletions crates/core_arch/src/aarch64/tme.rs
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Expand Up @@ -71,7 +71,7 @@ pub const _TMFAILURE_TRIVIAL: u64 = 1 << 24;
/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
#[inline]
#[target_feature(enable = "tme")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(tstart))]
pub unsafe fn __tstart() -> u64 {
aarch64_tstart()
}
Expand All @@ -83,7 +83,7 @@ pub unsafe fn __tstart() -> u64 {
/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
#[inline]
#[target_feature(enable = "tme")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(tcommit))]
pub unsafe fn __tcommit() {
aarch64_tcommit()
}
Expand All @@ -93,7 +93,7 @@ pub unsafe fn __tcommit() {
/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
#[inline]
#[target_feature(enable = "tme")]
#[cfg_attr(test, assert_instr(nop, IMM16 = 0x0))]
#[cfg_attr(test, assert_instr(tcancel, IMM16 = 0x0))]
#[rustc_legacy_const_generics(0)]
pub unsafe fn __tcancel<const IMM16: u64>() {
static_assert!(IMM16: u64 where IMM16 <= 65535);
Expand All @@ -106,7 +106,7 @@ pub unsafe fn __tcancel<const IMM16: u64>() {
/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics).
#[inline]
#[target_feature(enable = "tme")]
#[cfg_attr(test, assert_instr(nop))]
#[cfg_attr(test, assert_instr(ttest))]
pub unsafe fn __ttest() -> u64 {
aarch64_ttest()
}
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5 changes: 0 additions & 5 deletions crates/core_arch/src/aarch64/v8.rs
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Expand Up @@ -11,23 +11,20 @@ use stdarch_test::assert_instr;
/// Reverse the order of the bytes.
#[inline]
#[cfg_attr(test, assert_instr(rev))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn _rev_u64(x: u64) -> u64 {
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Same here, there intrinsics are not covered by the FCP.

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OK. Unmarked it.

x.swap_bytes() as u64
}

/// Count Leading Zeros.
#[inline]
#[cfg_attr(test, assert_instr(clz))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn _clz_u64(x: u64) -> u64 {
x.leading_zeros() as u64
}

/// Reverse the bit order.
#[inline]
#[cfg_attr(test, assert_instr(rbit))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn _rbit_u64(x: u64) -> u64 {
crate::intrinsics::bitreverse(x)
}
Expand All @@ -38,7 +35,6 @@ pub unsafe fn _rbit_u64(x: u64) -> u64 {
/// bits.
#[inline]
#[cfg_attr(test, assert_instr(cls))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn _cls_u32(x: u32) -> u32 {
u32::leading_zeros((((((x as i32) >> 31) as u32) ^ x) << 1) | 1) as u32
}
Expand All @@ -49,7 +45,6 @@ pub unsafe fn _cls_u32(x: u32) -> u32 {
/// bits.
#[inline]
#[cfg_attr(test, assert_instr(cls))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn _cls_u64(x: u64) -> u64 {
u64::leading_zeros((((((x as i64) >> 63) as u64) ^ x) << 1) | 1) as u64
}
Expand Down
24 changes: 0 additions & 24 deletions crates/core_arch/src/arm_shared/crc.rs
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Expand Up @@ -28,10 +28,6 @@ use stdarch_test::assert_instr;
#[target_feature(enable = "crc")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(test, assert_instr(crc32b))]
#[cfg_attr(
target_arch = "aarch64",
stable(feature = "neon_intrinsics", since = "1.59.0")
)]
pub unsafe fn __crc32b(crc: u32, data: u8) -> u32 {
crc32b_(crc, data as u32)
}
Expand All @@ -41,10 +37,6 @@ pub unsafe fn __crc32b(crc: u32, data: u8) -> u32 {
#[target_feature(enable = "crc")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(test, assert_instr(crc32h))]
#[cfg_attr(
target_arch = "aarch64",
stable(feature = "neon_intrinsics", since = "1.59.0")
)]
pub unsafe fn __crc32h(crc: u32, data: u16) -> u32 {
crc32h_(crc, data as u32)
}
Expand All @@ -54,10 +46,6 @@ pub unsafe fn __crc32h(crc: u32, data: u16) -> u32 {
#[target_feature(enable = "crc")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(test, assert_instr(crc32w))]
#[cfg_attr(
target_arch = "aarch64",
stable(feature = "neon_intrinsics", since = "1.59.0")
)]
pub unsafe fn __crc32w(crc: u32, data: u32) -> u32 {
crc32w_(crc, data)
}
Expand All @@ -67,10 +55,6 @@ pub unsafe fn __crc32w(crc: u32, data: u32) -> u32 {
#[target_feature(enable = "crc")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(test, assert_instr(crc32cb))]
#[cfg_attr(
target_arch = "aarch64",
stable(feature = "neon_intrinsics", since = "1.59.0")
)]
pub unsafe fn __crc32cb(crc: u32, data: u8) -> u32 {
crc32cb_(crc, data as u32)
}
Expand All @@ -80,10 +64,6 @@ pub unsafe fn __crc32cb(crc: u32, data: u8) -> u32 {
#[target_feature(enable = "crc")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(test, assert_instr(crc32ch))]
#[cfg_attr(
target_arch = "aarch64",
stable(feature = "neon_intrinsics", since = "1.59.0")
)]
pub unsafe fn __crc32ch(crc: u32, data: u16) -> u32 {
crc32ch_(crc, data as u32)
}
Expand All @@ -93,10 +73,6 @@ pub unsafe fn __crc32ch(crc: u32, data: u16) -> u32 {
#[target_feature(enable = "crc")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(test, assert_instr(crc32cw))]
#[cfg_attr(
target_arch = "aarch64",
stable(feature = "neon_intrinsics", since = "1.59.0")
)]
pub unsafe fn __crc32cw(crc: u32, data: u32) -> u32 {
crc32cw_(crc, data)
}
Expand Down
6 changes: 3 additions & 3 deletions crates/core_arch/src/arm_shared/neon/mod.rs
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Expand Up @@ -6687,7 +6687,7 @@ pub unsafe fn vpadalq_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(nop))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smmla))]
pub unsafe fn vmmlaq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -6707,7 +6707,7 @@ pub unsafe fn vmmlaq_s32(a: int32x4_t, b: int8x16_t, c: int8x16_t) -> int32x4_t
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(nop))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ummla))]
pub unsafe fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand All @@ -6727,7 +6727,7 @@ pub unsafe fn vmmlaq_u32(a: uint32x4_t, b: uint8x16_t, c: uint8x16_t) -> uint32x
#[target_feature(enable = "neon")]
#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(nop))]
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(usmmla))]
pub unsafe fn vusmmlaq_s32(a: int32x4_t, b: uint8x16_t, c: int8x16_t) -> int32x4_t {
#[allow(improper_ctypes)]
extern "unadjusted" {
Expand Down
8 changes: 4 additions & 4 deletions crates/stdarch-gen/neon.spec
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Expand Up @@ -7044,7 +7044,7 @@ a = 1.1, 1.9, -1.7, -2.3
validate 1.0, 2.0, -2.0, -2.0
target = frintts

aarch64 = nop
aarch64 = frint32x
link-aarch64 = frint32x._EXT_
generate float32x2_t, float32x4_t

Expand All @@ -7054,7 +7054,7 @@ a = 1.1, 1.9, -1.7, -2.3
validate 1.0, 1.0, -1.0, -2.0
target = frintts

aarch64 = nop
aarch64 = frint32z
link-aarch64 = frint32z._EXT_
generate float32x2_t, float32x4_t

Expand All @@ -7064,7 +7064,7 @@ a = 1.1, 1.9, -1.7, -2.3
validate 1.0, 2.0, -2.0, -2.0
target = frintts

aarch64 = nop
aarch64 = frint64x
link-aarch64 = frint64x._EXT_
generate float32x2_t, float32x4_t

Expand All @@ -7074,7 +7074,7 @@ a = 1.1, 1.9, -1.7, -2.3
validate 1.0, 1.0, -1.0, -2.0
target = frintts

aarch64 = nop
aarch64 = frint64z
link-aarch64 = frint64z._EXT_
generate float32x2_t, float32x4_t

Expand Down