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[Core] Allow ChibiOS SIO driver for UART driver #22839

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merged 4 commits into from
Feb 20, 2024

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KarlK90
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@KarlK90 KarlK90 commented Jan 6, 2024

Description

  1. Rename SD1 UART prefix to UART
  2. Allow usage of SIO driver for UART
  3. Enable SIO for UART by default for RP2040

Types of Changes

  • Core
  • Bugfix
  • New feature
  • Enhancement/optimization
  • Keyboard (addition or update)
  • Keymap/layout/userspace (addition or update)
  • Documentation

Issues Fixed or Closed by This PR

Checklist

  • My code follows the code style of this project: C, Python
  • I have read the PR Checklist document and have made the appropriate changes.
  • My change requires a change to the documentation.
  • I have updated the documentation accordingly.
  • I have read the CONTRIBUTING document.
  • I have added tests to cover my changes.
  • I have tested the changes and verified that they work and don't break anything (as well as I can manage).

@@ -951,6 +951,11 @@ ifeq ($(strip $(SPI_DRIVER_REQUIRED)), yes)
endif

ifeq ($(strip $(UART_DRIVER_REQUIRED)), yes)
OPT_DEFS += -DHAL_USE_SERIAL=TRUE
ifneq ($(filter $(MCU_SERIES),RP2040),)
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I really don't like this solution, is it the best we can do?

@KarlK90
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KarlK90 commented Jan 6, 2024

IMHO the whole driver infrastructure scream for a makeover - but this is outside the scope of this PR.

@github-actions github-actions bot removed the keyboard label Jan 7, 2024
@KarlK90 KarlK90 requested a review from a team January 7, 2024 16:42
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KarlK90 commented Jan 7, 2024

Tested on both RP2040 and STM32F411.

platforms/chibios/drivers/uart_sio.c Outdated Show resolved Hide resolved
platforms/chibios/drivers/uart_sio.c Outdated Show resolved Hide resolved
};
// clang-format on
#else
static SIOConfig sioConfig = {SIO_DEFAULT_BITRATE, UART_CR1, UART_CR2, UART_CR3};
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This initializer is not correct even for STM32 USARTv2 and USARTv3 (USARTv1 does not have a SIO driver implementation) — there is an extra presc field there (and no differences between USARTv2 and USARTv3):

/**
 * @brief   Low level fields of the SIO configuration structure.
 */
#define sio_lld_config_fields                                               \
  /* Desired baud rate.*/                                                   \
  uint32_t                  baud;                                           \
  /* USART PRESC register initialization data.*/                            \
  uint32_t                  presc;                                          \
  /* USART CR1 register initialization data.*/                              \
  uint32_t                  cr1;                                            \
  /* USART CR2 register initialization data.*/                              \
  uint32_t                  cr2;                                            \
  /* USART CR3 register initialization data.*/                              \
  uint32_t                  cr3

Maybe you can fix and test this code even on STM32 if you have suitable chips:

  • USARTv1: F1xx, F4xx, L1xx — no SIO support there ❌
  • USARTv2: F0xx, F3xx, F37x, F7x, L0xx, L4xx, WBxx, WLxx — SIO supported, but the USART hardware does not have FIFOs
  • USARTv3: G0xx, G4xx, H7xx, L4xx+, L5xx — SIO supported; G4xx, L4xx**+**, L5xx chips apparently have RX/TX FIFOs with 8 entries; G0B1/G0C1 chips have 8-entry FIFOs for USART1/2/3 and LPUART1/2, but not others

Although some of those devices may have noticeable problems, because the USART peripheral on many of those chips does not have any FIFO, and the SIO driver does not perform any buffering (and even if the hardware has FIFOs, 8 entries might be not enough).

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Thanks for the detailed comment. Just a quick reply - I've ordered some WeAct G431 dev boards as I don't have any USARTv3 boards with FIFOs. The F303 devboard I have has problems both with the sio and serial driver - I'm investigating.

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@sigprof The G431 boards arrived and the UART driver works just fine with the SERIAL and SIO implementation on this board. The F303 had problems due to the pin mapping, but works just fine with SERIAL. For now I opted to just enable the SIO driver for RP2040 though to keep the configuration simple.

@KarlK90 KarlK90 force-pushed the feature/uart-sio-driver branch 3 times, most recently from 598749f to a780bf8 Compare January 15, 2024 09:22
@KarlK90 KarlK90 force-pushed the feature/uart-sio-driver branch 5 times, most recently from 7d27d56 to b1324f3 Compare January 17, 2024 21:14
@KarlK90 KarlK90 requested a review from a team January 17, 2024 21:22
@tzarc tzarc requested review from sigprof and a team February 16, 2024 14:11
@KarlK90 KarlK90 merged commit 61fa694 into qmk:develop Feb 20, 2024
3 of 5 checks passed
peepeetee pushed a commit to peepeetee/qmk_firmware that referenced this pull request Mar 12, 2024
* onekey: stm32f3_disco: add usart pins and activate peripheral

Signed-off-by: Stefan Kerkmann <[email protected]>

* chibios: uart: change SD1 prefix to UART

Signed-off-by: Stefan Kerkmann <[email protected]>

* chibios: uart: add SIO driver and RP2040 compatibility

Signed-off-by: Stefan Kerkmann <[email protected]>
Co-authored-by: Sergey Vlasov <[email protected]>

* Update platforms/chibios/drivers/uart.h

Co-authored-by: Joel Challis <[email protected]>

---------

Signed-off-by: Stefan Kerkmann <[email protected]>
Co-authored-by: Sergey Vlasov <[email protected]>
Co-authored-by: Joel Challis <[email protected]>
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5 participants