Pinned Loading

1. cdr_rnm cdr_rnm Public

   sv-rnm behavioral sim of a pcie cdr

   SystemVerilog 1 1

2. cpll_ams cpll_ams Public

   Verilog-AMS verification of CPLL

   C

3. EasierUVM-SimpRisc-ws EasierUVM-SimpRisc-ws Public

   Verification suite of the SimpRisc CPU using the EasierUVM code gen

   SystemVerilog 1

4. CinnaScope CinnaScope Public

   Batchfile

5. Axi-Lite-SVA Axi-Lite-SVA Public

   Assertion property files for axi lite slaves/masters

   SystemVerilog 4 1

6. ozphy_uvm ozphy_uvm Public

   SystemVerilog 1 2