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[GR-53936] Adopt newer lock add idiom from HotSpot #9148

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Jun 19, 2024
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Original file line number Diff line number Diff line change
Expand Up @@ -92,10 +92,12 @@
import jdk.graal.compiler.core.common.calc.Condition;
import jdk.graal.compiler.debug.Assertions;
import jdk.graal.compiler.debug.GraalError;
import jdk.graal.compiler.lir.SyncPort;
import jdk.graal.compiler.options.Option;
import jdk.graal.compiler.options.OptionKey;
import jdk.graal.compiler.options.OptionType;
import jdk.graal.compiler.options.OptionValues;
import jdk.internal.misc.Unsafe;
import jdk.vm.ci.amd64.AMD64;
import jdk.vm.ci.amd64.AMD64.CPUFeature;
import jdk.vm.ci.amd64.AMD64Kind;
Expand Down Expand Up @@ -4952,20 +4954,43 @@ public final void sha256rnds2(Register dst, Register src) {
SHA256RNDS2.emit(this, OperandSize.PS, dst, src);
}

// @formatter:off
@SyncPort(from = "https://github.com/openjdk/jdk/blob/08d51003d142e89b9d2f66187a4ea50e12b94fbb/src/hotspot/cpu/x86/assembler_x86.cpp#L234-L268",
sha1 = "7e213e437f5d3e7740874d69457de4ffebbee1c5")
// @formatter:on
public final void membar(int barriers) {
if (isTargetMP()) {
// We only have to handle StoreLoad
if ((barriers & STORE_LOAD) != 0) {
// All usable chips support "locked" instructions which suffice
// as barriers, and are much faster than the alternative of
// using cpuid instruction. We use here a locked add [rsp],0.
// using cpuid instruction. We use here a locked add [esp-C],0.
// This is conveniently otherwise a no-op except for blowing
// flags.
// flags, and introducing a false dependency on target memory
// location. We can't do anything with flags, but we can avoid
// memory dependencies in the current method by locked-adding
// somewhere else on the stack. Doing [esp+C] will collide with
// something on stack in current method, hence we go for [esp-C].
// It is convenient since it is almost always in data cache, for
// any small C. We need to step back from SP to avoid data
// dependencies with other things on below SP (callee-saves, for
// example). Without a clear way to figure out the minimal safe
// distance from SP, it makes sense to step back the complete
// cache line, as this will also avoid possible second-order effects
// with locked ops against the cache line. Our choice of offset
// is bounded by x86 operand encoding, which should stay within
// [-128; +127] to have the 8-byte displacement encoding.
//
// Any change to this code may need to revisit other places in
// the code where this idiom is used, in particular the
// orderAccess code.
int offset = -Unsafe.getUnsafe().dataCacheLineFlushSize();
if (offset < -128) {
offset = -128;
}

lock();
addl(new AMD64Address(AMD64.rsp, 0), 0); // Assert the lock# signal here
addl(new AMD64Address(AMD64.rsp, offset), 0); // Assert the lock# signal here
}
}
}
Expand Down