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Fix I:Postquantum WI number #17

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Nov 20, 2023
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Fix I:Postquantum WI number #17

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Fix I:Postquantum WI number 
(typo in proposal document)
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@cvvletter
cvvletter authored Nov 20, 2023
commit 61aeb51fec7b11bda82d07d9bf5b505e0a30d7e3
2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -35,7 +35,7 @@ Timing Channel Protection | [timing-channel-protection](https://github.com/pulp-
IP-XACT extension for timing and power intent | Not published yet | WI5.3.3 | EPOS | Concept in development| To be determined|
Compression and decompression of digital waveforms| [Tristan](https://github.com/semify-eda/tristan/tree/f6516af367ea9729658724e39aa83fa65c2aa884) | WI2.5.11 | semify | Design and Verification in progress | To be determined|
eFPGA| [I:Embedded-fpga](https://github.com/yongatek/eFPGA) | WI3.4.5 | YNGA | Design in progress | Solderpad |
Accelerator for post-quantum cryptography| To do | WI3.3.4 | TUM, Politecnico di Torino | Design in progress | To be determined|
Accelerator for post-quantum cryptography| To do | WI3.4.4 | TUM, Politecnico di Torino | Design in progress | To be determined|
CMSIS like Open-Source AI, as well as DSP- and compute (e.g. BLAS) libraries| [RiscV-NN](https://github.com/eml-eda/RiscV-NN) | WI4.4.1 | IFX, Politecnico di Torino, UNIBO, CEA | Design in progress | To be determined|
End-to-end stack for ML software development on embedded RISC-V platforms| [Plinio](https://github.com/eml-eda/plinio) | WI4.4.4 | ANTM, Politecnico di Torino, UNIBO | Design in progress | Apache 2.0|
Riviera: RISC-V ISA Extensions for NFC Applications | To Be Done | WI2.5.1 | NXP Austria, Politecnico di Torino, Technical University of Graz | Design and Verification in progress | To Be Decided |
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