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VHDL Ide

WIP

This project is still in preprepre-alpha so dont expect too much

Working:

  • File editing, opening and saving
  • Logging
  • Compiling and Simulating

##TODO:

  • Syntax highlighting
  • UI improvement
  • Documentation

Requiremenst

  • This program uses nvc as vhdl compiler/simulator
  • This program uses gtkwave to view wavefiles

Installing

  • $ ./autogen.sh
  • $ ./configure
  • $ make

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Frontend for freehdl

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