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get rid of "compile" command #106
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Hmmm. The existing approach has the nice property of making an explicit dependency of the compile-time flags. If we give that up, what do we get in exchange?
You can build individual object files or targets with different CC flags as you like and are not forced to used the same ones on everything. |
This sounds like a drawback for developers, and eventually packagers doing "tweak flags, recompile, tweak flags, recompile". A workaround would be having a script that flush the flags to a file only if the file content differs, and use this file as a dependency of everything (like ./compile now). The effect is changing the mtime if the flags have changed, thus rebuilding everything in that case. So in case we want to upgrade the build system while still keeping the correctness of the current one, it might be possible. Although that would require an extra script and could break patches. |
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You can use conf-cc as always, and nothing will get lost. The Makefile will just additionally behave like every other Makefile out there and allow direct override. I doubt any packager would fall in a rebuild trap there, they usually start with a clean source tree for reproducability anyway. |
Let make handle all this. This also allows that one can directly call make CC=something CFLAGS="-O2 -Wall" For those that still modify conf-cc nothing will change as the Makefile will read those values if no explicit CC has been set.
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If you want to avoid changing the entire Makefile for the compile command one can also modify make-compile.sh and make-load.sh
make-compile.sh
set $CC
shift
echo "if [ -n \"\$CC\" ] ; then"
echo " " echo \""\$CC" \$CFLAGS $* -c '${1+"$@"}'\"
echo " " exec "\$CC" \$CFLAGS $* -c '${1+"$@"}'
echo "else"
echo " " echo \""$CC" -c '${1+"$@"}'\"
echo " " exec "$CC" -c '${1+"$@"}'
echo "fi"
make-load.sh
set $CC
shift
echo "if [ -n \"\$CC\" ] ; then"
echo " " echo \""\$CC" \$CFLAGS $* -c '${1+"$@"}'\"
echo " " exec "\$CC" \$CFLAGS $* -c '${1+"$@"}'
echo "else"
echo " " echo \""$CC" -c '${1+"$@"}'\"
echo " " exec "$CC" -c '${1+"$@"}'
echo "fi"
conf-cc and conf-ld are honoured. e.g.
$ cat conf-cc
cc -O2 -Wall -Wshadow -O2 -fPIC -fno-strict-aliasing -I/usr/include/qmail -DLINUX
This will be used to compile .c files.
with this the compile script gets generated like this
$ cat compile
#!/bin/sh
# WARNING: This file was auto-generated. Do not edit!
if [ -n "$CC" ] ; then
echo "$CC $CFLAGS -O2 -Wall -Wshadow -O2 -fPIC -fno-strict-aliasing -I/usr/include/qmail -DLINUX -c ${1+"$@"}"
exec $CC $CFLAGS -O2 -Wall -Wshadow -O2 -fPIC -fno-strict-aliasing -I/usr/include/qmail -DLINUX -c ${1+"$@"}
else
echo "cc -O2 -Wall -Wshadow -O2 -fPIC -fno-strict-aliasing -I/usr/include/qmail -DLINUX -c ${1+"$@"}"
exec cc -O2 -Wall -Wshadow -O2 -fPIC -fno-strict-aliasing -I/usr/include/qmail -DLINUX -c ${1+"$@"}
fi
My intention is actually the other way round: let make call CC directly so I can see the commands in the log afterwards. compile get's deleted, but the log is usually still there. |
Let make handle all this. This also allows that one can directly call
make CC=something CFLAGS="-O2 -Wall"
This needs a "recent" version of GNU make (>= 4) or BSD make so the
!=
syntax is supported. No idea what current MacOS ships.