• Shawn Hymel FPGA Part 1: Introduction
• Shawn Hymel FPGA Part 2: environment setup
• Converting Decimal → Binary (Khan Academy)
• Addition in Binary (Khan Academy)
• Read Harris 1.5 (Logic Gates)
• Read Harris 2.1 - 2.2 (Boolean Equations)
• Making Sense of Boolean Algebra Theorems
• DeMorgan’s theorem and bubble pushing
• Simplifying a sum-of-products expression
• Truth tables to Boolean equations: sum of products
• Truth tables to Boolean equations: product of sums
• Harris 2.6-2.7
• Intro to Karnaugh Maps
• Rules for Making K Map Rect.
• K Maps and don’t-cares
• 4x4 K-Maps
• Breadboarding
  • Lab 1 of Tufts Digital Electronics Course
  • Building a circuit on a breadboard from a schematic

• TerosHDL Plugin Setup on VS Code
• Set Up ICE Studio

1. Write code to get various colors on the 3 color LED and program the board with it. Try out the UPduino FPGA tutorial to get your hands wet.
2. Advanced challenge: Setup a command line compile using a Simple Makefile or a more Complex Makefile as an example. Go through the makefile and understand what it does.

• Shawn Hymel 3
• HDL Bits
  • Basics
  • Vectors
  • Modules: Hierarchy
  • Procedure
  • More Verilog Features
• Preface for ZipCPU Resource
• Setup Verilator
• ZipCPU Wires and Combinatorial logic
• Circuitverse Digital Logic Course
  • Binary Representation
  • Binary Algebra
  • Combinational SSI
  • Logic Design
  • Combinational MSI (Extra: Harris 2.9)
    • What are multiplexers good for? (10:10)
    • Implementing logic with multiplexers (11:48)
  • Combination LSI
• HDL Bits
  • Basic Gates
  • MUX
  • Arithmetic Circuits
  • K Maps to Circuits

• Create a System Verilog design that combines what you learnt today. You can use the EDA Playground Example as a starting point and modify it:

  • An adder module
    • Inputs: Two 8 bit unsigned numbers to be added
    • Output: The sum of the 2 numbers.
  • Testbench to exercise the block and print the output to the console
  • Bitwidth analysis is an important part of designing a hardware system as well as algorithms, especially for digital processing. We will do some bitwidth analysis as part of this question. Note that these dont require simulations to be done and can be solved by analysis):
    • What is the range of unsigned numbers that can be represented by a variable with 2 bits? 3 bits? 8 bits? 16 bits?
    • What pattern do you see here?
    • What is the minimum number of bits it takes to represent the sum of the 2 numbers? eg. if two numbers are repesented by 2 bits each, how many bits does it take to represent their sum? What if the inputs are now 3 bits instead of 2 bits? What pattern do you see?
    • What if one of the above numbers is represented by 2 bits and the other by 3 bits?
    • What if the operation were the difference of the two numbers?
    • What if the operation were a multiplication of the 2 numbers?

  Advanced Challenges/Thought experiments:

  • What happens if there are too few bits to represent the result of the operation? eg. if you have the sum of 2 numbers, each represented by 2 bits and the output is represented by a 2 bit number. This is known as an overflow and is a common bug/feature.
    • Can you try simulating this with your Verilog design?
  • Signed and floating point numbers can also be represented in binary.
    • Look up how to represent signed numbers in Verilog (Two's complement).
      • Harris 1.4
      • Integer Exposed visualization of signed numbers
      • Three ways to represent negative numbers (Computerphile)
      • Examples of two’s complement (Ben Eater)
    • Change your adder to use signed arithmetic.
    • What is the minimum number of bits needed for the above operations if the numbers are signed instead of unsigned or a combination. What happens if a signed number overflows?
    • How to implement more complex arithmetic functions like: divide, square root, sine, cosine etc.

• Shawn Hymel Video Part 4
• ZipCPU Registers
• Advanced reading: Asynchronous design using Micropipelines
• Complete the following Chapters from Circuitverse Digital Logic Course:
  • Sequential SSI Components
• Harris 3.1-3.3
• Intro to sequential logic / What are flip-flops good for?
• Behavior of the SR latch
• SR latch demo
• Building a D latch
• D latch demo
• Building a D flip-flop
• D flip-flop demo
• Extra:
  • SR latch (Ben Eater)
  • D latch (Ben Eater)
  • From D-latch to D-flip-flop (Ben Eater) (This is a different way to build a D flip-flop than what the book describes, which might help you better understand what it does.)
  • Latch and flip-flop operation (Intermation)
  • Timing diagrams of flip-flops and latches (Intermation)
• First Half: PS/2 Keyboard // Cool Use of Shift Register
• HDL Bits
  • Latches and Flip Flops
  • Counters
  • Shift Registers
  • More Circuits

Challenge: Use Circuitverse or preferably SystemVerilog to create a 4-bit binary counter. This should count the following sequence: 0000, 0001, 0010 …, 1110, 1111, 0000

1. Make the counter count up or down
2. Can you make it so the counter will stop at a particular count?
3. Try to make it count on negative edges
4. What if you didn’t have a reset condition? Can you see what happens?

Solution in EDA playground

1. Can you create a clock signal from plain logic gates? What is the minimum number of gates you need to create a clock? What determines the frequency of the clock?
2. How can you create a clock circuit from a NAND gate, resistor and a capacitor?

• Harris 3.4 - 3.5
• Introduction to finite state machines
• Introduction to state machines (Intermation) Detailed explanation of what “state” is, with a walkthrough of the traffic light example from start to finish.
• Breaking down the Moore machine (Intermation)
• Building an FSM to detect binary patterns (Intermation)
• FSM example: passcode lock
• Shawn Hymmel Pt 5
• Sunburst paper on State Machines
• ZipCPU Finite State Machines
• HDL Bits
  • FSM
  • Building Larger Circuits

Code up a state machine for a traffic light. Here are the specifications:

• Shall have 3 states: Red, Yellow and Green.
• Start in the Red state on reset
• When the Red timer expires, go to the Green state.
• When the Green timer expires, go to the Yellow state.
• When the Yellow timer expires, go to this Red state.
• In case of roadwork, blink the Red light.
• Identify the various inputs to the state machine
• Identify the various outputs from the state machine
• Identify what causes the system to change state.
• Draw up the state transition diagram using diagrams.net or Graphviz
• Pick a specific way to implement the state machine and code it up on EDA Playground or other tool.
• Simulate the state machine and check whether this works.

• Practical systems often consist of nested simple state machines rather than a single large one. Larger state machines get harder to verify and corner cases can be tough to test. Extend your state machine so you have lights at all 4 roads at an intersection.
  • What does a single state machine for a 4 road intersection look like? How does this extend to cases where you may have intersections with 2, 3 or 5 roads as well as road crossing signals?
  • What if you used the same state machine at each intersection instead of a single large one? What information does one state machine need to communicate wiht the others so that the intersection is safe for traffic?

• Shawn Hymmel Pt 6
• Shawn Hymmel Pt 7
• HDL Bits
  • Verification: Reading Simulations
  • Verification: Writing Test Benches
• Skim Harris Ch 4.
• Skim Harris 5.1 - 5.4 Harris
• Harris 5.5
• Shawn Hymmel Pt 8
• ZipCPU Using Block RAM

• Create a ROM module that maps hex digits to a 7 segment LED display. The module should take as input a 4 bit input and output a 7 bit vector.
• Create a counter module with a programmable value at which it rolls over and also generates a carry output. Cascade multiple of these to create a seconds, minutes and hours counter.
• Connect each of these modules to the ROM.
• Add an oscillator and clock divider that generates a pulse every second as the input to the clock.
• Add an alarm output that goes active when the clock reaches a particular time. Hint: See here for a nice introduction to how 7 segment displays work as well as how to drive a few of these critters.

• How can you use a small memory to build a bigger one? eg. if you want to build an 8kB memory from two 4kB memories.
• What if you wanted double the bitwidth? How would you restructure the smaller memories?

• Shawn Hymel Pt 9
• Shawn Hymel Pt 10
• Shawn Hymel Pt 11
• Shawn Hymel Pt 12
• Digital to FPGA 101