- PHD in EE.
- IC Designer/Verifier
- Embedded System Engineer
- Xilinx FPGA Hobbyist
- Singapore
- @merlionfire
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Ping-pong-fpga
Ping-pong-fpga PublicBasic ping-pong game written in Verilog runs on Xilinx Spartan3AN starter kit
Verilog 2
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fractal-fpga
fractal-fpga PublicA Mandelbrot set fractal accelerator implemented on Xilinx Spartan-3AN board with VGA display and zooming in by mouse
Verilog 1
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smartverilog
smartverilog PublicPerl script to instantiate modules from mutiple .v .sv files and connect signals among them,
Perl
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ddr_mgr_spartan3
ddr_mgr_spartan3 PublicSimple ddr manager working working with MIG, which is expected to work on spartan 3A starter
Verilog
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