Skip to content
View merlionfire's full-sized avatar
Block or Report

Block or report merlionfire

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. Ping-pong-fpga Ping-pong-fpga Public

    Basic ping-pong game written in Verilog runs on Xilinx Spartan3AN starter kit

    Verilog 2

  2. degreeone degreeone Public

    A 5-stage pipeline MIPS32 CPU

    Verilog 2 1

  3. fractal-fpga fractal-fpga Public

    A Mandelbrot set fractal accelerator implemented on Xilinx Spartan-3AN board with VGA display and zooming in by mouse

    Verilog 1

  4. Tetris_SpinalHDL Tetris_SpinalHDL Public

    Tetris game in SpinalHDL

    Verilog 1

  5. smartverilog smartverilog Public

    Perl script to instantiate modules from mutiple .v .sv files and connect signals among them,

    Perl

  6. ddr_mgr_spartan3 ddr_mgr_spartan3 Public

    Simple ddr manager working working with MIG, which is expected to work on spartan 3A starter

    Verilog