Skip to content
/ iCE40 Public

Lattice iCE40 FPGA experiments - Work in progress

Notifications You must be signed in to change notification settings

mcmayer/iCE40

Repository files navigation

iCE40HX-8K

This is work in progress!

The iCE40 family of FPGAs by Lattice Semiconductor is quite interesting for beginners:

  • Relatively cheap dev boards are available.
  • 1k-8k LUTs is enough to do some some interesting things, even run a soft CPU like the Zylin ZPU or small RISC-V implementations.
  • Lattice's "iCEcube2" design software is freely available.
  • There's an opensource toolchain! Clifford Wolf managed to reverse engineer the bitstream and build up the toolchain. See https://www.clifford.at/icestorm/.

References:

The physical constraint file for the iCE40HX8K Breakout board: ice40hx8k.pcf

Comparison

Board FPGA Package IO PLL Clock Price
Nandland Go iCE40HX-1K VQ100 0 30MHz 60$
iCEstick iCE40HX-1K TQ144 1 12MHz 26$
Olimex iCE40HX1K-EVB iCE40HX-1K VQ100 1 100MHz 26$
myStorm board iCE40HX-4K 30$
icoBoard iCE40HX-8K 130$
Olimex iCE40HX8K-EVB iCE40HX-8K CT256 >80 2 50$
iCE40HX8K breakout iCE40HX-8K CT256 ~40 2 12MHz 50$

A (incomplete) list is mainatained by Lattice.

Notes:

  • The icoBoard is designed as a FPGA based IO board for RaspberryPi. Most notably it has 8MBit of SRAM.
  • The Zylin ZPU requires at about 2.5k logic cells/500 logic tiles so the iCE40HX-1K boards won't suffice for that.

Also interesting

  • Dipsy sub-5$ UL1K breakout board.
  • UPDuino Lattice iCE40-UP5K UltraPlus FPGA, 5.3k LUTs, 34 GPIO, 8$. (Within the iCE40 family the UP devices stand out because they have DSP blocks, hard SPI/I2C blocks, internal oscillators and 1MBit SRAM. Project Icestorm has experimental support.)

Breakout Board Overview

Fig1. - Breakout board.
Fig2. - Breakout board block diagram (from [\[1\]](#ref1)).
Fig3. - I/O Banks.

The images are taken from [1].

UART

Channel B of the FT2232H has a UART interface that is connectected to bank 0 of the iCE40:

UART (FTDI Channel B) Pin
RS232_Rx_TTL B12
RS232_Tx_TTL B10
RTSn B13
CTSn A15
DTRn A16
DSRn B14
DCDn B15

Note that RX and TX are from the point of view of the FT2232H.

Testpoints

The board has 16 testpoints.

TP# Description
TP1 3V3
TP2 1V2
TP3 GND
TP4 VCCIO0
TP5 VCCIO0 after pullup
TP6 PLLVCC0
TP7 PLLVCC0 after pullup
TP8 VCCIO1
TP9 VCCIO1 after pullup
TP10 VCCIO2
TP11 VCCIO2 after pullup
TP12 PLLVCC2
TP13 PLLVCC2 after pullup
TP14 VCCIO3
TP15 VCCIO3 after pullup
TP16 CRESET_B

Hardware

Component Datasheet Description Package Price
LatticeSemi iCE40HX-8K CT256 pdf FPGA, 7'680 logic cells, 128kbit RAM, 206 I/O 256-LFBGA 12.78
FTDI 2232HL pdf High Speed USB 64-LQFP 3.70
Micron N25Q032A13ESC40 pdf 32Mb, 3V, Multiple I/O Serial Flash Memory SO8 0.50
Microchip 93LC56 pdf 2k 2.5V Microwire Serial EEPROM SO8 0.24
Linear Technology LT3030 pdf Dual Linear Regulator 20-TSSOP 6.98

TOTAL: $24.20

I/O

@todo

Rotary encoder

See the folder rotary_enc/.

Infrared

See the folder infrared/.

PLL

See the iCE40 sysCLOCK PLL Design and Usage Guide [8].

UART

See the folder uart/.

DAC

See the folder dac/.

ADC

See the folder adc/.

@TODO

Tools, Editors, IDEs

Atom (Mac OS X)

IDEs

Icarus Verilog

Icarus Verilog is a Verilog simulation and synthesis tool. It can parse Verilog 2005 (IEEE 1364-2005). Start here: https://iverilog.wikia.com/wiki/. On Mac OS X install with Homebrew:

brew install icarus-verilog

GTKWave

"GTKWave is a fully featured GTK+ based wave viewer for Unix, Win32, and Mac OSX which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing."

On Mac OS X install with Homebrew:

brew install homebrew/gui/gtkwave

References

  • [1] iCE40-HX8K Breakout Board User's Guide - pdf
  • [2] iCE40 LP/HX Family Data Sheet - pdf
  • [3] FTDI FT2232H Dual High Speed USB to Multipurpose UART/FIFO IC - page, pdf
  • [4] Micron N25Q032A13ESC40 32Mb, 3V, Multiple I/O Serial Flash Memory - page, pdf
  • [5] Microchip 93LC56 2k 2.5V Microwire Serial EEPROM - , page, pdf
  • [6] Linear Technology LT3030 Dual 750mA/250mA Low Dropout, Low Noise, Micropower Linear Regulator - page, pdf
  • [7] Lattice iCE40 LP/HX/LM products page
  • [8] iCE40 Development kits and boards page
  • [9] iCE40 sysCLOCK PLL Design and Usage Guide pdf
  • [10] iCEcube2 Design Software page
  • [11] iCEcube2 2016-02 Tutorial pdf

About

Lattice iCE40 FPGA experiments - Work in progress

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published