Computing engineer. Collaborating lecturer at University of Seville.
- Jerez de la Frontera, Cádiz, Spain.
- https://www.zxprojects.com
Pinned Loading
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pano_logic
pano_logic PublicVarious cores and experiments for Pano Logic Zero Client G1 and G2
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fpga_training_modules
fpga_training_modules PublicA collection of Verilog modules that adds a number of useful indicators on screen, similar to leds, switches and displays that most trainers have
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simple_sdram_controller
simple_sdram_controller PublicA very simple SDRAM controller for FPGA written in Verilog. It exposes a SRAM-like interface to the rest of the FPGA fabric
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turboloader
turboloader PublicParametrized turbo loader for ZX Spectrum (and possibly, other Z80-based computers)
Assembly 8
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