stop instantly when assertion fails

marph91 · Mar 25, 2021 · b923ce5 · b923ce5
1 parent c11736a
commit b923ce5
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Showing 4 changed files with 7 additions and 4 deletions.
diff --git a/src/util/adder_tree.vhd b/src/util/adder_tree.vhd
@@ -50,7 +50,8 @@ architecture rtl of adder_tree is
  -- Pad with zeros to widen from input bitwidth to output bitwidth.
  -- Input gets extended by 1 bit at each stage.
  assert C_OUTPUT_BITWIDTH >= C_INPUT_BITWIDTH + C_STAGES
- report "required bitwidth: " & to_string(C_INPUT_BITWIDTH + C_STAGES) & ", actual bitwidth: " & to_string(C_OUTPUT_BITWIDTH);
+ report "required bitwidth: " & to_string(C_INPUT_BITWIDTH + C_STAGES) & ", actual bitwidth: " & to_string(C_OUTPUT_BITWIDTH)
+ severity failure;
  v_input_datum := (others => '0');
 
  for i in 0 to C_INPUT_COUNT - 1 loop

diff --git a/src/util/basic_counter.vhd b/src/util/basic_counter.vhd
@@ -90,7 +90,7 @@ begin
 
  else generate
 
- assert C_MAX mod C_INCREMENT = 0;
+ assert C_MAX mod C_INCREMENT = 0 severity failure;
 
  gen_power_of_two : if is_power_of_two(C_MAX) generate
 

diff --git a/src/util/serializer.vhd b/src/util/serializer.vhd
@@ -35,7 +35,7 @@ begin
  a_data <= a_data(1 to a_data'high) & a_data(0);
 
  if (isl_valid = '1') then
- assert int_output_valid_cycles = 0;
+ assert int_output_valid_cycles = 0 severity failure;
  int_output_valid_cycles <= C_DATA_COUNT;
  for i in a_data'range loop
  a_data(i) <= get_slice(islv_data, i, C_DATA_BITWIDTH);

diff --git a/src/window_ctrl/channel_repeater.vhd b/src/window_ctrl/channel_repeater.vhd
@@ -37,7 +37,9 @@ architecture behavior of channel_repeater is
 
 begin
 
- assert (C_CH mod C_PARALLEL_CH = 0) report "invalid parallelization factor " & to_string(C_PARALLEL_CH);
+ assert (C_CH mod C_PARALLEL_CH = 0)
+ report "invalid parallelization factor " & to_string(C_PARALLEL_CH)
+ severity failure;
 
  gen_data : if C_PARALLEL_CH = 1 generate
  -- isl_valid and osl_valid can be active at the same time,