A tool to be embedded along with the design when simulation tools are not enough to discover what is wrong.
- Portability
- Small footprint
- Video interface
- Block RAM requirement only
- Data transfer
forked from hdl4fpga/hdl4fpga
-
Notifications
You must be signed in to change notification settings - Fork 0
VHDL library 4 FPGAs
License
lycchang/hdl4fpga
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
| Name | Name | Last commit message | Last commit date | |
|---|---|---|---|---|
Repository files navigation
About
VHDL library 4 FPGAs
Resources
License
Code of conduct
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published
Languages
- VHDL 65.2%
- Verilog 14.5%
- SystemVerilog 6.9%
- Stata 6.2%
- Makefile 2.2%
- JavaScript 1.4%
- Other 3.6%