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[acq_core] Jittery triggered acquisition #75

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lerwys opened this issue Mar 27, 2019 · 2 comments
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[acq_core] Jittery triggered acquisition #75

lerwys opened this issue Mar 27, 2019 · 2 comments
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lerwys commented Mar 27, 2019

Problem: On acquiring triggered acquisitions, the trigger detection has a jitter of about 4 (for the ADC/ADCSWAP rate) or 2 (for the other rates) for the acquired waveform. This is due to the trigger alignment logic at the acq_trigger module.

Possible Solution: Record the number of "off" trigger samples and subtract this number from the DDR trigger address at the ddr3_axis_wirte module

@lerwys lerwys added the bug label Mar 27, 2019
@lerwys lerwys self-assigned this Mar 27, 2019
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lerwys commented Mar 27, 2019

This bug was introduced by commit e9d94f9

lerwys added a commit to lnls-dig/infra-cores that referenced this issue Mar 28, 2019
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lerwys commented Apr 26, 2019

Closed by lnls-dig/infra-cores@44593e2

@lerwys lerwys closed this as completed Apr 26, 2019
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