4 Pull requests merged by 2 people

• Pulling refs/heads/master into master

  #1911 merged Nov 27, 2024

• Support to force routing tap multiplexers in clock network

  #1910 merged Nov 27, 2024

• Pulling refs/heads/master into master

  #1907 merged Nov 26, 2024

• Support overwriting mode_bits for pb_type through bitstream setting file

  #1906 merged Nov 26, 2024

1 Pull request opened by 1 person

• Bump yosys from `0200a76` to `98b4aff`

  #1908 opened Nov 26, 2024

1 Issue opened by 1 person

• Bitstream manipulation for programmable clock network

  #1909 opened Nov 26, 2024

2 Unresolved conversations

Sometimes conversations happen on old items that aren’t yet closed. Here is a list of all the Issues and Pull Requests with unresolved conversations.

• QL-MemoryBank-Flatten "num_wl" is ignored when "num_regions" is defined

  #1901 commented on Nov 21, 2024 • 0 new comments

• Reduce Unique Tiles in FPGA Fabric to Simplify Implementation Efforts

  #1903 commented on Nov 25, 2024 • 0 new comments