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Revert "MIPS: Lantiq: Fix cascaded IRQ setup"
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This reverts commit 362721c which is
commit 6c356ed upstream.

It shouldn't have been included in a stable release.

Reported-by: Amit Pundir <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: John Crispin <[email protected]>
Cc: James Hogan <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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gregkh committed Apr 21, 2017
1 parent a9da1ac commit 5a4c073
Showing 1 changed file with 21 additions and 17 deletions.
38 changes: 21 additions & 17 deletions arch/mips/lantiq/irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -269,11 +269,6 @@ static void ltq_hw5_irqdispatch(void)
DEFINE_HWx_IRQDISPATCH(5)
#endif

static void ltq_hw_irq_handler(struct irq_desc *desc)
{
ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
}

#ifdef CONFIG_MIPS_MT_SMP
void __init arch_init_ipiirq(int irq, struct irqaction *action)
{
Expand Down Expand Up @@ -318,19 +313,23 @@ static struct irqaction irq_call = {
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
int irq;

if (!pending) {
spurious_interrupt();
return;
unsigned int i;

if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
do_IRQ(MIPS_CPU_TIMER_IRQ);
goto out;
} else {
for (i = 0; i < MAX_IM; i++) {
if (pending & (CAUSEF_IP2 << i)) {
ltq_hw_irqdispatch(i);
goto out;
}
}
}
pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());

pending >>= CAUSEB_IP;
while (pending) {
irq = fls(pending) - 1;
do_IRQ(MIPS_CPU_IRQ_BASE + irq);
pending &= ~BIT(irq);
}
out:
return;
}

static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
Expand All @@ -355,6 +354,11 @@ static const struct irq_domain_ops irq_domain_ops = {
.map = icu_map,
};

static struct irqaction cascade = {
.handler = no_action,
.name = "cascade",
};

int __init icu_of_init(struct device_node *node, struct device_node *parent)
{
struct device_node *eiu_node;
Expand Down Expand Up @@ -386,7 +390,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
mips_cpu_irq_init();

for (i = 0; i < MAX_IM; i++)
irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
setup_irq(i + 2, &cascade);

if (cpu_has_vint) {
pr_info("Setting up vectored interrupts\n");
Expand Down

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