Fix bug in rendering actual PC from NEXT_PC with thumb preffix/suffix instructions

[2over12]

Since we group preffix suffix instructions using the current instruction size to work out the mode was buggy

remill/lib/Arch/Sleigh/Thumb2Arch.cpp

Line 48 in b677387

SleighAArch32ThumbDecoder::LiftPcFromCurrPc(llvm::IRBuilder<> &bldr,

instead this passes down the decoding context to figure out where PC should be

[2over12]

There's an additional issue here in how we compute the patch expressions for sleigh files. We assume we can compute the address of inst_next given the value in PC, but we do it using inst_last, in reality regardless of the instruction size this should be -4 on thumb and -8 on arm which requires determining what mode, this will require another macro

[2over12]

replacing all context reg references with a known constant is too naive, we need to just assign the entry value then lift the register like normal. A better way to do this is to allocate the local context reg as a pointer, store the assumed constant, then lift

[2over12]

Should really integrate TestLifting.cpp from ARM and PPC but Im pressed for time at the moment.

[Ninja3047]

can you put a comment somewhere that explains what vnode_size_mapping is for? looks like it's set maps to 1 for both ppc and thumb?

[2over12]

Ill add a comment, it's just with the approach above we need to alloca some memory to store the context register, consequently we need to know the size ghidra expects for the register and we don't really have a way to get that