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School of Electrical Engineering, University of Belgrade
- Belgrade, Serbia
- lazar2222.github.io
Highlights
- Pro
Pinned Loading
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RISC-V-Debug
RISC-V-Debug Public archiveImplementation of RISC-V CPU with external debug support via JTAG
TeX 1
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KockaAdmiralac/arilla-vlsi
KockaAdmiralac/arilla-vlsi PublicArilla fork for our VLSI Systems class.
VHDL
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topofkeks/arilla
topofkeks/arilla PublicArilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.
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Image-Scaling-Accelerator
Image-Scaling-Accelerator Public archiveHardware acceleration of image scaling
Verilog
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