Just for fun, attempt at hardware to generate a 640x480 VGA text mode

Flexible digital logic hardware frequency discriminator used as an extreeeeeme guitar tuner.

mute video ads and skip them when possible. close text and image banner

ECE496 project

This tool was written to parse git logs to generate a report for charting commit and pull request statistics

Python package to generate statistics from git.

Generate statistics from any repository that adheres to the conventional changelog standard

conventional-changelog angular preset

Scripts for generating project statistics and for plotting them as graphs.

Better GitHub statistics images for your profile, with stats from private repos too

Grok open release

Windows inside a Docker container.

System, apps and tooling for the Gigatron TTL microcomputer

Virtual Machine for analog with the open source Sky130A PDK

An open-source VHDL library for FPGA design.

An interactive digital logic simulator with verilog support (Yosys)

This repo includes ChatGPT prompt curation to use ChatGPT better.

VHDL support for VS Code

HDL support for VS Code

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

HDLGen-ChatGPT, works in tandem with ChatGPT-3.5 chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and t…

This repository supports the 'New Design Approach of Hardware Implementation through Natural Language Entry' article. It includes raw data and supplementary materials including chat history, and so…

A place to keep my synthesizable verilog examples.

Haskell to VHDL/Verilog/SystemVerilog compiler

example code for the logi-boards from pong chu HDL book

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

A minimal GPU design in Verilog to learn how GPUs work from the ground up