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UART: fix bug in baudrate->BRR #14

Merged
merged 1 commit into from
May 20, 2015
Merged

UART: fix bug in baudrate->BRR #14

merged 1 commit into from
May 20, 2015

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doegox
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@doegox doegox commented May 19, 2015

Some UART speeds were incorrectly set and reported.

Source:
STM32F405 reference manual
30.3.4 page 965:

USARTDIV is an unsigned fixed point number that is coded on the USART_BRR register.
Note:
• When OVER8=0, the fractional part is coded on 4 bits and programmed by the DIV_fraction[3:0] bits in the USART_BRR register
• When OVER8=1, the fractional part is coded on 3 bits and programmed by the DIV_fraction[2:0] bits in the USART_BRR register, and bit DIV_fraction[3] must be kept cleared.

bvernoux added a commit that referenced this pull request May 20, 2015
UART: fix bug in baudrate->BRR
@bvernoux bvernoux merged commit 301a231 into hydrabus:master May 20, 2015
@bvernoux
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Thanks for that amazing fix ;-)

doegox added a commit to doegox/micropython that referenced this pull request May 21, 2015
There was a bug in ST UART driver when OVERSAMPLING_8.
At the moment micropython is only using OVERSAMPLING_16 so this bug is not affecting current micropython fw.
But if one day one wants to enable higher baudrates (~5.5M to 10.5M) and use OVERSAMPLING_8 the bug is triggered (and e.g. setting 7M would give an actual 10.5M baudrate).
This bug was revealed when playing around with the native firmware of hydrabus, see hydrabus/hydrafw#14

Source:
STM32F405 reference manual, 30.3.4 page 965:

 USARTDIV is an unsigned fixed point number that is coded on the USART_BRR register.
 Note:
 • When OVER8=0, the fractional part is coded on 4 bits and programmed by the DIV_fraction[3:0] bits in the USART_BRR register
 • When OVER8=1, the fractional part is coded on 3 bits and programmed by the DIV_fraction[2:0] bits in the USART_BRR register, and bit DIV_fraction[3] must be kept cleared.
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2 participants